DLA SMD-5962-85504 REV E-2012 MICROCIRCUIT DIGITAL HIGH SPEED CMOS 3-TO-8 LINE DECODER WITH TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Convert to military drawing format. Add vendor CAGE 01295 for device types 01EX, 012X and 01FX. 87-04-15 Michael A. Frye B Change drawing CAGE code to 67268. Add vendor CAGE 27014 for device type 01EX. Add footnote 2/ to table I. Editorial change

2、s throughout. 89-05-31 Michael A. Frye C Update boilerplate to MIL-PRF-38535 requirements. - jak 01-10-18 Thomas M. Hess D Made change to paragraph 3.5. Update boilerplate to MIL-PRF-38535 requirements. - LTG 05-01-24 Thomas M. Hess E Update test condition of high and low level voltage to table I. U

3、pdate boilerplate paragraphs to the current MIL-PRF-38535 requirements. - LTG 12-02-23 Thomas M. Hess CURRENT CAGE CODE 67268 REV SHEET REV SHEET REV STATUS REV E E E E E E E E E E OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY Jeffery Tunstall DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3

4、990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY D. A. DiCenzo APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, HIGH SPEED CMOS, 3-TO-8 LINE DECODER WITH TTL COMPAT

5、IBLE INPUTS, MONOLITHIC SILICON DRAWING APPROVAL DATE 86-05-01 REVISION LEVEL E SIZE A CAGE CODE 14933 85504 SHEET 1 OF 10 DSCC FORM 2233 APR 97 5962-E199-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85504 D

6、LA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PI

7、N). The complete PIN is as shown in the following example: 85504 01 E A Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54HCT138 3

8、-to-8 line decoder with TTL compatible inputs 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line F GDFP2-F16 or CDFP3-F16 16 Flat pack 2 CQCC1-N20 20 Squar

9、e leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC+0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+0

10、.5 V dc Clamp diode current 20 mA DC output current (per pin) 25 mA Continuous current through VCCor GND . 50 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD): 500 mW 4/ Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) . See M

11、IL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. 2/ 3/ Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Case operating temperature range (TC) -55C to +125C Input rise or fall time tr, tf): 0 to 500 ns _ 1/ Stresses above the absolute maximum rating may cause permane

12、nt damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise specified, all voltages are referenced to ground. 3/ The limits for the parameters specified herein shall apply over the full specified VCCrange and case temperature

13、range of -55C to +125C. 4/ For TC= +100C to +125C, derate linearly at 12 mW/C. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85504 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 3 DSCC FO

14、RM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitati

15、on or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEF

16、ENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelph

17、ia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents cited in the solicitation or contract. JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JEDEC Standard

18、 No. 7 - Standard for Description of 54/74HCXXXXX and 54/74HCTXXXXX Advanced High-Speed CMOS Devices. (Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10thStreet, Suite 240-S Arlington, VA 22201). 2.3 Order of precede

19、nce. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requireme

20、nts. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who h

21、as been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modificat

22、ions to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3

23、.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections

24、 shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85504 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVIS

25、ION LEVEL E SHEET 4 DSCC FORM 2234 APR 97 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise spe

26、cified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgrou

27、p are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to sp

28、ace limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q

29、“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The ce

30、rtificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as

31、 required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Mar

32、itime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networki

33、ng permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85504 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Test conditions -55C TC +125C 1/ unless otherwise specified

34、 Group A subgroups Limits Unit Min Max High-level output voltage VOHVIN= VIH= 2.0 V or VIL= 0.8 V IOH= -20 A VCC= 4.5 V 1, 2, 3 4.4 V VIN= VIH= 2.0 V or VIL= 0.8 V IOH= -4.0 mA VCC= 4.5 V 1, 2, 3 3.7 Low-level output voltage VOLVIN= VIH= 2.0 V or VIL= 0.8 V IOL= +20 A VCC= 4.5 V 1, 2, 3 0.1 V VIN= V

35、IH= 2.0 V or VIL= 0.8 V IOL= +4.0 mA VCC= 4.5 V 1, 2, 3 0.4 High-level input voltage VIH2/ VCC= 4.5 V 1, 2, 3 2.0 V Low-level input voltage VIL2/ VCC= 4.5 V 1, 2, 3 0.8 V Input capacitance CINVIN= 0.0 V, TC= +25C See 4.3.1c 4 10 pF Quiescent current ICCVIN= VCCor GND VCC= 5.5 V 1, 2, 3 160 A Input l

36、eakage current IINVIN= VCCor GND VCC= 5.5 V 1, 2, 3 1.0 A Functional tests See 4.3.1d 7 Propagation delay time, binary select to any output tPLH1TC= +25C CL= 50 pF See figure 4 VCC= 5.0 V 10% 9 36.0 ns TC= -55C and +125C CL= 50 pF See figure 4 VCC= 5.0 V 10% 10, 11 54.0 ns tPHL1TC= +25C CL= 50 pF Se

37、e figure 4 VCC= 5.0 V 10% 9 40.0 ns TC= -55C and +125C CL= 50 pF See figure 4 VCC= 5.0 V 10% 10, 11 60.0 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85504 DLA LAND AND MARITIM

38、E COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Test conditions -55C TC +125C 1/ unless otherwise specified Group A subgroups Limits Unit Min Max Propagation delay time, G1 to any output tPHL2,tPLH2TC=

39、+25C CL= 50 pF See figure 4 VCC= 5.0 V 10% 9 33.0 ns TC= -55C and +125C CL= 50 pF See figure 4 VCC= 5.0 V 10% 10, 11 50.0 ns Propagation delay time, G2A or G2B to output tPLH3TC= +25C CL= 50 pF See figure 4 VCC= 5.0 V 10% 9 35.0 ns TC= -55C and +125C CL= 50 pF See figure 4 VCC= 5.0 V 10% 10, 11 52.0

40、 ns tPHL3TC= +25C CL= 50 pF See figure 4 VCC= 5.0 V 10% 9 40.0 ns TC= -55C and +125C CL= 50 pF See figure 4 VCC= 5.0 V 10% 10, 11 60.0 ns Transition time tTHL, tTLH 3/ TC= +25C CL= 50 pF See figure 4 VCC= 5.0 V 10% 9 15.0 ns TC= -55C and +125C CL= 50 pF See figure 4 VCC= 5.0 V 10% 10, 11 22.0 ns 1/

41、For a power supply of 5.0 V 10% the worst case output voltage (VOHand VOL) occur for HCT at 4.5 V. Thus, the 4.5 V values should be used when designed with this supplyThe worst case leakage current (IIN, and ICC) occur for CMOS at the higher voltage so the 5.5 V values should be used. Power dissipat

42、ion capacitance (CPD), typically 85 pF, determines the no load dynamic power consumption, PD= CPD VCC2 f+ICC VCC; and the no load dynamic current consumption, IS= CPDVCCf+ICC. 2/ VIHand VILtests are not required if applied as a forcing function for VOHor VOL. 3/ Transition times (tTLH, tTHL) shall b

43、e guaranteed, if not tested, to the limits specified in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85504 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 7 DSCC FORM 2234 APR 97

44、 Device type 01 Case outlines E and F 2 Terminal Number Terminal Symbol Terminal Symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 A B C G2A G2B G1 Y7 GND Y6 Y5 Y4 Y3 Y2 Y1 Y0 VCC - - - - - - - - - - - - NC A B C G2A NC G2B G1 Y7 GND NC Y6 Y5 Y4 Y3 NC Y2 Y1 Y0 VCCNC = No internal connection

45、FIGURE 1. Terminal connections. Inputs Outputs Enable Select G1 G2A G2B C B A Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 X X L H H H H H H H H H X X L L L L L L L L X H X L L L L L L L L X X X L L L L H H H H X X X L L H H L L H H X X X L H L H L H L H H H H L H H H H H H H H H H H L H H H H H H H H H H H L H H H H H

46、H H H H H H L H H H H H H H H H H H L H H H H H H H H H H H L H H H H H H H H H H H L H H H H H H H H H H H L H = High voltage level L = Low voltage level X = Irrelevant FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD

47、MICROCIRCUIT DRAWING SIZE A 85504 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 8 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. NOTES: 1. CLincludes probe and test fixture capacitance. 2. Phase relationships between waveforms were chosen arbitrarily. All input pulses are su

48、pplied by generators having the following characteristics: PRR 1 MHz, ZO= 50, tr= 6.0 ns, tf= 6.0 ns. 3. The outputs are measured one at a time with one input transition per measurement. 4. Timing parameters should be tested at a minimum input frequency of 1 MHz. FIGURE 4. Switching waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85504 DLA LAND AND MARITIME COLUMB