DLA SMD-5962-85502 REV E-2006 MICROCIRCUIT DIGITAL 16-BIT BIPOLAR MICROCONTROLLER MONOLITHIC SILICON《硅单块 16比特双极微控制器 数字微型电路》.pdf

《DLA SMD-5962-85502 REV E-2006 MICROCIRCUIT DIGITAL 16-BIT BIPOLAR MICROCONTROLLER MONOLITHIC SILICON《硅单块 16比特双极微控制器 数字微型电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-85502 REV E-2006 MICROCIRCUIT DIGITAL 16-BIT BIPOLAR MICROCONTROLLER MONOLITHIC SILICON《硅单块 16比特双极微控制器 数字微型电路》.pdf（21页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Change to military drawing format. Change Q dimension of case outline Y. Add device type 02. Add U package for device types 01 and 02, change maximum power dissipation in 1.3, remove X1and X2operating conditions in 1.4. Change maximum frequency f

2、or device type 01. Add maximum frequency for device type 02. 87-02-03 C. Reusing B Corrections in pin identification for the Y and U packages. Changes to ac parameters of table I. Editorial changes throughout. 88-01-20 M. A. Frye C Update boilerplate to MIL-PRF-38535 requirements. Correct drawing ti

3、tle to indicate device function. - CFS 03-09-15 Thomas M. Hess D Correct marking requirements in 3.5. Update boilerplate in accordance with MIL-PRF-38535 requirements. Editorial changes throughout. - PHN 05-05-10 Thomas M. Hess E Correct errors in dimensions in figure 1 table for case outline Y. - C

4、FS 06-02-27 Thomas M. Hess THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED. REV SHET REV D D D D D D SHEET 15 16 17 18 18 20 REV STATUS REV E C D D C C C C D E D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Ray Monnin STANDARD MICROCIRCUIT DRAWING CHECKED BY

5、 D. A. DiCenzo DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Charles Reusing AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 80-07-21 MICROCIRCUIT, DIGITAL, 16-BIT BIPOLAR MICROCONTROLL

6、ER, MONOLITHIC SILICON SIZE A CAGE CODE 67268 85502 AMSC N/A REVISION LEVEL E SHEET 1 OF 20 DSCC FORM 2233 APR 97 5962-E266-06 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85502 DEFENSE SUPPLY CENTER COLUMBUS C

7、OLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 1 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN i

8、s as shown in the following example: 85502 01 X X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 8X305 16-Bit bipolar microcontrolle

9、r 02 8X305-10 16-Bit bipolar microcontroller 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style U CQCC1-N68 68 Square leadless chip carrier X See figure 1 50 Dual-in-line Y See figure 2 52 Flat pa

10、ck 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range (VCC) -0.3 V dc to +7.0 V dc Crystal input voltage. 2.0 V dc All other pins -0.3 V dc to +5.5 V dc Storage temperature range -65C to +150C Maximum power dissipation

11、(PD) 1/. 1.50 W Lead temperature (soldering, 5 seconds). +270C Maximum junction temperature (TJ) . +200C Thermal resistance, junction-to-case (JC): Case U . See MIL-STD-1835 Cases X and Y 20C/W 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Minimum high level

12、 input voltage (logic inputs) (VIH) +2.0 V dc Maximum low level input voltage (logic inputs) (VIL). +0.8 V dc Minimum high level output voltage (VOH) +2.4 V dc Maximum low level output voltage (VOL). +0.55 V dc Maximum frequency of operation: Device type 01 8.0 MHz Device type 02 10.0 MHz Case opera

13、ting temperature range (TC) . -55C to +125C _ 1/ Must withstand the added PDdue to short circuit test (e.g., IOS). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85502 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHI

14、O 43218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of thes

15、e documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electron

16、ic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standar

17、dization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes

18、applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that i

19、s produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in

20、accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML

21、“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline(s). T

22、he case outline(s) shall be in accordance with 1.2.2 herein and on figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Functional block diagram. The functional block diagram shall be as specified on figure 3. 3.2.4 Timing waveforms and test circuit

23、s. The timing waveforms and test circuits shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. Provided

24、by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85502 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 3.4 Electrical test requirements. The electrical test requiremen

25、ts shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be mar

26、ked. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QM

27、L flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of

28、 supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to thi

29、s drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation

30、. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85502 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL

31、 C SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Limits Unit Conditions -55C TC +125C +4.5 V VCC +5.5 V unless otherwise specified Group A subgroups Device type Min Max High level input voltage X1and X2VIH11, 2, 3 All 0.6 2.0 V High level input voltage Al

32、l other pins VIH21, 2, 3 All 2.0 V Low level input voltage X1and X2VIL11, 2, 3 All 0.4 V Low level input voltage All other pins VIL21, 2, 3 All 0.8 V High level output voltage VOHIOH= -3 mA, VCC= 4.5 V 1, 2, 3 All 2.4 V Low level output voltage A0through A12VOL1IOL= +6 mA VCC= 4.5 V 1, 2, 3 All 0.55

33、 V Low level output voltage All other outputs VOL2IOL= +16 mA VCC= 4.5 V 1, 2, 3 All 0.55 V Regulator voltage VCR1/ VCC= 5.0 V All V Input clamp voltage (X1and X2do not have internal clamp diodes) VICIIN= -10 mA VCC= 4.5 V 1, 2, 3 All -1.5 V High level input current X1and X2IIH1VIH= 0.6 V VCC= 5.5 V

34、 1, 2, 3 All 4.0 mA High level input current All other pins IIH2VIH= 4.5 V VCC= 5.5 V 1, 2, 3 All 50 A Low level input current X1and X2IIL1VIL= 0.4 V VCC= 5.5 V 1, 2, 3 All -3 mA Low level input current IV0 IV7IIL2VIL= 0.4 V VCC= 5.5 V 1, 2, 3 All -0.3 mA Low level input current I0- I15IIL3VIL= 0.4

35、V VCC= 5.5 V 1, 2, 3 All -1.6 mA Low level input current HALT and RESET IIL4VIL= 0.4 V VCC= 5.5 V 1, 2, 3 All -0.4 mA Short circuit output current IOSVCC= 5.5 V 1, 2, 3 All -30 -140 mA 1, 2 175 Supply current ICCVCC= 5.5 V 3 All 205 mA Regulator control IREGVCC= 5.0 V 1, 2, 3 All -10 -25 mA 1, 2 180

36、 Regulator current ICRVCC= 5.5 V 3 All 260 mA Functional tests See 4.3.1c 7, 8 All See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85502 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO

37、 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Limits (instruction cycle time) = 250 ns, 01 device; = 200 ns, 02 device Limits 2/ (instruction cycle time) 250 ns, 01 device; 200 ns, 02 device Unit Test Symbol Conditions -55C TC

38、 +125C +4.5 V VCC +5.5 V unless otherwise specified Group A subgroupsDevicetype Min Max Min Max 01 250 250 Processor cycle time tPC02 200 200 ns 01 125 125 X1 clock period 3/ tCP02 100 100 ns 01 62 62 X1 clock high time 3/ tCH02 50 50 ns 01 62 62 X1 clock low time 3/ tCL02 50 50 ns MCLK low delay tM

39、CLAll 15 40 15 40 ns 01 47 72 t4Q-10 t4Q+10 MCLK pulse width 4/ tW02 30 60 t4Q-10 t4Q+10 ns 01 145 175 t1Q+ t2Q+25 t1Q+ t2Q+45 Output driver turn-on time (MCLK falling edge) 5/ tMODO02 125 148 t1Q+ t2Q+25 t1Q+ t2Q+45 ns 01 20 20 Output driver turn-on time (SC/WC rising edge) 6/ tDI02 20 20 ns 01 80

40、115 80 115 Input data to output data tDD02 75 105 75 105 ns 01 40 t1Q-22 MCLK falling edge to HALT falling edge 4/ tMHS02 30 t1Q-22 ns 01 80 t1Q+18 HALT hold time (MCLK falling edge) 4/ tMHH02 65 t1Q+18 ns 01 85 Program storage access time 7/ tACC02 60 ns 01 40 I/O port output enable time (LB/RB to

41、valid IV data input) tIO02 20 ns 01 160 t1Q+ t2Q+35 MCLK falling edge to address stable 4/ 8/ 9/ tMAS02 140 t1Q+ t2Q+35 ns 01 160 t2Q+98 Instruction to address 4/ 8/ 10/ tIASee figure 4. 9, 10, 1102 140 t2Q+98 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networki

42、ng permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85502 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC +125C +4.5 V VCC +5

43、.5 V unless otherwise specified Group A subgroupsDevicetype Limits (instruction cycle time) = 250 ns, 01 device; = 200 ns, 02 device Limits 2/ (instruction cycle time) 250 ns, 01 device; 200 ns, 02 device Unit Min Max Min Max Input data to address 8/ 11/ tIVAAll 95 95 ns 01 40 t1Q-22 MCLK falling ed

44、ge to instruction 4/ 6/ 12/ tMIS02 25 t1Q-22 ns 01 70 t1Q+8 Instruction hold time (MCLK falling edge) 4/ 13/ tMIH02 55 t1Q+8 ns 01 127 154 t1Q+ t2Q+2 t1Q+ t2Q+29 MCLK falling edge to SC/WC rising edge 4/ tMWH02 100 128 t1Q+ t2Q+2 t1Q+ t2Q+29 ns 01 0 25 0 25 MCLK falling edge to SC/WC falling edge tM

45、WL02 0 15 0 25 ns 01 10 35 10 35 MCLK falling edge to LB/RB (Input phase) tMIBS02 8 25 10 35 ns 01 30 30 Instruction to LB/RB (Input phase) tIIBS02 25 30 ns 01 140 170 t1Q+ t2Q+15 t1Q+ t2Q+45 MCLK falling edge to LB/RB (Output phase) 4/ tMOBS02 115 145 t1Q+ t2Q+15 t1Q+ t2Q+45 ns 01 75 t1Q+ t2Q-50 MC

46、LK falling edge to input data stable 4/ tMIDS02 55 t1Q+ t2Q-50 ns 01 140 t1Q+ t2Q+15 Input data hold time (MCLK falling edge) 4/ tMIDH02 115 t1Q+ t2Q+15 ns 01 5 5 Output data hold time (MCLK falling edge) tMDDH02 9 9 ns 01 150 180 t1Q+ t2Q+25 t1Q+ t2Q+55 Output data stable (MCLK falling edge) 4/ tMO

47、DSSee figure 4. 9, 10, 1102 130 155 t1Q+ t2Q+25 t1Q+ t2Q+55 ns See footnotes on next sheet. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85502 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION L

48、EVEL C SHEET 8 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. 1/ Typically 3.5 V at TC= -55C, 3.1 V at TC= 0C, 2.6 V at TC= +125C. 2/ Information only, not tested. 3/ X1and X2inputs are driven by an external pulse generator with an amplitude of 1.5 V; all timing parameters are measured at this voltage level, except three-state signals which are measured at 1.0 V. 4/ Respectively, t1Q, t2Q, t3Q, and t4Qrepresent time intervals for the first, second, third, and fourth quarter cycles. 5/ The minimum figure for