DLA SMD-5962-85152 REV G-2012 MICROCIRCUIT MEMORY DIGITAL NMOS 256K X 1 DYNAMIC RANDOM ACCESS MEMORY (DRAM) MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Convert to military drawing format. Add LCC package type. Add one device type. Change replacement military specification number. Add two vendors. 87-05-05 M. A. Frye B Add vendor CAGE number 6Y440 as a supplier of device type 03. Changes to table

2、 I and table I footnotes. Changes to figure 1, figure 3, and figure 5. Editorial changes throughout. 88-10-04 M. A. Frye C Delete vendor CAGE 01295 as a source of supply for X package. Add the Y package for vendor CAGE 01295. Editorial changes throughout. 90-11-06 M. A. Frye D Changes to figure 1, c

3、ase outline Y, dimensions for symbols L1 and L2. Editorial changes throughout. 92-07-27 M. A. Frye E Changes in accordance with NOR 5962-R049-94. 93-12-01 M. A. Frye F Boilerplate update, part of 5 year review. REDRAWN ksr 06-05-02 Raymond Monnin G Updated drawing in accordance with current requirem

4、ents. glg 12-08-23 Charles Saffle CURRENT CAGE CODE 67268 THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED REV SHEET REV G G G G G G G G G G G G G G G SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 REV STATUS REV G G G G G G G G G G G G G G OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13

5、 14 PMIC N/A PREPARED BY Sandra Rooney DLA LAND AND MARITIME STANDARD MICROCIRCUIT DRAWING CHECKED BY D. A. DiCenzo COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY N. A. Hauck MICROCIRCUIT, MEMORY, DIGITAL, NMOS, 256K X 1 D

6、YNAMIC RANDOM ACCESS MEMORY (DRAM), MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 86-01-02 AMSC N/A REVISION LEVEL G SIZE A CAGE CODE 14933 85152 SHEET 1 OF 29 DSCC FORM 2233 APR 97 5962-E454-12 Provided by IHSNot for ResaleNo reproduction or networking permitted

7、 without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85152 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in acc

8、ordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 85152 01 E A Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit func

9、tion as follows: Device type Generic number 1/ Circuit Access time Refresh 01 256K x 1 DRAM 150 ns 256 cycles (4 ms) 02 256K x 1 DRAM 200 ns 256 cycles (4 ms) 03 256K x 1 DRAM 120 ns 256 cycles (4 ms) 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outlin

10、e letter Descriptive designator Terminals Package style E GDIP1-T16 and CDIP2-T16 16 dual-in-line package X See figure 1 18 rectangular chip carrier package Y See figure 1 18 rectangular chip carrier package 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolut

11、e maximum ratings. 2/ 3/ Voltage range for any pin, including VCCsupply - -1.0 V dc to +7.0 V dc Short circuit output current - 50 mA Power dissipation - 1 W Storage temperature range - -65C to +150C Lead temperature (soldering, 10 seconds) - +300C Thermal resistance, junction-to-case (JC): Case E -

12、 See MIL-STD-1835 Cases X and Y - 50C/W 1.4 Recommended operating conditions. Supply voltage range (VCC) - 4.75 V dc to 5.25 V dc Supply voltage (VSS) - 0 V dc High level input voltage range (VIH) - 2.4 V dc to 5.0 V dc Low level input voltage range (VIL) - -0.5 V dc to +0.6 V dc Case operating temp

13、erature range (TC) - -55C to +110C Refresh cycle time - 4.0 ms 1/ Generic numbers are listed on the Standard Microcircuit Source Approval Bulletin and will be listed in MIL-HDBK-103. 2/ Voltage values are with respect to VSS. 3/ Exposure to absolute maximum rated conditions for extended periods may

14、affect device reliability. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85152 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Governmen

15、t specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION

16、MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Micro

17、circuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event

18、 of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individu

19、al item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted t

20、ransitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requi

21、rements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, constr

22、uction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with figure 1 and 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall b

23、e as specified on figure 2. 3.2.3 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.4 Block diagram. The block diagram shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics ar

24、e as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be

25、 in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-3853

26、5, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT

27、DRAWING SIZE A 85152 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 4 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ 2/ Group A Device Limits Unit -55C TC +110C subgroups type 4.75 V dc VCC 5.25 V dc Min Max High level output

28、VOHIOH= -5 mA, VCC= 4.75 V 1,2,3 All 2.4 V voltage VIL= 0.6 V, VIH= 2.4 V Low level output VOLIOL= 4.2 mA, VCC= 4.75 V 1,2,3 All 0.4 V voltage High level input IIHVCC= 5.25 V, VI= 5.0 V 1,2,3 All 10 A leakage current Low level input IILVCC= 5.25 V, VI= 0.0 V 1,2,3 All -10 A leakage current High leve

29、l output IOHVCC= 5.25 V 1,2,3 All 10 A leakage current VO= 5.25 V Low level output IOLVCC= 5.25 V, VO= 0.0 V 1,2,3 All -10 A leakage current Average operating ICC1tc= minimum cycle 1,2,3 01 75 mA current during read VCC= 5.25 V or write cycle 3/ 02 60 mA 03 80 mA Standby current 3/ ICC2After 1 memor

30、y cycle RAS 1,2,3 All 5 mA and CAS high VCC= 5.25 V Average refresh ICC3tc= minimum cycle, CAS 1,2,3 01 60 mA current 3/ high, RAS cycling VCC= 5.25 V 02 50 mA 03 63 mA Average page-mode ICC4tc(P)= minimum cycle, RAS 1,2,3 01,03 50 mA current 3/ low, CAS cycling VCC= 5.25 V 02 45 mA Access time from

31、 RAS ta(R)See figures 5 and 6 9,10,11 01 150 ns VCC= 4.75 V to 5.25 V 02 200 ns 03 120 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85152 DLA LAND AND MARITIME COLUMBUS, OHIO 4

32、3218-3990 REVISION LEVEL G SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions 1/ 2/ Group A Device Limits Unit -55C TC +110C subgroups type 4.75 V dc VCC 5.5 V dc Min Max Access time from CAS ta(C)See figures 5 and 6 9,10,11 01 80 ns VCC

33、= 4.75 V to 5.25 V 02 100 ns 03 65 ns Output disable time after tdis(CH) 9,10,11 01 30 ns CAS high 4/ 02 35 ns 03 30 ns Page-mode cycle time 4/ tc(P) 9,10,11 01 145 ns 02 190 ns 03 125 ns Page-mode cycle time tc(PM) 9,10,11 01 205 ns (read-modify-write cycle 4/ 02 250 ns 03 172 ns Read cycle time 4/

34、 tc(rd) 9,10,11 01 260 ns 02 330 ns 03 230 ns Write cycle time 4/ tc(W) 9,10,11 01 260 ns 02 330 ns 03 230 ns Read-write/read-modify- tc(rdW) 9,10,11 01 315 ns write cycle time 4/ 02 390 ns 03 277 ns Pulse duration, CAS high tw(CH)P 9,10,11 01 60 ns (page mode) 02 80 ns 03 50 ns See footnotes at end

35、 of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85152 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Con

36、tinued. Test Symbol Conditions 1/ 2/ Group A Device Limits Unit -55C TC +110C subgroups type 4.75 V dc VCC 5.5 V dc Min Max Pulse duration, CAS high tw(CH)See figures 5 and 6 9,10,11 01 60 ns (non-page mode) VCC= 4.75 V to 5.25 V 02 80 ns 03 25 ns Pulse duration, CAS low tw(CL) 9,10,11 01 80 10,000

37、ns 5/ 02 100 10,000 ns 03 65 10,000 ns Pulse duration, RAS high tw(RH)P 9,10,11 01,02 120 ns (precharge time) (page mode) 03 115 ns Pulse duration, RAS high tw(RH) 9,10,11 01,03 100 ns (precharge time) (non-page mode) 02 120 ns Pulse duration, RAS low tw(RL) 9,10,11 01 150 10,000 ns 6/ 02 200 10,000 ns 03 120 10,000 ns Write pulse duration tw(W) 9,10,11 01 45 ns 02 55 ns 03 40 ns Column address setup tsu(CA) 9,10,11 All 0 ns time Row address setup time tsu(RA) 9,10,11 0