DLA SMD-5962-84053 REV B-1989 MICROCIRCUITS DIGITAL N-CHANNEL SIGNAL PROCESSOR MONOLITHIC SILICON《硅单片 信号处理器N沟道数字微型电路》.pdf

《DLA SMD-5962-84053 REV B-1989 MICROCIRCUITS DIGITAL N-CHANNEL SIGNAL PROCESSOR MONOLITHIC SILICON《硅单片 信号处理器N沟道数字微型电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-84053 REV B-1989 MICROCIRCUITS DIGITAL N-CHANNEL SIGNAL PROCESSOR MONOLITHIC SILICON《硅单片 信号处理器N沟道数字微型电路》.pdf（22页珍藏版）》请在麦多课文档分享上搜索。

1、9979996 0122341 430 m B - LTR A - Convert to standardized military drawing format. Add source of supply, CAGE code 60991. Upgrade operating temperature range, alter electrical test requirements. Add switching test waveforms. Editorial changes throughout. REVISIONS DESCRIPTION Add LCC package (outlin

2、e letter Z). DATE (ni-MO-DA 85 OCT 17 89 JUN O9 APPROVED DEFENSE ELECTRONICS SUPPLY CENTER STANDARDIZED 6 SEPTEMBER 1984 DEPAFiTMENT OF DEFENSE REVISION LEVEL AMSC NIA B SHEET 1 OF 22 DESC FORM 193-1 t V.S. GOVERNMENT PIIINTING OFFICI: 1987 - 748.12916Opl SEP a7 5962-El067 DISTRIBUTION STATEMENT A.

3、Approved for public release; dlslrlbullon is unllmiied. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-9999996 OL223Y2 377 M STANDARD12 Eb MILITARY DRAWING DEFENSE ELE-ICS SUPPLY CEMER MYlON,oHKl45444 1. SCOPE 1.1 SGO e. This drawing describes devic

4、e requirements for class B mlcrocikuits ih accordance with l.; AB=PC=O AB= PC+ I 11 NOTES : 1. RS forces DEN, E, and MEN high and three-states data bus DO through 015. AB outputs (and program counter) are synchronously cleared to zero after the next complete CLK cycle from +K. 2. R3 must be maintain

5、ed active low for a minimum of five clock cycles to be recognized. 3. ReSUmDtiOn of normal program will connnence after one complete CLK cycle for 4E. - 4. 5. Due to the synchronizing action on K, time to execute the function can vary dependent upon when +R3 or +R3 occur in the CLKxcle. Diagram show

6、n is for definition purpose only. DEN, E, and MEN are mutually excl usive. 6. Timing measurements are referenced to and from a low voltage of 0.8 volt and a high voltage of 2.0 volts, unless otherwise noted. 7. During a write cycle, may produce an invalid write address. FIGURE 3. AC loading circuits

7、 and switching waveforms - Continued. SIZE 84053 STANDARDIZED MILITARY DRAWING A DEFENSE ELECTRONICS SUPPLY CENTER MWN, OHIO 45444 REVISION LEVU t U S GOVERNMENT PRINTING OFFICE 1888-55C-547 DESC FORM 193A SEP 87 Provided by IHSNot for ResaleNo reproduction or networking permitted without license fr

8、om IHS-,-,-9999996 O322360 392 STANDARDIZED MILITARY DRAWING 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method ?il05 of MIL-STD-883 including groups A, B, C, and O inspections. The following additional criterid shall apply. 4.3.1 Group A inspection

9、. a. Tests shall be as specified in table II herein. b. Subgroups 5 and 6 in table I, method 5005 of MIL-STb-883 shall be omitted. c. Subgroup 4 (CIN/C(JUT/CI/O/C/C measurements) shall be measured only for the initial test and after process or design changes Which may affect capacitance. A minimum o

10、f 5 devices shall be required with zero rejects. d. Subgroups 7 and 8 shall verify the instruction set. The instruction set forms a part of the vendors test tape and shall be maintained and available fro3 the approved sources of supply. 4.3.2 Groups C and D inspections. a. End-point electrical param

11、eters shall be as specified in table II herein. b. Steady-state life test conditions, method 1005 of MIL-STD-883. (1) Test condition A or 0 using the circuit subniitted with the certificate of compliance (see 3.5 herei n) . (2) TA = +125C, minimum. (3) Test duration: 1,000 hours, except as permitted

12、 by method 1005 of MIL-STO-883. TABLE II. Electrical test requirements. I I I I MIL-STD-883 test requivements I Subgroups 1 I I (per method I I I 5005, table I) I SIZE A 84053 I I l (method 5004) I I 1 I IFinal electrical test parameters I 1*,2,3,7*,8 I I (method 5004) I 9,10,11 I I I Group A test r

13、equirements I 1,2,3,4,7,8, I (method 5005) I 9,10,11 I I I I ni ti a electrical parameters 1 - I IGroups C and D end-point I 2,8A,10 i I electrical parameters I I I (method 5005) I I * PDA applies to subgroups 1 and 7. 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be

14、in accordance with YI L - M-38na. DEFENSE ELECTRONICS SUPPLY CEMEA REWSiN LEVEL SHEET I DAYION, OHIO 45444 B 20 It U S GOVERNMENT PRINTING OFFICE 1888-549 804 ESC FORM 193A SEP 87 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-= %9b 03223b3 229 M ST

15、ANDARDIZED SIZE A 6. NOTES 4053 6.1 Intended use. Microcircuits conforming to this drawing are intended for use when military specifications do not exist and qualified military devices that will perform the required function are not available for OEM application. When a military specification exists

16、 and the product covered by this drawing has been qualified for listing on QPL-38510, the device specified herein will be inactivated and will not be used for new design. The QPL-38510 product shall be the preferred item for all applications, 6.2 Re laceability. Microcircuits covered by this drawing

17、 will replace the same generic device covere + y a contractor-prepared specification or drawing. MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 6.3 Comments. Comments on this drawing should be directed to DESC-ECS, Dayton, Ohio 45444, or tel epho-96-5375. 21 REVIGION LEVEL SHE

18、ET B 6.4 Terms and definitions. The terms and definitions used herein are defined as follows: I I I r I TERMINAL I 1/0 I DEFINITION I I I i Al 1-AO/ I PA2-PA0 I 19m I I I CLKOUT I I ID15-DO I IDEN I I IINT I IMCm I 1 I IMEN I I IlE I I “cc I I vss I lE I I I x1 I I OUT I I I IN I I I I I/O I I I I O

19、UT I OUT I IN i IN 1 OUT I IN I IN I OUT I I I I IN I I I IN I External address bus. 1/0 port address 1 irnultiplexed over PAL-PAO. 1 I I IExternal polling input for bit test and I I jump operations. I I I !System clock output, 1/4 crystal/CLKIN I I I I 116-bi t data bus. IData enable indicates the

20、processor laccepting input data on D15-DO. I I Interrupt. I !Memory mode select pin. I microcomputer mode. Low selects Imicroprocessor mode. I IMemory enable indicates that D15-DO Iwill accept external memory instruction. I IReset used to initialize the device. I I frequency* High selects I Power- l

21、around* IWrite enable indicates valid data on I D15-DO. I ICrystal input. I XZ/CLKIN i IN I I I ICrystal input or external clock input. I * U. 8. GOVERNMENT PRINTING OFFICE i-549404 . I Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-9999946 0322362

22、Lb5 STANDARDIZED SIZE A MILITARY DRAWING 6.5 Appr Ved salirces of su 19. Approved sources of supply are listed herein. Additional sources Wil! be added as theyP!ecome available. The vendors listed herein have agreed to this drawing and a cettifIcate of tompliance (see 3.5 herein) has been submitted

23、to DESC-ECS. 8453 I I I l i Military drawing i Vendor i Vendor i 1 part number similar part I I 1 nCunber 1 number I/ i I I I I I 8405301QX 8465301QX I 8405301ZX I 84053OiZX I i 01295 i SMJJLOlOJDS i I o“W6 i DSP32010BQX SMJ32lOFDS I 60991 DSP3ZOlOBUX I I - 1/ Caution. Do not use this number for ite

24、m acquisition. Itemscqit-ed to this number may not satisfy the performance requirements of this drawing. Vendor FSCM number 01295 60991 Vendor riame and address Texas Instruments P.O. Sox 6448 Midland, TX 79711 General Instrument Corporation Mi croel ectronics Di vi si on 2355 W. Chandler Boulevard Chandl er, AZ 85224-6199 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-