DLA SMD-5962-84001 REV K-2005 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED LOW-POWER SCHOTTKY TTL FLIP-FLOP MONOLITHIC SILICON《硅单片双稳多谐振荡器 TTL肖脱基高级小功率双极数字微型电路》.pdf

《DLA SMD-5962-84001 REV K-2005 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED LOW-POWER SCHOTTKY TTL FLIP-FLOP MONOLITHIC SILICON《硅单片双稳多谐振荡器 TTL肖脱基高级小功率双极数字微型电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-84001 REV K-2005 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED LOW-POWER SCHOTTKY TTL FLIP-FLOP MONOLITHIC SILICON《硅单片双稳多谐振荡器 TTL肖脱基高级小功率双极数字微型电路》.pdf（15页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add vendor, FSCM 04713. Editorial changes throughout. 85-04-23 N. A. HAUCK B Change FMAXand prop delays in table I. Change recommended width of clock pulse. 85-09-23 N. A. HAUCK C Add vendor FSCM 27014. Change VILand ICCL. Editorial changes throu

2、ghout 86-04-21 N. A. HAUCK D Change propagation delays. Convert to military drawing format. Device 01, Case R inactive for new design. 87-02-24 N. A. HAUCK E Change input voltage range. Update table I and Figure 2. Update 6.4. 87-06-26 N. A. HAUCK F Table I, added footnotes and changed propagation d

3、elay times. Added figure 4, switching waveforms and test circuit. Editorial changes throughout. Added CAGE 18324. Table II, subgroups added. Device type 01, case 2 is inactive for new design. 88-05-13 M. A. FRYE G Changes in accordance with NOR 5962-R258-92. - car 92-07-10 M. L. POELKING H Changes i

4、n accordance with NOR 5962-R125-93. - tvn 93-06-09 M. L. POELKING J Update to reflect latest changes in format and requirements. Editorial changes throughout. Reactivate device type 01, case 2 for new design. - les 02-07-29 R. MONNIN K Make a correction to the Marking paragraph 3.5. - ro 05-06-29 R.

5、 MONNIN CURRENT CAGE CODE 67268 THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED. REV SHET REV SHET REV STATUS REV K K K K K K K K K K K K K K OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY GREG A. PITZ DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHE

6、CKED BY D. A. DiCENZO COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY N. A. HAUCK AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 84-04-12 MICROCIRCUIT, DIGITAL, BIPOLAR, ADVANCED LOW-POWER SCHOTTKY TTL, FLIP-FLOP, MON

7、OLITHIC SILICON AMSC N/A REVISION LEVEL K SIZE A CAGE CODE 14933 84001 SHEET 1 OF 14 DSCC FORM 2233 APR 97 5962-E348-05 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84001 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS

8、, OHIO 43218-3990 REVISION LEVEL K SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as sh

9、own in the following example: 84001 01 R X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ALS574 Octal D-type flip-flop with three

10、 state outputs 02 54ALS576 Octal D-type flip-flop with three state inverted outputs 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line S GDFP2-F20 or CDFP3

11、-F20 20 Flat pack 2 CQCC1-N20 20 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage . -0.5 V dc minimum to +7.0 V dc maximum Input voltage range -1.2 V dc at -18 mA to +7.0 V dc Storage temperatur

12、e range . -65C to +150C Maximum power dissipation (PD) 1/: Device type 01 154.0 mW Device type 02 165.0 mW Lead temperature (soldering, 10 seconds) . +300C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ) +175C _ 1/ Maximum power dissipation is defined as VCCx ICC

13、, and must withstand the added PDdue to short-circuit test; e.g., IO. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84001 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 3 DSCC FO

14、RM 2234 APR 97 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc minimum to +5.5 V dc maximum Minimum high level input voltage (VIH) . 2.0 V dc Maximum low level input voltage (VIL) : TC= +125C . 0.7 V dc TC= +25C . 0.8 V dc TC= -55C 0.8 V dc Case operating temperature range

15、 (TC) . -55C to +125C Width of clock pulse (tw) : Device type 01 16.5 ns minimum Device type 02 25 ns minimum Data setup time (tsu) . 15 ns minimum Data hold time (th) 4 ns minimum 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards,

16、 and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEP

17、ARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these

18、documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing a

19、nd the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-ST

20、ANDARD MICROCIRCUIT DRAWING SIZE A 84001 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B dev

21、ices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufa

22、cturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modific

23、ations shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified

24、 in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth tables. The truth tables shall be as specified on figure 2. 3.2.4 Logic diagr

25、ams. The logic diagrams shall be as specified on figure 3. 3.2.5 Test circuit and switching waveforms. The test circuit and switching waveforms shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics

26、 are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be

27、 in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-3853

28、5, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed a

29、s an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certif

30、icate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verifi

31、cation and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or network

32、ing permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84001 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. 1/ Test Symbol Conditions -55C TC +125C unless otherwise spec

33、ified Group A subgroupsDevice type Limits Unit Min MaxHigh level output voltage VOHVCC= 4.5 V, IOH= -0.4 mA, 2/ VIH= 2.0 V, VIL= 0.7 or 0.8 V 1, 2, 3 All 2.5 V VCC= 4.5 V, IOH= -1.0 mA, 2/ VIH= 2.0 V, VIL= 0.7 or 0.8 V 2.4 Low level output voltage VOL IOL= 12 mA, VCC= 4.5 V, 2/ VIH= 2.0 V, VIL= 0.7

34、or 0.8 V 1, 2, 3 All 0.4 V Input clamp voltage VIC VCC= 4.5 V, IIN= -18 mA 1, 2, 3 All -1.2 V Low level input current IIL VCC= 5.5 V, VIN= 0.4 V, all other inputs = 4.5 V 1, 2, 3 All -0.2 mA High level input current IIH1 VCC= 5.5 V, VIN= 2.7 V, unused inputs = 0.0 V 1, 2, 3 All 20 A IIH2 VCC= 5.5 V,

35、 VIN= 7.0 V, unused inputs = 0.0 V 100 Off-state output current IOZHVCC= 5.5 V, VOUT= 2.7 V 1, 2, 3 All 20 A IOZL VCC= 5.5 V, VOUT= 0.4 V -20 Output current IOVCC= 5.5 V, VOUT= 2.25 V 3/ 1, 2, 3 01 -20 -112 mA 02 -15 -112 Supply current ICCH VCC= 5.5 V, VIN 4.5 V 1, 2, 3 01 18 mA VCC= 5.5 V, VIN 0.4

36、 V 02 18 ICCL VCC= 5.5 V, VIN 0.4 V 01 27 VCC= 5.5 V, VIN 4.5 V 02 24 ICCZ VCC= 5.5 V, VIN 4.5 V 1, 2, 3 01 28 mA Supply current outputs disabled 02 30 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCU

37、IT DRAWING SIZE A 84001 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC +125C unless otherwise specified Group A subgroupsDevice type Limits Unit Min Ma

38、xFunctional tests See 4.3.1c 4/ 7, 8 All Maximum clock frequency fMAX VCC= 4.5 V to 5.5 V, 5/ CL= 50 pF 10%, 9, 10, 11 01 30 MHz RL= 500 5%, see figure 4 02 22 Propagation delay time, tPLH1 VCC= 4.5 V to 5.5 V, 5/ 9, 10, 11 01 4 16 ns CLK to any Q or Q CL= 50 pF 10%, 02 4 24 tPHL1 RL= 500 5%, 01 4 1

39、4 see figure 4 02 4 20 Output enable OC to tPZL VCC= 4.5 V to 5.5 V, 5/ 9, 10, 11 01 4 26 ns any Q or Q CL= 50 pF 10%, 02 3 23 tPZH RL= 500 5%, 01 4 18.5 see figure 4 02 4 24 Output disable OC to tPLZ VCC= 4.5 V to 5.5 V, 5/ 9, 10, 11 01 2 15 ns any Q or Q CL= 50 pF 10%, 02 2 29 tPHZ RL= 500 5%, 01

40、2 10 see figure 4 02 2 14 1/ Unused inputs that do not directly control the pin under test must be 2.5 V or 0.4 V. Unused inputs shall not exceed 5.5 V or go less than 0.0 V. No input shall be floated. 2/ All outputs must be tested. In the case where only one input at VILmaximum or VIHminimum produc

41、es the proper output state, the test must be performed with each input being selected as the VILmaximum or the VIHminimum input. 3/ The output conditions have been chosen to produce a current that closely approximates one half of the true short circuit output current, IOS. Not more than one output w

42、ill be tested at one time and the duration of the test condition shall not exceed 1 second. 4/ Functional tests shall be conducted at input test conditions of GND VIL VOLand VOH VIH VCC. 5/ Propagation delay limits are based on single output switching. Unused inputs = 3.5 V or 0.3 V. Provided by IHS

43、Not for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84001 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 7 DSCC FORM 2234 APR 97 Device types 01 02 Case outlines R, S 2 R, S 2 Terminal number Termina

44、l symbols 1 OC OC OC OC 2 1D 1D 1D 1D 3 2D 2D 2D 2D 4 3D 3D 3D 3D 5 4D 4D 4D 4D 6 5D 5D 5D 5D 7 6D 6D 6D 6D 8 7D 7D 7D 7D 9 8D 8D 8D 8D 10 GND GND GND GND 11 CLK CLK CLK CLK 12 8Q 8Q 8 Q 8Q 13 7Q 7Q 7 Q 7Q 14 6Q 6Q 6 Q 6Q 15 5Q 5Q 5 Q 5Q 16 4Q 4Q 4 Q 4Q 17 3Q 3Q 3 Q 3Q 18 2Q 2Q 2 Q 2Q 19 1Q 1Q 1 Q 1

45、Q 20 VCCVCCVCCVCCFIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84001 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 8 DSCC FORM 2234 APR 97 Device

46、 type 01 OC CLK D Output Q L H H L L L L L X Q0 H X X Z H = High level L = Low level X = Irrelevant = Transition from low to high level Q0= The level of Q before the indicated steady-state input conditions were established Z = High impedance state Device type 02 OC CLK D Output Q L H L L L H L L X Q

47、0 H X X Z H = High level L = Low level X = Irrelevant = Transition from low to high level Q0= The level of Q before the indicated steady-state input conditions were established Z = High impedance state FIGURE 2. Truth tables. Provided by IHSNot for ResaleNo reproduction or networking permitted witho

48、ut license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84001 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 9 DSCC FORM 2234 APR 97 Device type 01 FIGURE 3. Logic diagrams. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 84001 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 10 DSCC FORM 2234 APR 97 Device type 02 FIGURE 3. Logic diagrams - Continued. Provided by IHSNot