DLA SMD-5962-83025 REV H-2005 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED LOW-POWER SCHOTTKY TTL 4-BIT UP DOWN BINARY COUNTER MONOLITHIC SILICON《硅单片4比特二进增值 降值计数器 TTL肖脱基高级小功率双极数字微型电路》.pdf

《DLA SMD-5962-83025 REV H-2005 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED LOW-POWER SCHOTTKY TTL 4-BIT UP DOWN BINARY COUNTER MONOLITHIC SILICON《硅单片4比特二进增值 降值计数器 TTL肖脱基高级小功率双极数字微型电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-83025 REV H-2005 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED LOW-POWER SCHOTTKY TTL 4-BIT UP DOWN BINARY COUNTER MONOLITHIC SILICON《硅单片4比特二进增值 降值计数器 TTL肖脱基高级小功率双极数字微型电路》.pdf（19页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED C Convert to military drawing format. Case E inactive for new design. Change VIL, tPLH1, tPHL1, and tPLH2. Delete minimum limits from IILand propagation delays. 86-10-02 M. A. Frye D Delete fMAXand tpclock at +25C. Change fMAX(-55C and +125C). Chan

2、ge table I, IO(Q and RCO outputs) to IO(Q outputs) and (CCO outputs, all) to (CCO and RCO outputs, 02). In table I, device type 02, change propagation delay times. Figure 2, device type 01, change RCO:L to RCO:H (last two entries). Figure 2, device type 02. For Q outputs disabled and load, under U/D

3、 change the X to an H. Figure 3, change ACD to RCO . Delete footnote 2/ from table I. Editorial changes throughout. Case 2, device 01 is inactive for design. 87-06-10 M. A. Frye E Split VILinto temperatures. Add figure 5. Add footnotes to table I. Change propagation delays. Editorial changes through

4、out. Change in Table II. 88-05-16 M. A. Frye F Changes in accordance with NOR 5962-R083-92. Editorial changes throughout. -pn 92-07-06 Monica L. Poelking G Update to reflect latest changes in format and requirements. Editorial changes throughout. -les 02-07-31 Raymond Monnin H Update to reflect late

5、st changes in format and requirements. Correct paragraph in 3.5. Editorial changes throughout. les 05-07-21 Raymond Monnin THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED. CURRENT CAGE CODE 67268 REV SHET REV H H H H SHEET 15 16 17 18 REV STATUS REV H H H H H H H H H H H H H H OF SHEETS SH

6、EET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Monica L. Poelking DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Raymond Monnin COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROC

7、IRCUIT, DIGITAL, BIPOLAR, ADVANCED LOW-POWER SCHOTTKY TTL, 4-BIT UP/DOWN AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 84-03-01 BINARY COUNTER, MONOLITHIC SILICON AMSC N/A REVISION LEVEL H SIZE A CAGE CODE 14933 83025 SHEET 1 OF 18 DSCC FORM 2233 APR 97 5962-E395-05 Provided by IHS

8、Not for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 83025 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL

9、-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 83025 01 E X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 D

10、evice type. The device type identify the circuit function as follows: Device type Generic number Circuit function 01 54ALS169 Synchronous 4-bit up/down binary counter 02 54ALS569 Synchronous 4-bit up/down binary counter with three-state outputs 1.2.2 Case outlines. The case outlines are as designate

11、d in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 dual-in-line F GDFP2-F16 or CDFP3-F16 16 flat R GDIP1-T20 or CDIP2-T20 20 dual-in-line S GDFP2-F20 or CDFP3-F20 20 flat 2 CQCC1-N20 20 square chip carrier 1.2.3 Lead finish. Th

12、e lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage . -0.5 V dc minimum to +7.0 V dc maximum Input voltage range -1.5 V dc at -18 mA to +7.0 V dc Storage temperature range -65C to +150C Maximum power dissipation (PD) 1/: Device type 01 . 137.5 mW

13、Device type 02 . 176 mW Lead temperature (soldering, 10 seconds) . +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C _ 1/ Maximum power dissipation is defined as VCCx ICC, and must withstand the added PDdue to short-circuit test; e.g., IO. Provided by

14、 IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 83025 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions. Supply voltage range (VCC) .

15、 +4.5 V dc minimum to +5.5 V dc maximum Minimum high level input voltage (VIH) . 2.0 V dc Maximum low level input voltage (VIL) : VIL= +125C . 0.7 V dc VIL= +25C . 0.8 V dc VIL= -55C 0.8 V dc Case operating temperature range (TC) -55C to +125C Width of clock pulse (tpCLK) : Device type 01 20 ns mini

16、mum Device type 02 : CLK High . 20 ns minimum CLK Low . 23 ns minimum Width of asynchronous clear pulse (tpACLR ): Device type 02 20 ns minimum Setup times before clock (tsu): Data: Device type 01 20 ns minimum Device type 02 25 ns minimum Synchronous clear SCLR : Device type 02 (low) . 20 ns minimu

17、m Device type 02 (inactive) 35 ns minimum Asynchronous clear ( ACLR ): Device type 02 (inactive) . 10 ns minimum Synchronous LOAD : Device types 01, 02 (low) . 20 ns minimum Device type 02 (inactive) . 35 ns minimum ENP / ENT : Device types 01 and 02 (low) 25 ns minimum Device 01 (high) 25 ns minimu

18、m Device type 02 (high) . 35 ns minimum U/D : Device type 01 28 ns minimum Device type 02 35 ns minimum Hold time (th): Device types 01, 02 . 0 ns minimum Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 83025 DEFE

19、NSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless

20、 otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MI

21、L-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:

22、/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothin

23、g in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified here

24、in. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program p

25、lan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect th

26、e PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendi

27、x A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth tables. The truth tables shall be as specified on figure 2. 3.2.4 Counting sequences. The counting sequ

28、ences shall be as specified on figure 3. 3.2.5 Logic diagrams. The logic diagrams shall be as specified on figure 4. 3.2.6 Test circuits and switching waveforms. The test circuits and switching waveforms shall be as specified on figure 5. Provided by IHSNot for ResaleNo reproduction or networking pe

29、rmitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 83025 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 5 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteri

30、stics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking sha

31、ll be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF

32、-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be lis

33、ted as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 C

34、ertificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 V

35、erification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or ne

36、tworking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 83025 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C 1/ unless otherwise

37、 specified Group A subgroupsDevice type Limits Unit Min MaxHigh level output voltage VOH1VCC= 4.5 V, VIH= 2.0 V, IOH= -0.4 mA All outputs 2/ 1, 2, 3 01 2.5 V ILat: -55C = 0.8 V RCO and CCO 02 2.5 V VOH2 +25C = 0.8 V +125C = 0.7 V IOH= -1.0 mA Q outputs 1, 2, 3 02 2.4 V Low level output voltage VOL1

38、VCC= 4.5 V, VIH= 2.0 V, IOL= 4.0 mA All outputs 2/ 1, 2, 3 01 0.4 V ILat: -55C = 0.8 V IOL= 4.0 mA RCO and CCO 02 0.4 V VOL2 +25C = 0.8 V +125C = 0.7 V IOL= 12 mA Q outputs 1, 2, 3 02 0.4 V Input clamp voltage VIC VCC= 4.5 V IIN= -18 mA 1, 2, 3 All -1.5 V Low level input current IIL VCC= 5.5 V, VIN=

39、 0.4 V, Unused inputs = 4.5 V 1, 2, 3 All -0.2 mA High level input current IIH1 VCC= 5.5 V, VIN= 2.7 V, Unused inputs = 0.0 V 1, 2, 3 All 20 A IIH2 VCC= 5.5 V, VIN= 7.0 V, Unused inputs = 0.0 V 1, 2, 3 All 0.1 mA Output current IOVCC= 5.5 V, VOUT= 2.25 V, Q outputs 1, 2, 3 All -20 -112 mA 3/ RCO and

40、 CCO outputs 02 -15 -70 mA Off-state output current IOZLVCC= 5.5 V, VOUT= 0.4 V, Q outputs 1, 2, 3 02 -20 A IOZH VCC= 5.5 V, VOUT= 2.7 V, Q outputs 1, 2, 3 02 20 A Supply current ICC VCC= 5.5 V 1, 2, 3 01 25 mA Supply current ICCH 1, 2, 3 02 26 ICCL 02 32 mA CCZ 02 32 Functional tests See 4.3.1c 4/

41、7, 8 All See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 83025 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electr

42、ical performance characteristics Continued. Test Symbol Conditions -55C TC +125C unless otherwise specified Group A subgroupsDevice type Limits Unit Min MaxMaximum clock frequency fMAX VCC= 4.5 V to 5.5 V 9, 10, 11 01 25 MHz CL= 50 pF 02 22 Propagation delay time, tPLH1 RL = 500 9, 10, 11 01 2 15 ns

43、 CLK to Q See figures 4 and 5 5/ 02 4 21 tPHL1 9, 10, 11 01 5 20 ns 02 7 19 Propagation delay time, tPLH2 9, 10, 11 01 3 20 ns CLK to RCO 02 12 37 tPHL2 9, 10, 11 01 6 21 ns 02 10 28 Propagation delay time, tPLH3 9, 10, 11 02 5 17 ns CLK to CCO tPHL3 9, 10, 11 02 6 30 ns Propagation delay time, tPLH

44、4 9, 10, 11 01 2 14 ns ENT to RCO 02 6 21 tPHL4 9, 10, 11 01 3 24 ns 02 4 20 Propagation delay time, tPLH5 9, 10, 11 02 5 18 ns ENT to CCO tPHL5 9, 10, 11 02 9 32 ns Propagation delay time, tPLH6 9, 10, 11 02 4 18 ns ENP to CCO tPHL6 9, 10, 11 02 5 18 ns Propagation delay time, tPLH7 9, 10, 11 01 4

45、21 ns U/ D to RCO 02 9 31 tPHL7 9, 10, 11 01 5 26 ns 02 9 33 Propagation delay time, ACLR to Q tPHL8 9, 10, 11 02 9 25 ns Enable time, tPZH 9, 10, 11 02 6 23 ns G to Q tPZL 6 29 Disable time, tPHZ 9, 10, 11 02 1 12 ns G to Q tPLZ 3 29 1/ Unused inputs that do not directly control the pin under test

46、must be 2.5 V or 0.4 V. No unused input shall exceed 5.5 V or go less than 0.0 V. No input shall be floated. 2/ All outputs must be tested. In the case where only one input at VILmaximum or VIHminimum produces the proper output state, the test must be performed with each input being selected as the

47、VILmaximum or the VIHminimum input. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 83025 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 8 DSCC FORM 2234 APR 97 3/ The output condi

48、tions have been chosen to produce a current that closely approximates one half of the true short circuit output current, IOS. Not more than one output will be tested at one time and the duration of the test condition shall not exceed 1 second. 4/ Functional tests shall be conducted at input test conditions of GND VIL VOLand VOH VIH VCC. 5/ Propagation delay limits are based on single output switching. Unused inputs = 3.5 V or 0.3 V. Device types 01 01 02 02 Case outlines E, F 2 R, S 2 Terminal number Terminal symbols Terminal symbols 1 U/ D NC U/ D U/ D 2 CLK U/ D C