DLA SMD-5962-83022 REV J-2005 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED LOW-POWER SCHOTTKY TTL COUNTERS MONOLITHIC SILICON《硅单片计数器 TTL肖脱基高级小功率双极数字微型电路》.pdf

《DLA SMD-5962-83022 REV J-2005 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED LOW-POWER SCHOTTKY TTL COUNTERS MONOLITHIC SILICON《硅单片计数器 TTL肖脱基高级小功率双极数字微型电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-83022 REV J-2005 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED LOW-POWER SCHOTTKY TTL COUNTERS MONOLITHIC SILICON《硅单片计数器 TTL肖脱基高级小功率双极数字微型电路》.pdf（21页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS C Change VIL, tp(clock), fMAX, and propagation delay limits. Delete minimum limits from IILand propagation delays. Convert to military drawing format. Case E inactive for new design. 87-03-03 D. Cool D Change drawing CAGE number to 67268, Change IILcondition. Change tPLH2. Correct vendor

2、p/n. Case 2, device types 01 and 02 are inactive. 87-12-01 D. Cool E Change clock pulse and setup times. Split VILinto temperatures. Change propagation delays. Add footnotes to table I. Change footnote 1/ in 1.3 Add figure 5. Editorial changes throughout. Delete CAGE number 04713. Add CAGE numbers 1

3、8324 and 27014. Change in tpCLK, ts(device 03), IIH, ICC, fMAX, and figure 2. Change in table II. 88-05-28 D. Cool F Technical change in table I, tpLZ, device 03. Added clarification to voltage waveforms. Added a source to device type 03. Editorial changes throughout. 89-10-17 W. Heckman G Technical

4、 change in table I, I0. Change to the truth table in figure 2. Clarify the note in figure 2. Editorial changes throughout. 92-07-16 Monica L. Poelking H Update to reflect latest changes in format and requirements. Editorial changes throughout. -les 02-07-25 Raymond Monnin J Update to reflect latest

5、changes in format and requirements. Correct paragraph in 3.5. Editorial changes throughout. les 05-07-21 Raymond Monnin THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED. CURRENT CAGE CODE 67268 REV SHET REV J J J J J J SHEET 15 16 17 18 19 20 REV STATUS REV J J J J J J J J J J J J J J OF SH

6、EETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Monica L. Poelking DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY David H. Johnson COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY D. Cool MICRO

7、CIRCUIT, DIGITAL, BIPOLAR, ADVANCED LOW-POWER SCHOTTKY TTL, COUNTERS, AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 84-04-30 MONOLITHIC SILICON AMSC N/A REVISION LEVEL J SIZE A CAGE CODE 14933 83022 SHEET 1 OF 20 DSCC FORM 2233 APR 97 5962-E394-05 Provided by IHSNot for ResaleNo re

8、production or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 83022 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant,

9、 non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 83022 01 E X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type. The dev

10、ice type identify the circuit function as follows: Device type Generic number Circuit function 01 54ALS161 Synchronous 4-bit binary counter with asynchronous clear 02 54ALS163 Synchronous 4-bit binary counter with synchronous clear 03 54ALS561 Synchronous 4-bit binary counter with three-state output

11、s 1.2.2 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 dual-in-line F GDFP2-F16 or CDFP3-F16 16 flat R GDIP1-T20 or CDIP2-T20 20 dual-in-line S GDFP2-F20 or CDFP3-F20 20 flat

12、 2 CQCC1-N20 20 square chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage . -0.5 V dc minimum to +7.0 V dc maximum Input voltage range -1.5 V dc at -18 mA to +7.0 V dc Storage temperature range -65C to +150C Maxi

13、mum power dissipation (PD) 1/: Device type 01 . 115.5 mW Device type 02 . 137.5 mW Device type 03 . 209 mW Lead temperature (soldering, 10 seconds) . +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C _ 1/ Maximum power dissipation is defined as VCCx I

14、CC, and must withstand the added PDdue to short-circuit test; e.g., IO. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 83022 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 3 DSCC

15、FORM 2234 APR 97 1.4 Recommended operating conditions. Supply voltage range (VCC) . +4.5 V dc minimum to +5.5 V dc maximum Minimum high level input voltage (VIH) . 2.0 V dc Maximum low level input voltage (VIL) : VIL= +125C . 0.7 V dc VIL= +25C . 0.8 V dc VIL= -55C 0.8 V dc Width of clock pulse (tpC

16、LK) : Device types 01 and 02 . 20 ns minimum Device type 03 : High . 20 ns minimum Low 25 ns minimum Width of asynchronous clear pulse (tpACLR ), tpCLR : Device types 01, and 03 20 ns minimum Width of asynchronous load pulse (tpALOAD ): Device type 03 20 ns minimum Setup times before clock: Data: De

17、vice types 01 and 02 . 20 ns minimum Device type 03 . 25 ns minimum Synchronous CLR ; SCLR Low: Device type 02 . 20 ns minimum Device type 03 . 21 ns minimum Inactive: Device type 02 . 20 ns minimum Device type 03 . 35 ns minimum Asynchronous CLR , ACLR Inactive: Device types 01 and 03 . 10 ns minim

18、um Asynchronous ALOAD : Inactive: Device type 03 . 12 ns minimum Synchronous LOAD : Device types 01 and 02 . 20 ns minimum Low: Device type 03 . 20 ns minimum Inactive: Device type 03 . 35 ns minimum ENP/ENT: Low: Device types 01 and 03 . 25 ns minimum Device type 02 . 20 ns minimum High: Device typ

19、es 01 and 03 . 25 ns minimum Hold times (th): Device types 01, 02, and 03 . 0 ns minimum Case operating temperature range (TC) -55C to +125C Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 83022 DEFENSE SUPPLY CEN

20、TER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise spe

21、cified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - I

22、nterface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.d

23、la.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this docu

24、ment, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product bu

25、ilt to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualif

26、ying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as descr

27、ibed herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein

28、. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth tables. The truth tables shall be as specified on figure 2. 3.2.4 Logic diagrams. The logic diagrams shall be as spec

29、ified on figure 3. 3.2.5 Counting sequences. The counting sequences shall be as specified on figure 4. 3.2.6 Test circuits and switching waveforms. The test circuits and switching waveforms shall be as specified on figure 5. Provided by IHSNot for ResaleNo reproduction or networking permitted withou

30、t license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 83022 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 5 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as s

31、pecified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accor

32、dance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, append

33、ix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an appr

34、oved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of

35、conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification an

36、d review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permi

37、tted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 83022 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. 1/ Test Symbol Conditions -55C TC +125C unless otherwise specified Gro

38、up A subgroupsDevice type Limits Unit Min MaxHigh level output voltage VOH1VCC= 4.5 V, VIH= 2.0 V, IOH= -0.4 mA 2/ 1, 2, 3 01, 02 2.5 V ILat: -55C = 0.8 V IOH= -0.4 mA RCO and CCO 03 2.5 V VOH2 +25C = 0.8 V +125C = 0.7 V IOH= -1.0 mA Q outputs 03 2.4 V Low level output voltage VOL1 VCC= 4.5 V, VIH=

39、2.0 V, IOL= 4.0 mA All outputs 2/ 01, 02 0.4 V ILat: -55C = 0.8 V IOL= 4.0 mA RCO and CCO 03 0.4 V VOL2 +25C = 0.8 V +125C = 0.7 V IOL= 12 mA Q outputs 03 0.4 V Input clamp voltage VIC VCC= 4.5 V IIN= -18 mA All -1.5 V Low level input current IIL VCC= 5.5 V, VIN= 0.4 V, unused inputs = 4.5 V All -0.

40、2 mA High level input current VCC= 5.5 V, VIN= 2.7 V, LOAD , CLK, ENT 01, 02 20 A IIH1 unused inputs = 0.0 V ENT/ENP 03 40 A All other inputs All 20 A VCC= 5.5 V, VIN= 7.0 V, LOAD , CLK, ENT 01, 02 0.1 mA IIH2 unused inputs = 0.0 V ENT/ENP 03 0.2 mA All other inputs All 0.1 mA Output current IOVCC=

41、5.5 V, VOUT= 2.25 V, Q outputs All -20 -112 mA 3/ RCO and CCO outputs 03 -15 -100 mA Off-state output current IOZLVCC= 5.5 V, VOUT= 0.4 V, Q outputs 03 -20 A IOZH VCC= 5.5 V, VOUT= 2.7 V, 03 20 A See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted with

42、out license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 83022 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. 1/ Test Symbol Conditions -55C TC +125C unless otherwise specified Gr

43、oup A subgroupsDevice type Limits Unit Min MaxICCVCC= 5.5 V 1, 2, 3 01 21 mA Supply current 02 25 CCH 03 35 mA CCL 38 ICCZ 36 Functional tests See 4.3.1c 4/ 7, 8 All Maximum input clock or VCC= 4.5 V to 5.5 V 9, 10, 11 01 25 MHz count up frequency fMAX CL= 50 pF 02 35 RL = 500 03 20 Propagation dela

44、y time, tPLH1 See figures 4 and 5 5/ 01 4 15 ns CLK to Q 02 4 21 03 15 01 6 20 ns tPHL1 02 25 03 5 21 Propagation delay time, tPLH2 01 24 ns CLK to RCO 02, 03 5 35 01 20 ns tPHL2 02 5 26 03 8 29 Propagation delay time, tPLH3 03 8 35 ns CLK to CCO tPHL3 03 5 20 Propagation delay time, tPLH403 10 38 n

45、s ALOAD to Q tPHL4 03 7 27 Propagation delay time, tPLH5 03 15 55 ns ALOAD to RCO tPHL5 03 12 35 Propagation delay time, tPLH6 03 25 65 ns ALOAD to CCO tPHL6 03 12 42 Propagation delay time, tPLH7 03 8 35 ns DATA to Q tPHL7 03 7 29 tPLH801 3 13 ns Propagation delay time, 02 3 20 ENT to RCO 03 5 20 P

46、HL8 01 3 13 ns 02 3 16 03 4 18 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 83022 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 8 DSCC FORM 2234

47、APR 97 TABLE I. Electrical performance characteristics Continued. 1/ Test Symbol Conditions -55C TC +125C unless otherwise specified Group A subgroupsDevice type Limits Unit Min MaxPropagation delay time, tPLH9 VCC= 4.5 V to 5.5 V 9, 10, 11 03 12 35 ns ENT to CCO tPHL9 CL= 50 pF 03 4 25 Propagation

48、delay time, tPLH10 RL = 500 03 5 22 ns ENP to CCO tPHL10 See figures 4 and 5 5/ 03 4 14 Propagation delay time, tPHL11 01 8 24 ns CLR to Q 03 7 28 Propagation delay time, CLR to RCO tPHL12 01 11 24.5 ns Output enable time, tPZH 03 5 24 ns G to Q tPZL 03 8 28 Output disable time, tPHZ 03 2 15 ns G to Q tPLZ 03 2 20 1/ Unused inputs that do not directly control the pin under test must be 2.5 V or 0.4 V. No unused input shall exceed 5.5 V or go less than 0.0 V. No input shall be floated. 2/ All outputs must be tested. In the case where only one input at VILmaximum or VIHm