DLA SMD-5962-82010 REV H-2010 MICROCIRCUIT MEMORY DIGITAL NMOS 65 536 x 1 BIT DYNAMIC RAM MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Added vendor CAGE 01295 with device types 04 - 07 complete revision. 83-10-07 N. A. Hauck B Added vendor CAGE 34335 to device types 01, 02, 03, 06, and 07. Added device types 08, 09, 10. Device types 04 and 05 not available from an approved sourc

2、e. Inactivated device types 01, 02, and 03 for DIP package for new design. 86-01-20 N. A. Hauck C Change limits of tOFF and tRMW. Editorial changes throughout. 86-05-23 R. P. Evans D Added vendor CAGE 6Y440 with device types 04 and 05. Changed to military drawing format. 87-04-28 N. A. Hauck E Chang

3、es in accordance with NOR 5962-R157-96. 96-06-26 M. A. Frye F Updated boilerplate. Added provisions for the supply of QD certified parts to the drawing. Added CAGE 3V146 to drawing. - glg 00-12-22 Raymond Monnin G Correction to marking paragraph 3.5, updated boilerplate paragraphs. ksr 05-03-02 Raym

4、ond Monnin H Boilerplate update, part of 5 year review. ksr 10-11-17 Charles F. Saffle THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED. CURRENT CAGE CODE IS 67268. REV SHEET H H H H REV 15 16 17 18 SHEET REV STATUS REV H H H H H H H H H H H H H H OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12

5、13 14 PMIC N/A PREPARED BY Darrell Hill DLA LAND AND MARITIME STANDARD MICROCIRCUIT DRAWING CHECKED BY C. R. Jackson COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY All DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A APPROVED BY William E. Shoup M

6、ICROCIRCUIT, MEMORY, DIGITAL, NMOS, 65,536 x 1 BIT DYNAMIC RAM, MONOLITHIC SILICON DRAWING APPROVAL DATE 82-05-28 REVISION LEVEL H SIZE A CAGE CODE 1493382010 SHEET 1 OF 18 DSCC FORM 2233 APR 97 5962-E070-11 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IH

7、S-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 82010 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-385

8、35, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN shall be as shown in the following example: 82010 01 E X | | | | | | | | | | | | Drawing number Device type Case outline Lead finish (see 1.2.1) (see 1.2.2) (see 1.2.3) 1.2.1 Device types. The device types shall identify the circ

9、uit functions as follows: Device type Generic number 1/ Circuit Access time Refresh 01 65,536 X 1-bit RAM 150 ns 128 cycles (1 ms) 02 65,536 X 1-bit RAM 150 ns 128 cycles (2 ms) 03 65,536 X 1-bit RAM 200 ns 128 cycles (2 ms) 04 65,536 X 1-bit RAM 150 ns 256 cycles (4 ms) 05 65,536 X 1-bit RAM 200 ns

10、 256 cycles (4 ms) 06 65,536 X 1-bit RAM 150 ns 256 cycles (4 ms) 07 65,536 X 1-bit RAM 200 ns 256 cycles (4 ms) 08 65,536 X 1-bit RAM 120 ns 256 cycles (4 ms) 09 65,536 X 1-bit RAM 150 ns 128 cycles (2 ms) 10 65,536 X 1-bit RAM 200 ns 128 cycles (2 ms) 1.2.2 Case outlines. The case outlines shall b

11、e as designated in MIL-STD-1835, and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 dual-in-line package Z CQCC3-N18 18 rectangular chip carrier package 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolut

12、e maximum ratings. Supply voltage range . -1.5 to +7.0 V dc Storage temperature range -65C to +150C Maximum power dissipation (PD) (minimum cycle time) . 1.0 W Lead temperature (soldering, 5 seconds) +270C Thermal resistance, junction-to-case (JC): . See MIL-STD-1835 Junction temperature (TJ)- . +15

13、0C Short circuit output current . 150 mA 1/ Generic numbers are listed on the Standard Microcircuit Drawing Source Approval Bulletin at the end of this document and will also be listed in MIL-HDBK-103 and QML-38535, as applicable (see 6.6 herein). Provided by IHSNot for ResaleNo reproduction or netw

14、orking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 82010 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions. Supply voltage . 4.5 V dc to 5.5 V dc Maximum low-level input voltage (VIL): D

15、evice types 01, 02, and 03 -1.5 V dc to 0.8 V dc Device types 04, 05, 06, 07, and 08 -0.6 V dc to 0.8 V dc Device types 09 and 10 . -1.0 V dc to 0.8 V dc Maximum high-level input voltage (VIH): Device types 01, 02, and 03 2.4 V dc to 6.5 V dc Device types 04, 05, 06, 07, and 08 2.4 V dc to 5.8 V dc

16、Device types 09 and 10 . 2.4 V dc to VCC+1.0 V dc Refresh cycle time: Device type 01 . 1.0 ms Device types 02, 03, 09, and 10 2.0 ms Device types 04, 05, 06, 07, and 08 4.0 ms Case operating temperature range: Device types 01, 02, 03, 06, 07, 08, 09, and 10 . -55C to +110C Device types 04 and 05 . -

17、55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation

18、or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENS

19、E HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia,

20、 PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing shall take precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been ob

21、tained. 3. REQUIREMENTS 3.1 Item requirements The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and quali

22、fied manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Qualit

23、y Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. This drawing has been modified to a

24、llow the manufacturer to use the alternate die/fabrication requirements of paragraph A.3.2.2 of MIL-PRF-38535 or alternative approved by the Qualifying Activity. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 820

25、10 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 4 DSCC FORM 2234 APR 97 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Terminal connections. The termin

26、al connections shall be as specified on figure 1. 3.2.2 Truth table. The truth table shall be as specified on figure 2. 3.2.3 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical perfo

27、rmance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Mar

28、king. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in comp

29、liance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. For product built in accordance with A.3.2.2 of MIL-PRF-38535 the “D” certification mark shall be

30、used in place of the “C“ certification mark. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime-VA pr

31、ior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with eac

32、h lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritimes agent and the acquiring activity ret

33、ain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535,

34、appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test (method 1015 of MIL-STD-883). (1) Test condition D or E. The test

35、 circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or procuring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent spec

36、ified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. Provided by IHSNot for ResaleNo reprod

37、uction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 82010 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. | | Conditions | Group A | Device | Limits | Test |Sy

38、mbol | -55C TC +110C, 1/ | subgroups | type | Min | Max |Unit | | unless otherwise specified | | | | | | | | | | | | High-level output |VOH|VDD= 5 V, VIN= 0 or VDD| 1, 2, 3 | All | 2.4 | | V voltage | |IOH= -5 mA | | | | | | | | | | | | Low-level output |VOL|VDD= 5 V, VIN= 0 or VDD| 1, 2, 3 | All |

39、| 0.4 | V voltage | |IOL= 4.2 mA | | | | | | | | | | | | Supply current, |IDD1|VDD= 5 V, CAS = RAS = VIH| 1, 2, 3 | All | | 5 | mA standby | | DOUT= High Z | | | | | | | | | | | | Supply current, |IDD2|VDD= 5 V, RAS and CAS cycling | 1, 2, 3 |01,02,03, | | 60 | mA operating | | tCYC= tRCmin | |04,05

40、,06, | | | | 2/ | | |07,08,09 | | | | | | | 10 | | 55 | Supply current, |IDD3|VDD= 5 V, RAS = cycling, | 1, 2, 3 |01,02,03, | | 45 | mA RAS only cycle | | tCYC= tRCmin, CAS = VIH| |04,05,06, | | | | | | |07,08,09 | | | | | | | 10 | | 40 | Supply current, |IDD4|RAS = VIL, CAS cycling | 1, 2, 3 | 09 |

41、 | 45 | mA PAGE mode | | tpc= min | | 10 | | 40 | | | | | | | | High-level input |IIH|VDD= 5 V, VIN= 5.0 V | 1, 2, 3 | All | | 10 | A leakage current | | | | | | | | | | | | | | Low-level input |IIL|VDD= 5 V, VIN= 0.8 V | 1, 2, 3 | All | | -10 | A leakage current | | | | | | | | | | | | | | | | | |

42、| | | High-level output |IOH|VDD= 5 V, VOUT= 5.5 V | 1, 2, 3 | All | | 10 | A leakage current | |RAS = CAS = VIH| | | | | | | | | | | | | | | | | | | Low-level output |IOL|VDD= 5 V, VOUT= GND | 1, 2, 3 | All | | -10 | A leakage current | |RAS = CAS = VIH| | | | | | | | | | | | | | | |01,02,03, | | |

43、 Input capacitance |C1 3/ |TC= +25C | 4 |09,10 | | 5 | (A0- A7) | | | |04,05, | | 7 | pF | | | |06,07,08 | | | | | | | | | | Input capacitance |C23/ |TC= +25C | 4 |01,02,03, | | 10 | pF ( RAS , CAS , DIN, | | | |04,05,06, | | | WE ) | | | |07,08 | | | | | | |09,10 | | 7 | See footnotes at end of tab

44、le. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 82010 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued.

45、 | | Conditions | Group A | Device | Limits | Test |Symbol | -55C TC +110C, 1/ | subgroups | type | Min | Max |Unit | | unless otherwise specified | | | | | Output capacitance (RAS) |COUT|TC= +25C | 4 |01,02,03, | | 8 | pF | 3/ | | |04,05,06, | | | | | |07,08 | | | | | | |09,10 | | 6 | | | | |01,02

46、| | | Access time from RAS |tRAC| See figure 3 | 9, 10, 11 |04,06,09 | | 150 | ns | 4/ 5/ | | |03,05, | | 200 | | | | |07,10 | | | | | | | 08 | | 120 | | | | |04,06,10 | | 100 | Access time from |tCAC| See figure 3 | 9, 10, 11 |01,02 | | 90 | ns CAS | 3/ 4/ 5/ | | | 03 | | 120 | | | | |05,07 | | 135

47、 | | | | | 08 | | 70 | | | | | 09 | | 75 | Time between |tREF| See figure 3 | 9, 10, 11 | 01 | | 1.0 | ms refresh | | | |02,03,09,10 | | 2.0 | | | | |04, 05, | | 4.0 | | | | |06,07,08 | | | | | | | 04 | 160 | | RAS precharge |tRP| See figure 3 | 9, 10, 11 |01,02,06,09 | 100 | | ns time | | | | 03 |

48、135 | | | | | | 05 | 200 | | | | | | 07,10 | 120 | | | | | 08 | 80 | | CAS precharge time |tCPN| | 9, 10, 11 | 09 | 30 | | ns (nonpage cycles) | | | | 10 | 35 | | CAS to RAS pre- |tCRP| See figure 3 | 9, 10, 11 | All | 0 | | ns charge time | | | | | | | | | | | 04 | 20 | 50 | RAS to CAS delay |tRCD| See figure 3 | 9, 10, 11 | 01,02,06 | 30 | 60 | ns time | | | | 03,07 | 35 | 80 | | | | | 05 | 25 | 65 | | | | | 08 | 15 | 50 | | | | | 09 | 30 | 75 | | | | | 10 | 35