DLA SMD-5962-12208 REV A-2013 MICROCIRCUIT CMOS LINEAR ANALOG MULTIPLEXER 8 CHANNEL +3 3 TO +5 VOLT MONOLITHIC SILICON.pdf
《DLA SMD-5962-12208 REV A-2013 MICROCIRCUIT CMOS LINEAR ANALOG MULTIPLEXER 8 CHANNEL +3 3 TO +5 VOLT MONOLITHIC SILICON.pdf》由会员分享,可在线阅读,更多相关《DLA SMD-5962-12208 REV A-2013 MICROCIRCUIT CMOS LINEAR ANALOG MULTIPLEXER 8 CHANNEL +3 3 TO +5 VOLT MONOLITHIC SILICON.pdf(20页珍藏版)》请在麦多课文档分享上搜索。
1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Table I: Corrected the max limit for the test +ICC,changed from “300 A“ to “800 A“. Table I: Added additional test conditions for the Switch ON resistance test. Updated footnotes in section 1.5. Made clarifications to table IIIA and table IV. Upd
2、ated section 4.3.5. -sld 13-10-01 Charles F. Saffle REV SHEET REV A A A A A SHEET 15 16 17 18 19 REV STATUS REV A A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Steve L. Duncan DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.
3、dla.mil/ STANDARD MICROCIRCUIT DRAWING CHECKED BY Greg Cecil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A APPROVED BY Charles F. Saffle MICROCIRCUIT, CMOS, LINEAR, ANALOG MULTIPLEXER, 8 CHANNEL, +3.3 TO +5 VOLT, MONOLITHIC SILICON DRAWING AP
4、PROVAL DATE 13-03-27 REVISION LEVEL A SIZE A CAGE CODE 67268 5962-12208 SHEET 1 OF 19 DSCC FORM 2233 APR 97 5962-E573-13Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-12208 DLA LAND AND MARITIME COLUMBUS, OH
5、IO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents five product assurance classes as defined in paragraph 1.2.3 and MIL-PRF-38534. A choice of case outlines and lead finishes which are available and are reflected in the Part or Identifying Number
6、(PIN). When available, a choice of radiation hardness assurance levels are reflected in the PIN. 1.2 PIN. The PIN shall be as shown in the following example: 5962 H 12208 01 K X C Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2)
7、designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 Radiation hardness assurance (RHA) designator. RHA marked devices shall meet the MIL-PRF-38534 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device typ
8、e(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 RHD5928 Analog multiplexer, 8 channel 02 RHD5929 Analog voltage multiplexer, buffered, 8 channel 03 RHD5927 Analog multiplexer, sample-and-hold, 8 channel 1.2.3 Device class designator.
9、This device class designator shall be a single letter identifying the product assurance level. All levels are defined by the requirements of MIL-PRF-38534 and require QML Certification as well as qualification (Class H, K, and E) or QML Listing (Class G and D). The product assurance levels are as fo
10、llows: Device class Device performance documentation K Highest reliability class available. This level is intended for use in space applications. H Standard military quality class level. This level is intended for use in applications where non-space high reliability devices are required. G Reduced t
11、esting version of the standard military quality class. This level uses the Class H screening and In-Process Inspections with a possible limited temperature range, manufacturer specified incoming flow, and the manufacturer guarantees (but may not test) periodic and conformance inspections (Group A, B
12、, C, and D). E Designates devices which are based upon one of the other classes (K, H, or G) with exception(s) taken to the requirements of that class. These exception(s) must be specified in the device acquisition document; therefore the acquisition document should be reviewed to ensure that the ex
13、ception(s) taken will not adversely affect system performance. D Manufacturer specified quality class. Quality level is defined by the manufacturers internal, QML certified flow. This product may have a limited temperature range. Provided by IHSNot for ResaleNo reproduction or networking permitted w
14、ithout license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-12208 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designato
15、r Terminals Package style X See figure 1 16 Flat package with formed leads 1.2.5 Lead finish. The lead finish shall be as specified in MIL-PRF-38534. 1.3 Absolute maximum ratings. 1/ Supply voltage (VCC) +7.0 V dc Digital input overvoltage range: VEN , VA (device types 01 and 02) . ( GND - .4)V VSH
16、VA (device type 03) . ( GND - .4)V Analog input overvoltage range . ( GND - .4)V Power dissipation (PD): Device types 01, 02, and 03 . 200 mW Thermal resistance junction-to-case (JC) 5 C/W Storage temperature -65C to +150C Lead temperature (soldering, 10 seconds) +300C 1.4 Recommended operating cond
17、itions. Supply voltage range (VCC) . +3.0 V to +5.5 V dc Logic low level voltage : VEN,VA (device types 01 and 02) 0.3 VCCVSH,VA (device type 03) . 0.3 VCC Logic high level voltage: VEN,VA (device types 01 and 02) 0.7 VCCVSH,VA (device type 03) . 0.7 VCC Case operating temperature range (TC). -55C t
18、o +125C 1.5 Radiation features. 2/ Maximum Total Ionizing Dose (TID) (dose rate = 50 - 300 rad(Si)/s): In accordance with MIL-STD-883, method 1019, condition A. 1 Mrad(Si) Enhanced Low Dose Rate Sensitivity (ELDRS) . 3/ Single Event Latchup (SEL) . 100 MeV-cm2/mg 4/ Neutron Displacement Damage ( 1 x
19、 1014 neutrons/cm2) 3/ 1/ Stresses above the absolute maximum ratings may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ See section 4.3.5 for the manufacturers radiation hardness assurance analysis and testing. 3/ No
20、t tested, Immune by 100 percent CMOS technology. 4/ Single Event Latchup (SEL) immunity is accomplished by double, fully enclosing, guard rings in the CMOS design layout. The guard rings eliminate the parasitic pnpn structure that is responsible for latchup in CMOS circuits. This limit is guaranteed
21、 by design or process, but not tested. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-12208 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUME
22、NTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFEN
23、SE SPECIFICATIONS MIL-PRF-38534 - Hybrid Microcircuits, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard M
24、icrocircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/quicksearch.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a
- 1.请仔细阅读文档,确保文档完整性,对于不预览、不比对内容而直接下载带来的问题本站不予受理。
- 2.下载的文档,不会出现我们的网址水印。
- 3、该文档所得收入(下载+内容+预览)归上传者、原创作者;如果您是本文档原作者,请点此认领!既往收益都归您。
下载文档到电脑,查找使用更方便
10000 积分 0人已下载
下载 | 加入VIP,交流精品资源 |
- 配套讲稿:
如PPT文件的首页显示word图标,表示该PPT已包含配套word讲稿。双击word图标可打开word文档。
- 特殊限制:
部分文档作品中含有的国旗、国徽等图片,仅作为作品整体效果示例展示,禁止商用。设计者仅对作品中独创性部分享有著作权。
- 关 键 词:
- DLASMD596212208REVA2013MICROCIRCUITCMOSLINEARANALOGMULTIPLEXER8CHANNEL33TO5VOLTMONOLITHICSILICONPDF

链接地址:http://www.mydoc123.com/p-698515.html