DLA SMD-5962-11237 REV A-2012 MICROCIRCUIT MEMORY DIGITAL CMOS 512K X 32-BIT (16M) WITH EMBEDDED EDAC LOW VOLTAGE SRAM MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add new footnote 5/ to tAVQV1 resulting in changes to the rest of the footnote sequence in Table IA. Removed erroneous footnote from tAVET parameter in Table IA. Changed footnotes 5/ through 8/ to be 6/ through 9/ and added new footnote 5/ at the

2、 end of Table IA. lhl 12-05-01 Charles F. Saffle REV SHEET REV A A A A A A A A A A A A SHEET 15 16 17 18 19 20 21 22 23 24 25 26 REV STATUS REV A A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Laura H. Leeper DLA LAND AND MARITIME COLUMBUS, OHIO 43218

3、-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Rajesh Pithadia THIS DRAWING IS AVAILABLE FOR USE BY All DEPARTMENTS APPROVED BY Charles F. Saffle MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 512K X 32-BIT (16M) WITH EMBEDDED EDAC, LOW VOLTAGE SRAM, MONOLITHIC SILICON AND AG

4、ENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 12-03-21 AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-11237 SHEET 1 OF 26 DSCC FORM 2233 APR 97 5962-E328-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAW

5、ING SIZE A 5962-11237 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice

6、of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN shall be as shown in the following example: 5962 - 11237 01 V X C Federal RHA D

7、evice Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices shall meet the MIL-PRF-38535 specified RHA levels and are marke

8、d with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535 appendix A specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device types. The device types shall identify the circuit function as

9、follows: Device type Generic number Circuit function Access time 01 SMV512K32 512K X 32-bit CMOS SRAM 20 ns 1.2.3 Device class designator. The device class designator shall be a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor

10、self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q, V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) shall be as designated in MIL-STD-1835 and as follows: O

11、utline letter Descriptive designator Terminals Package style X See figure 1 76 Flat pack 1.2.5 Lead finish. The lead finish shall be as specified in MIL-PRF-38535 for classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted

12、 without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-11237 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ Supply voltage range, (VDD1) . -0.3 V dc to +2.0 V dc Supply voltage range, (VDD2) . -0.3 V

13、 dc to +3.8 V dc Voltage range on any pin . -0.3 V dc to +3.8 V dc Storage temperature range, (TSTG) -65C to +150C Power dissipation, (PD) 1.2 W Junction temperature, (TJ) . +150C Input current, dc (II) + 5 mA Thermal resistance, junction-to-case, (JC): Case X +5C/W 1.4 Recommended operating conditi

14、ons. 1/ Supply voltage range, (VDD1) . +1.7 V dc to +1.9 V dc Supply voltage range, (VDD2) . +3.0 V dc to +3.6 V dc Supply voltage, (VSS) . 0 V dc Operating case temperature range, (TC) -55C to +125C Input voltage, dc 0 V dc to VDD2 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, an

15、d handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Cir

16、cuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780

17、 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) for

18、m a part of this document to the extent specified herein. Unless otherwise specified, the issues of the documents are the issues of the documents cited in the solicitation. JEDEC INTERNATIONAL (JEDEC) JEDEC Standard No. 78 - IC Latch-Up Test. (Copies of this document are available online at www.jede

19、c.org/ or from JEDEC Solid State Technology Association, 3103 North 10th Street, Suite 240-S, Arlington, VA 22201). (Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These documents also may be available in or thr

20、ough libraries or other informational services.) _ 1/ Over operating free-air temperature range (unless otherwise noted). 2/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. P

21、rovided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-11237 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 2.3 Order of precedence. In the event of a conflict between

22、the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements fo

23、r device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein, or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for d

24、evice class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q a

25、nd V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Truth table(s). The truth table(s) shall be

26、 as specified on figure 3. 3.2.4 Timing waveform(s). The timing waveform(s) shall be as specified on figures 4 through 17. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiatio

27、n parameter limits are as specified in table IA and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table IA. 3.5 Markin

28、g. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA pr

29、oduct using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device cl

30、asses Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufac

31、turer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to

32、DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7

33、Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device cl

34、ass M, notification to DLA Land and Maritime-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DLA Land and Maritime, DLA Land and Maritimes age

35、nt, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by

36、this drawing shall be in microcircuit group number 41 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-11237 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SH

37、EET 5 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C VDD1 = 1.7 V to 1.9 V VDD2 = 3.0 V to 3.6 V Group A subgroups Device type Limits Unit unless otherwise specified Min Max High-level input voltage VIH 1, 2, 3 All 0.7 x VDD2 V Low-level

38、input voltage VIL 1, 2, 3 All 0.3 x VDD2 High-level output voltage VOH IOH = -4mA, VDD2 = VDD2 (min) 1, 2, 3 All 0.8 x VDD2 Low-level output voltage VOL IOL = 4 mA, VDD2 = VDD2 (min) 1,2,3 All 0.2 x VDD2 Input capacitance CIN 1/ CIN f = 1 MHz at 0 V See 4.4.1e 4 All 2 pF Bidirectional I/O capacitanc

39、e 1/ CIO 4 All 2.5 Input leakage current IIN VlN = VDD2 and VSS 1,2,3 All -500 500 nA Three state output leakage current IOZ VO = VDD2 and VSS, VDD2 = VDD2 (max); GZ =VDD2 (max) 1,2,3 All -500 500 Short-circuit output current 2/ 3/ IOS VDD2 = VDD2 (max), VO = VDD2 VDD2 = VDD2 (max), VO = VSS 1,2,3 A

40、ll -46 46 mA Supply current operating 1 MHz (Write) IDD1(OP1) Inputs: VIL = VSS + 0.2 V VIH = VDD2 0.2 V, IOUT = 0 A, VDD1 = VDD1 (max), VDD2 = VDD2 (max) 1,3 All 18 2 31 Supply current operating 1 MHz (Read) 1,3 13 2 27 Supply current operating 50.0 MHz (Write) IDD1(OP2) 1, 3 All 635 2 460 Supply c

41、urrent operating 50.0 MHz (Read) 1, 3 365 2 315 Supply current operating 1 MHz (Write) IDD2(OP1) 1, 2, 3 All 255 A Supply current operating 1 MHz (Read) 1, 3 All 5.2 mA 2 5.1 Supply current operating 50.0 MHz (Write) IDD2(OP2) 1, 3 All 5.9 2 1.2 See footnotes at end of table. Provided by IHSNot for

42、ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-11237 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics Continued. Test Symbol Conditions

43、 -55C TC +125C VDD1 = 1.7 V to 1.9 V VDD2 = 3.0 V to 3.6 V Group A subgroups Device type Limits Unit unless otherwise specified Min Max Supply current operating 50.0 MHz (Read) IDD2(OP2) 1, 3 All 275 mA 2 120 Supply current standby 0 MHz 4/ IDD1(SB) CMOS inputs, IOUT = 0 A E1Z = VDD2 - 0.2 V, E2 = G

44、ND, VDD1 = VDD1(max), VDD2 = VDD2(max) 1, 3 All 0.375 mA 2 17 IDD2(SB) 1, 3 330 A 2 330 Supply current standby A(18:0) 50.0 MHz IDD1(SB) 1, 3 All 4.4 mA 2 2.1 IDD2(SB) 1, 3 1.6 mA 2 0.8 Functional test See 4.4.1c 7, 8A, 8B All AC Characteristics Read Cycle Read cycle time tAVAV1 See figure 4 9, 10,

45、11 All 20 ns Address to data valid from address change 5/ tAVQV1 9, 10, 11 All 20 Output hold time tAXQX 9, 10, 11 All 7.5 GZ-controlled output enable time tGLQX1 See figure 6 9, 10, 11 All 3.5 GZ-controlled output data valid tGLQV 9, 10, 11 All 8.6 GZ-controlled output enable tri-state time tGHQZ1

46、9, 10, 11 All 3.5 5 E-controlled output enable time tETQX See figure 5 9, 10, 11 All 3.5 E-controlled access time tETQV 9, 10, 11 All 20 E-controlled tri-state time tETQZ 9, 10, 11 All 3.5 5 Address to error flag valid tAVMV See figure 4 9, 10, 11 All 20 Address to error flag hold time from address

47、change tAXMX 9, 10, 11 All 7.5 GZ-controlled error flag valid tGLMV See figure 6 9, 10, 11 All 8.6 GZ-controlled error flag enable time tGLMX 9, 10, 11 All 3.5 E-controlled error enable time tETMX See figure 5 9, 10, 11 All 3.5 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduct

48、ion or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-11237 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics Continued. Test Symbol Conditions -55C TC +125C VDD1 = 1.7 V to 1.9 V VDD2 = 3.0 V to 3.6 V Group A subgroups Device type Limits Unit unless otherwise specified Min Max AC Characteristics Read Cycle Continued