DLA SMD-5962-07226 REV D-2012 MICROCIRCUIT DIGITAL-LINEAR CMOS 12 BIT DIGITAL-TO-ANALOG CONVERTER MONOLITHIC SILICON.pdf
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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add a SCLK frequency test under Table I. - ro 09-07-22 C. SAFFLE B Under paragraph 1.5, footnote 8/, delete the effective dose rate of “0.16 rad(Si)/s” and substitute “0.027 rad(Si)/s”. Add supply current limits to Table IIB. - ro 10-05-06 C. SAF
2、FLE C Under Table IA, make correction to full scale output test by moving all limits from the maximum column to the minimum limit column. Make change to footnote 1/ under Table IIB. - ro 10-06-23 C. SAFFLE D Add device type 02. - ro 12-05-08 C. SAFFLE REV SHEET REV D D D D SHEET 15 16 17 18 REV STAT
3、US REV D D D D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY RICK OFFICER DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF T
4、HE DEPARTMENT OF DEFENSE CHECKED BY RAJESH PITHADIA APPROVED BY ROBERT M. HEBER MICROCIRCUIT, DIGITAL-LINEAR, CMOS, 12 BIT, DIGITAL-TO-ANALOG CONVERTER, MONOLITHIC SILICON DRAWING APPROVAL DATE 09-02-12 AMSC N/A REVISION LEVEL D SIZE A CAGE CODE 67268 5962-07226 SHEET 1 OF 18 DSCC FORM 2233 APR 97 5
5、962-E283-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-07226 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two
6、product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance
7、 (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 R 07226 01 V Z A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing numbe
8、r 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designat
9、or. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 DAC121S101 12 bit digital-to-analog converter 02 DAC121S101 12 bit digital-to-analog converter 1.2.3 Device class designator. T
10、he device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A
11、 Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style Z GDFP1-G10 10 Flat pack with gullwing leads 1.2.5 Lead finish. The lead finish is as sp
12、ecified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-07226 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVIS
13、ION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ Supply voltage (VA) . +6.5 V Voltage on any input pin . -0.3 V to ( VA+ 0.3 V ) Input current at any pin . 10 mA 3/ Maximum output current . 10 mA 4/ VOUTpin in powerdown (PD) mode 1.0 mA Package input current . 20 mA 3/ P
14、ower dissipation (PD) at TA= +25C See footnote 5/ Maximum junction temperature (TJ) +175C Lead temperature (soldering, 10 seconds) +260C Storage temperature range . -65C to +150C Electrostatic discharge (ESD) tolerance . 4,000 V 6/ Thermal resistance, junction-to-case (JC) . 25.7C/W Thermal resistan
15、ce, junction-to-ambient (JA) 214C/W (still air) _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise specified, all voltages are measured with respect to
16、GND = 0 V. 3/ When the input voltage at any pin exceeds the power supplies ( less than GND or greater than VA), the current at that pin should be limited to 10 mA. The 20 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current
17、 of 10 mA to two. 4/ Maximum output current may not exceed 10 mA. At VDD= 5.5 V, the minimum external resistive load can be no less than 550 , (360 at VDD= 3.6 V). 5/ The absolute maximum junction temperature ( TJmax ) for this device is 175C. The maximum power dissipation is dictated by TJMAX, the
18、junction to ambient thermal resistance ( JA), and the ambient temperature( TA) and can be calculated using the formula PDmax = (TJMAX- TA) / JA. The values for maximum power dissipation will be reached only when the device is operated in a severe fault condition (for example, when input or output pi
19、ns are driven beyond the power supply voltages, or the power supply polarity is reversed). These conditions should be avoided. 6/ Human body model (HBM) is 100 pF capacitor discharged through a 1.5 k resistor. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from
20、IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-07226 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions. 1/ 2/ Supply voltage range (VA) +2.7 V to +5.5 V Any input voltage -0.1 V to ( VA+ 0.1 V ) 7/ Output load capac
21、itance . 0 to 1500 pF Select clock (SCLK) frequency . Up to 20 MHz Ambient operating temperature (TA) . -55C to +125C 1.5 Radiation features. Maximum total dose available (dose rate = 50 300 rads(Si)/s): Device type 01 . 100 krads(Si) 8/ Maximum total dose available (dose rate = 10 mrads(Si)/s): Dev
22、ice type 02 . 100 krads(Si) 9/ No single event latch-up (SEL) occurs at effective LET (see 4.4.4.2) . 120 MeV/(mg/cm2) 10/ _ 7/ The analog inputs are protected as shown below. Input voltage magnitudes up to VA+ 300 mV or to 300 mV below GND will not damage this device. However, errors in the convers
23、ion result can occur if any input goes above VAor below GND by more than 100 mV. For example, if VAis 2.7 VDC, ensure that -100 mV input voltages 2.8 VDCto ensure accurate conversions. 8/ Device type 01 is irradiated at dose rate = 50 - 300 rads(Si)/s in accordance with MIL-STD-883, method 1019, con
24、dition A, and is guaranteed to a maximum total dose specified. The effective dose rate after extended room temperature anneal = 0.027 rad(Si)/s per MIL-STD-883, method 1019, condition A, section 3.11.2. The total dose specification for this device only applies to the specified effective dose rate, o
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