DLA SMD-5962-05214 REV B-2013 MICROCIRCUIT DIGITAL CMOS RADIATION HARDENED PROGRAMMABLE SKEW CLOCK BUFFER MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Correct title to accurately describe device function. Add device types 03 and 04. - CFS 07-02-22 Thomas M. Hess B Correct package case outline X dimension Q and footnote 5/ Q to figure 1. Update radiation features in section 1.5 and update boiler

2、plate paragraphs as required by the Mil-PRF-38535. Delete class M requirements throughout. - MAA 13-06-07 Thomas M. Hess REV SHEET REV B B B B B B B B B B B B B B B B B B SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5

3、6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Charles F. Saffle DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Charles F. Saffle THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Thomas M. Hess MICROCIRCUIT, DIG

4、ITAL, CMOS, RADIATION HARDENED, PROGRAMMABLE SKEW CLOCK AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 06-04-21 BUFFER, MONOLITHIC SILICON AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-05214 SHEET 1 OF 32 DSCC FORM 2233 APR 97 5962-E281-12 Provided by IHSNot for ResaleNo rep

5、roduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-05214 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of hi

6、gh reliability (device class Q) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN

7、 is as shown in the following example: 5962 R 05214 01 Q X X Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA mark

8、ed devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 UT7R995 Programmable ske

9、w clock buffer 02 UT7R995 Programmable skew clock buffer, extended industrial temperature range 1/ 03 UT7R995C Programmable skew clock buffer, with crystal oscillator support 04 UT7R995C Programmable skew clock buffer, extended industrial temperature range, with crystal oscillator support 1/ 1.2.3 D

10、evice class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-18

11、35 and as follows: Outline letter Descriptive designator Terminals Package style X See figure 1. 48 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V. _ 1/ Device types 02 and 04 have an extended industrial temperature range of -40C to +125C. Pr

12、ovided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-05214 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ Core power supply voltage

13、 range (VDD) . -0.3 V dc to 4.0 V dc Output bank power supply voltage range: VDDQ1, VDDQ3, and VDDQ4 . -0.3 V dc to 4.0 V dc Voltage on any input pin (VIN) -0.3 V to VDD+ 0.3 V Voltage on any clock bank output (VOUT) -0.3 V to VDDQn + 0.3 V Voltage on XTAL2 and LOCK outputs (VO) -0.3 V to VDD+ 0.3 V

14、 DC input current (II) 10 mA Maximum power dissipation (PD) . 1.5 W Storage temperature range (TSTG) -65C to +150C Maximum junction temperature (TJ) . +150C 3/ Lead temperature (soldering, 10 seconds) . +280C Thermal resistance, junction-to-case (JC) . 15C/W 1.4 Recommended operating conditions. Cor

15、e power supply voltage range (VDD) . 3.0 V dc to 3.6 V dc Output bank power supply voltage range: VDDQ1, VDDQ3, and VDDQ4 . 2.25 V dc to 3.6 V dc Voltage on any configuration and control input pin (VIN) 0 V to VDDVoltage on any bank output (VOUT) . 0 V to VDDQn Case operating temperature range (TC):

16、 Device types 01 and 03 -55C to +125C Device types 02 and 04 -40C to +125C 1.5 Radiation features. Maximum total dose available (dose rate = 50 300 rads(Si)/s) . 100 Krads(Si) Single event phenomenon (SEP): No single event latch-up (SEL) occurs at effective LET (see 4.4.4.5) . 109 MeV-cm2/mg 4/ 5/ N

17、o single event upset (SEU) occurs at effective LET (see 4.4.4.5) 109 MeV-cm2/mg 5/ 6/ No single event transient (SET) occurs at effective LET (50 MHz) (see 4.4.4.5) . 74 MeV-cm2/mg 5/ Neutron fluence 1x1014n/cm25/ _ 1/ Stresses above the absolute maximum ratings may cause permanent damage to the dev

18、ice. These are stress ratings only, and functional operation of the device at these or any other conditions beyond limits indicated in the operational sections of this specification is not recommended. Exposure to absolute maximum rating conditions for extended periods may affect device reliability

19、and performance. 2/ All voltages are referenced to VSS, or ground. 3/ Maximum junction temperature may be increased to +175C during burn-in and steady-state life. 4/ Worst case temperature and voltage of TC= +125C, VDD= 3.6 V, VDDQ1/Q3/Q4 = 3.6 V. 5/ Limits are guaranteed by design or process, but n

20、ot production tested unless specified by the customer through the purchase order or contract. 6/ Worst case temperature and voltage of TC= +25C, VDD= 3.0 V VDDQ1/Q3/Q4 = 2.25 V. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DR

21、AWING SIZE A 5962-05214 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent speci

22、fied herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standar

23、d Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/quicksearch.dla.mil/ o

24、r from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of the documents are the issue

25、s of the documents cited in the solicitation or contract. ASTM INTERNATIONAL (ASTM) ASTM F1192 - Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of Semiconductor Devices. (Copies of this document are available online at http:/www.astm.org or from A

26、STM International, 100 Barr Harbor Drive, P.O. Box C700, West Conshohocken, PA 19428-2959.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes a

27、pplicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Manage

28、ment (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. 3.1.1 Microcircuit die. For the requirements of microcircuit die, see appendix A to this document. 3.2 Design, construction, and physical dimensions. The design, construction, and physica

29、l dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein and on figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Functional blo

30、ck diagram. The functional block diagram shall be as specified on figure 3. 3.2.4 Timing waveforms and test circuits. The timing waveforms and test circuits shall be as specified on figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD M

31、ICROCIRCUIT DRAWING SIZE A 5962-05214 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 3.2.5 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document revision level control and shall be made availa

32、ble to the preparing and acquiring activity upon request. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table IA and shall apply o

33、ver the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table IA. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In

34、 addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked

35、. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. 3.6 Certificate of compliance. For device classes Q and V, a certificate of com

36、pliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufa

37、cturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 shall be provided with each lot of microcircuits delivered to this drawing. . Provided

38、 by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-05214 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics. Test Symbol Condi

39、tions 1/ -55C TC +125C (for device types 01 and 03) -40C TC +125C (for device types 02 and 04) +3.0 V VDD +3.6 V unless otherwise specified Group A subgroups Device type Limits Unit Min Max DC Input Electrical Characteristics High-level input voltage (XTAL1, FB, and sOE inputs) VIH2/ 1, 2, 3 All 2.0

40、 V Low-level input voltage (XTAL1, FB, and sOE inputs) VIL2/ 1, 2, 3 All 0.8 V High-level input voltage VIHH3/ 4/ 1, 2, 3 All VDD 0.6 V Mid-level input voltage VIMM3/ 4/ 1, 2, 3 All VDD/2 0.3 VDD/2 + 0.3 V Low-level input voltage VILL3/ 4/ 1, 2, 3 All 0.6 V Input leakage current (XTAL1, FB, and sOE

41、inputs) IILVIN= VDDor VSSVDD= 3.6 V 1, 2, 3 All -5 5 A 3-level input DC current I3L3/ HIGH, VIN= VDD1, 2, 3 All 200 A MID, VIN= VDD/2 -50 50 LOW, VIN= VSS-200 Power-down current IDDPDVDD= VDDQn = +3.0 V; TEST and sOE = HIGH, XTAL1, PD/DIV, FB, FS, and PE/HD = LOW; All other inputs are floated, Outpu

42、ts are not loaded 1 All - 100 A 2 150 3 4.5 mA Input pin capacitance, 2-level inputs CIN-2L5/ See 4.4.1.c VDD= 3.6 V; f = 1 MHz 0 V 4 All 8.5 TYP pF Input pin capacitance, 3-level inputs CIN-3L5/ See 4.4.1.c VDD= 3.6 V; f = 1 MHz 0 V 4 All 15 TYP pF See footnotes at end of table. Provided by IHSNot

43、for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-05214 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics - Continued. Test Symbol Cond

44、itions 1/ -55C TC +125C (for device types 01 and 03) -40C TC +125C (for device types 02 and 04) +3.0 V VDD +3.6 V unless otherwise specified Group A subgroups Device type Limits Unit Min Max DC Output Electrical Characteristics 6/ Low-level output voltage VOLIOL= 12 mA (PE/HD = LOW or HIGH); (Pins:

45、nQ1:0) 1, 2, 3 All 0.4 V IOL= 20 mA (PE/HD = MID); (Pins: nQ1:0) 0.4 IOL= 2 mA (Pins: LOCK) 0.4 High-level output voltage VOHIOH= -6 mA (PE/HD = LOW or HIGH); (Pins: nQ1:0; VDDQn = +2.25 V) 1, 2, 3 All 2.0 V IOH= -10 mA (PE/HD = LOW or HIGH); (Pins: nQ1:0; VDDQn = +2.375 V) 2.0 IOH= -10 mA (PE/HD =

46、MID); (Pins: nQ1:0; VDDQn = +2.25 V) 2.0 IOH= -20 mA (PE/HD = MID); (Pins: nQ1:0; VDDQn = +2.375 V) 2.0 IOH= -2 mA (Pins: LOCK) 2.4 Short-circuit output current IOSQn 7/ VO= VDDQn or VSS; VDDQn = +2.75 V; PE/HD = MID 1, 2, 3 All -500 500 mA VO= VDDQn or VSS; VDDQn = +2.75 V; PE/HD = LOW or HIGH -300

47、 300 Dynamic supply current IDDOP 200 MHz (FS = HIGH); VDD= 3.6 V; VDDQn = +2.75 V; CL= 20 pF/output 1, 2, 3 01, 02 200 mA 03, 04 280 50 MHz (FS = LOW); VDD= 3.6 V; VDDQn = +2.75 V; CL= 20 pF/output 01, 02 130 03, 04 145 Output pin capacitance COUT5/ See 4.4.1.c VDD= 3.6 V; VDDQn = +2.75 V; f = 1 MH

48、z 0 V 4 All 15 TYP pF Functional test See 4.4.1.b 7, 8 All See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-05214 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics - Continued. Test Symbol Conditions 1/ -55C TC +125C (for device types 01 and 03) -40C TC +125C (for device types 0