DLA MIL-PRF-19500 605 D-2013 SEMICONDUCTOR DEVICE FIELD EFFECT RADIATION HARDENED (TOTAL DOSE ONLY) TRANSISTORS N-CHANNEL SILICON TYPES 2N7292 2N7294 2N7296 AND 2N7298 JANTXVM D R .pdf
《DLA MIL-PRF-19500 605 D-2013 SEMICONDUCTOR DEVICE FIELD EFFECT RADIATION HARDENED (TOTAL DOSE ONLY) TRANSISTORS N-CHANNEL SILICON TYPES 2N7292 2N7294 2N7296 AND 2N7298 JANTXVM D R .pdf》由会员分享,可在线阅读,更多相关《DLA MIL-PRF-19500 605 D-2013 SEMICONDUCTOR DEVICE FIELD EFFECT RADIATION HARDENED (TOTAL DOSE ONLY) TRANSISTORS N-CHANNEL SILICON TYPES 2N7292 2N7294 2N7296 AND 2N7298 JANTXVM D R .pdf(22页珍藏版)》请在麦多课文档分享上搜索。
1、 MIL-PRF-19500/605D 20 November 2013 SUPERSEDING MIL-PRF-19500/605C 16 April 2008 PERFORMANCE SPECIFICATION SHEET SEMICONDUCTOR DEVICE, FIELD EFFECT RADIATION HARDENED (TOTAL DOSE ONLY) TRANSISTORS, N-CHANNEL, SILICON, TYPES 2N7292, 2N7294, 2N7296, AND 2N7298, JANTXVM, D, R, H AND JANSM, D AND R Thi
2、s specification is approved for use by all Departments and Agencies of the Department of Defense. The requirements for acquiring the product described herein shall consist of this specification sheet and MIL-PRF-19500. 1. SCOPE 1.1 Scope. This specification covers the performance requirements for an
3、 N-Channel, enhancement-mode, MOSFET, radiation hardened (total dose only), power transistor intended for use in high density power switching applications. Two levels of product assurance are provided for each device type specified in MIL-PRF-19500. 1.2 Physical dimensions. See figure 1 (similar to
4、TO-254). 1.3 Maximum ratings (TC= +25C, unless otherwise specified). Type PT(1) PTVDSVDGVGSID1(2) ID2(2) ISIDMTJVISOTC= +25C TA= +25C TC= +25C TC= +100C (2) (3) and TSTG70,000 feet altitude W W V dc V dc A dc A dc A dc A dc A(pk) C V dc 2N7292 125 2.5 100 100 20 25 20 25 75 -55 to +150 N/A 2N7294 12
5、5 2.5 200 200 20 23 15 23 69 -55 to +150 N/A 2N7296 125 2.5 250 250 20 17 11 17 51 -55 to +150 250 2N7298 125 2.5 500 500 20 9 6 9 27 -55 to +150 500 (1) Derate linearly 1.0 W/C for TC +25C. (2) The following formula derives the maximum theoretical IDlimit. IDis limited by package and internal wires
6、 and may be limited by pin diameter: (3) IDM= 4 x IDas calculated by note (2). AMSC N/A FSC 5961 INCH-POUND ( ) ( ) Tat )on (Rx RT- T= IJMDSJCCJMDThe documentation and process conversion measures necessary to comply with this document shall be completed by 20 January 2014. * Comments, suggestions, o
7、r questions on this document should be addressed to DLA Land and Maritime, ATTN: VAC, P.O. Box 3990, Columbus, OH 43218-3990, or emailed to Semiconductordla.mil. Since contact information can change, you may want to verify the currency of this address information using the ASSIST Online database at
8、https:/assist.dla.mil/. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-PRF-19500/605D 2 1.4 Primary electrical characteristics at TC= +25C. Min V(BR)DSSVGS= 0 ID= 1.0 mA dcVGS(th)1VDS VGSID= .250 mA dcMax IDSS1VGS= 0 VDS= 80 percent of rated VDS
9、Max rDS(on)VGS= 10 V dc (1) RJCmax (2) IAS= IDMEASat IASTypeV dc TJ= +25C at ID2TJ= +125C at ID2V dcMin Max A dc C/W A(pk) mJ 2N7292100 2 4 25 0.070 0.140 1.00 75 281 2N7294 200 2 4 25 0.115 0.253 1.00 69 238 2N7296 250 2 4 25 0.185 0.444 1.00 51 130 2N7298 500 2 4 25 0.615 1.60 1.00 27 36 (1) Pulse
10、d (see 4.5.1). (2) See figure 2 thermal impedance curves. 2. APPLICABLE DOCUMENTS 2.1 General. The documents listed in this section are specified in sections 3, 4, or 5 of this specification. This section does not include documents cited in other sections of this specification or recommended for add
11、itional information or as examples. While every effort has been made to ensure the completeness of this list, document users are cautioned that they must meet all specified requirements of documents cited in sections 3, 4, or 5 of this specification, whether or not they are listed. 2.2 Government do
12、cuments. 2.2.1 Specifications, standards, and handbooks. The following specifications, standards, and handbooks form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENS
13、E SPECIFICATIONS MIL-PRF-19500 - Semiconductor Devices, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-750 - Test Methods for Semiconductor Devices. * (Copies of these documents are available online at http:/quicksearch.dla.mil/ or https:/assist.dla.mil/ or from the Standardizati
14、on Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.3 Order of precedence. In the event of a conflict between the text of this document and the references cited herein, the text of this document takes precedence. Nothing in this document, however, supersedes appl
15、icable laws and regulations unless a specific exemption has been obtained. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-PRF-19500/605D 3 NOTES: 1. Dimensions are in inches. 2. Millimeters are given for general information only. 3. All terminal
16、s are isolated from case. 4. The preferred measurements used herein are the metric units. However, this transistor was designed using inch-pound units of measurement. In case of conflicts between the metric and inch-pound units, the inch-pound units shall be the rule. 5. In accordance with ASME Y14.
17、5M, diameters are equivalent to x symbology. 6. Die to base is BeO isolated, terminals to case ceramic (AL2O3) isolated. FIGURE 1. Physical dimensions for TO-254AA (2N7292, 2N7294, 2N7296, and 2N7298). Dimensions Notes Ltr Inches Millimeters Min Max Min Max BL .530 .550 13.46 13.97 CH .249 .260 6.32
18、 6.60 LD .035 .045 0.89 1.14 LL .520 .560 13.21 14.22 LO .150 BSC 3.81 BSC LS .150 TYP 3.81 TYP MHD .139 .149 3.53 3.78 MHO .665 .685 16.89 17.40 TL .790 .800 20.07 20.32 3, 4 TT .040 .050 1.02 1.27 3, 4 TW .535 .545 13.59 13.84 Term 1 Drain Term 2 Source Term 3 Gate Provided by IHSNot for ResaleNo
19、reproduction or networking permitted without license from IHS-,-,-MIL-PRF-19500/605D 4 3. REQUIREMENTS 3.1 General. The individual item requirements shall be as specified in MIL-PRF-19500 and as modified herein. 3.2 Qualification. Devices furnished under this specification shall be products that are
20、 manufactured by a manufacturer authorized by the qualifying activity for listing on the applicable qualified manufacturers list (QML) before contract award (see 4.2 and 6.3). 3.3 Abbreviations, symbols, and definitions. Abbreviations, symbols, and definitions used herein shall be as specified in MI
21、L-PRF-19500 and as follows: IAS- Rated avalanche current, non-repetitive. 3.4 Interface and physical dimensions. The interface and physical dimensions shall be as specified in MIL-PRF-19500, and figure 1 (TO-254AA) herein. 3.4.1 Lead material and finish. Lead material shall be Kovar or Alloy 52; a c
22、opper core or plated core is permitted. Lead finish shall be solderable as defined in MIL-PRF-19500, MIL-STD-750, and herein. Where a choice of lead finish is desired, it shall be specified in the acquisition documents (see 6.2). 3.4.2 Internal construction. Multiple chip construction is not permitt
23、ed to meet the requirements of this specification. 3.5 Marking. Marking shall be in accordance with MIL-PRF-19500. At the option of the manufacturer, marking of the country of origin may be omitted from the body of the transistor, but shall be retained on the initial container. 3.6 Electrostatic dis
24、charge protection. The devices covered by this specification require electrostatic discharge protection. 3.6.1 Handling. MOS devices must be handled with certain precautions to avoid damage due to the accumulation of static charge. However, the following handling practices are recommended (see 3.6).
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