DLA MIL-M-38510 204 F-2009 MICROCIRCUIT DIGITAL 2048-BIT SCHOTTKY BIPOLAR PROGRAMMABLE READ-ONLY MEMORY (PROM) MONOLITHIC SILICON.pdf

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1、 INCH-POUND MIL-M-38510/204F21 September 2009SUPERSEDING MIL-M-38510/204E 02 November 2005MILITARY SPECIFICATION MICROCIRCUIT, DIGITAL, 2048-BIT, SCHOTTKY, BIPOLAR, PROGRAMMABLE READ-ONLY MEMORY (PROM), MONOLITHIC SILICON This specification is approved for use by all Departments and Agencies of the

2、Department of Defense. The requirements for acquiring the product herein shall consist of this specification sheet and MIL-PRF 38535. 1. SCOPE 1.1 Scope. This specification covers the detail requirements for monolithic silicon, PROM microcircuits which employ thin film nichrome (NiCr) resistors, tun

3、gsten (W), titanium tungsten (TiW), or zapped vertical emitter (ZVE) as the fusible link or programming element. Two product assurance class and a choice of case outlines and lead finishes are provided and are reflected in the complete part number. For this product, the requirements of MIL-M-38510 h

4、ave been superseded by MIL-PRF-38535, (see 6.4). 1.2 Part or Identifying Number (PIN). The PIN is in accordance with MIL-PRF-38535, and as specified herein. 1.2.1 Device types. The device types are as follows: Device type Circuit 01, 03 512 word / 4 bits per word PROM with uncommitted collector 02,

5、04 512 word / 4 bits per word PROM with active pull-up and a third high-impedance state output 1.2.2 Device class. The device class is the product assurance level as defined in MIL-PRF-38535. 1.2.3 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Desc

6、riptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line F GDFP2-F16 or CDFP3-F16 16 Flat pack Comments, suggestions, or questions on this document should be addressed to: Commander, Defense Supply Center Columbus, ATTN: DSCC-VAS, P. O. Box 3990, Columbus, OH 43218-3990, o

7、r emailed to memorydscc.dla.mil. Since contact information can change, you may want to verify the currency of this address information using the ASSIST Online database at http:/assist.daps.dla.mil AMSC N/A FSC 5962 Inactive for new design after 24 July 1995 * Provided by IHSNot for ResaleNo reproduc

8、tion or networking permitted without license from IHS-,-,-MIL-M-38510/204F 2 1.3 Absolute maximum ratings. Supply voltage range -0.5 V dc to +7.0 V dc Input voltage range . -1.5 V dc at -10 mA to +5.5 V dc Storage temperature range . -65 to +150C Lead temperature (soldering, 10 seconds) +300C Therma

9、l resistance, junction to case (JC) : Cases E and F See MIL-STD-1835 1/ Output voltage . -0.5 V dc to +VCCOutput sink current 100 mA Maximum power dissipation (PD) 794 mW dc 2/ Maximum junction temperature (TJ) +175C 3/ 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc minim

10、um to +5.5 V dc maximum Minimum high-level input voltage (VIH) . 2.0 V dc Maximum low-level input voltage (VIL) 0.8 V dc Normalized fanout (each output) . 16 mA Case operating temperature range (TC) -55 C to +125 C 2. APPLICABLE DOCUMENTS 2.1 General. The documents listed in this section are specifi

11、ed in sections 3, 4, or 5 of this specification. This section does not include documents cited in other sections of this specification or recommended for additional information or as examples. While every effort has been made to ensure the completeness of this list, document users are cautioned that

12、 they must meet all specified requirements of documents cited in sections 3, 4, or 5 of this specification, whether or not they are listed. 2.2 Government documents. 2.2.1 Specifications and Standards. The following specifications and standards form a part of this specification to the extent specifi

13、ed herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATIONS MIL-PRF-38535 - Integrated Circuits (Microcircuits) Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test

14、Method Standard for Microelectronics. MIL-STD-1835 - Interface Standard Electronic Component Case Outline (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Buildi

15、ng 4D, Philadelphia, PA 19111-5094.) _ 1/ Heat sinking is recommended to reduce the junction temperature. 2/ Must withstand the added PDdue to short circuit test (e.g. IOS). 3/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions per met

16、hod 5004 of MIL-STD-883. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-M-38510/204F 3 2.3 Order of precedence. In the event of a conflict between the text of this specification and the references cited herein, the text of this document takes pr

17、ecedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Qualification. Microcircuits furnished under this specification shall be products that are manufactured by a manufacturer authorized by the quali

18、fying activity for listing on the applicable qualified manufacturers list before contract award (see 4.3 and 6.3). 3.2 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (

19、QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. 3.3 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein. 3.3.1 Terminal connections. The terminal

20、connections shall be as specified on figure 1. 3.3.2 Truth table. 3.3.2.1 Unprogrammed devices. The truth table for unprogrammed devices for contracts involving no altered item drawing shall be as specified on figure 2. When required in groups A, B, or C inspection (see 4.4), the devices shall be pr

21、ogrammed by the manufacturer prior to test in a checkerboard pattern (a minimum of 50 percent of the total number of bits programmed) or to any altered item drawing pattern which includes at least 25 percent of the total number of bits programmed. 3.3.2.2 Programmed devices. The truth table for prog

22、rammed devices shall be as specified by the altered item drawing. 3.3.3 Functional block diagram. The functional block diagram shall be as specified on figure 3. 3.3.4 Case outlines. The case outlines shall be as specified in 1.2.3. 3.4 Lead material and finish. The lead material and finish shall be

23、 in accordance with MIL-PRF-38535 (see 6.6). 3.5 Electrical performance characteristics. The electrical performance characteristics are as specified in table I, and apply over the full recommended case operating temperature range, unless otherwise specified. 3.6 Electrical test requirements. The ele

24、ctrical test requirements shall be as specified in table II, and where applicable, the altered item drawing. The electrical tests for each subgroup are described in table III. 3.7 Marking. Marking shall be in accordance with MIL-PRF-38535. For programmed devices, the altered item drawing number shal

25、l be added to the marking by the programming activity. 3.8 Processing options. Since the PROM is an unprogrammed device capable of being programmed by either the manufacturer or the user to result in a wide variety of PROM configurations, two processing options are provided for selection in the cont

26、ract, using an altered item drawing. 3.8.1 Unprogrammed PROM delivered to the user. All testing shall be verified through group A testing as defined in 3.3.2.1, table II, and table III. It is recommended that users perform subgroups 7 and 9 after programming to verify the specific program configurat

27、ion. 3.8.2 Manufacturer-programmed PROM delivered to the user. All testing requirements and quality assurance provisions herein, including the requirements of the altered item drawing, shall be satisfied by the manufacturer prior to delivery. 3.9 Microcircuit group assignment. The devices covered by

28、 this specification shall be in microcircuit group number 14 (see Appendix A MIL-PRF-38535.) Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-M-38510/204F 4 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TC +125C u

29、nless other wise specified Device type Limits Units Min Max High-level output voltage VOHVCC= 4.5 V, IOH = -2 mA, VIL= 0.8 V, VIH= 2.0 V 02, 04 2.4 V Low-level output voltage VOLVCC= 4.5 V, IOL = 16 mA, VIL= 0.8 V, VIH= 2.0 V 01, 02, 03, 04 0.5 V Input clamp voltage VICVCC = 4.5 V; IIN= -10 mA, TC =

30、 +25C 01, 02, 03, 04 -1.5 V Maximum collector cut-off current ICEXVCC = 5.5 V, VO = 5.2 V 01, 03 100 A High impedance (off-state) output high current IOHZVCC = 5.5 V, VO = 5.2 V 02, 04 100 A High impedance (off-state) output low current IOLZVCC = 5.5 V, VO = 0.5 V 02, 04 -100 A High level input curr

31、ent IIH1VCC = 5.5 V, VIN = 5.5 V 01, 02, 03, 04 50 A IIH2VCC = 5.5 V, VIN = 4.5 V , special programming pin 100 Low level input current IILVCC = 5.5 V, VIN = 0.5 V 01, 02, 03, 04 -1.0 -250 A Short circuit output current IOSVCC = 5.5 V, 2/ VO= 0.0 V 02, 04 -10 -100 mA Supply current ICCVCC = 5.5 V, V

32、IN = 0 V, outputs = open 01, 02, 03, 04 140 mA Propagation delay time, high to low level logic, address to output tPHL1 VCC= 4.5 V and 5.5 V, CL= 30 pF, see figure 4 01, 02 85 ns 03, 04 35Propagation delay time, low to high level logic, address to output tPLH1VCC= 4.5 V and 5.5 V, CL= 30 pF, see fig

33、ure 4 01, 02 85 ns 03, 04 35Propagation delay time, high to low level logic, enable to output tPHL2 VCC= 4.5 V and 5.5 V, CL= 30 pF, see figure 4 01, 02 40 ns 03, 04 20Propagation delay time, low to high level logic, enable to output tPLH2VCC= 4.5 V and 5.5 V, CL= 30 pF, see figure 4 01, 02 40 ns 03

34、, 04 201/ Complete terminal conditions shall be specified in table III. 2/ Not more than one output shall be grounded at one time. Output shall be at high logic level prior to test. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-M-38510/204F 5 D

35、evice types 01, 02, 03, and 04 Case outlines E and F Terminal number Terminal symbol 1 A62 A53 A44 A35 A06 A17 A28 GND 9 O410 O311 O212 O113 CE 14 A815 A716 VCCFIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-M-3851

36、0/204F 6 Word INPUTS number CE A8A7A6A5A4A3A2A1A0NA L X X X X X X X X X NA H X X X X X X X X X Word DAT number CE O4O3O2O1NA L 5/ 5/ 5/ 5/ NA H OC OC OC OC NOTES: 1. NA = Not applicable. 2. X = Input may be high level, low level or open circuit. 3. OC = Open circuit (high resistance output). 4. Prog

37、ram readout can only be accomplished with enable input at low level. 5. The outputs for an unprogrammed device shall be high for circuits A, B, D, and F; and shall be low for circuits C and G. FIGURE 2. Truth table (unprogrammed). Provided by IHSNot for ResaleNo reproduction or networking permitted

38、without license from IHS-,-,-MIL-M-38510/204F 7 FIGURE 3. Functional block diagrams. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-M-38510/204F 8 FIGURE 3. Functional block diagrams Continued. Provided by IHSNot for ResaleNo reproduction or net

39、working permitted without license from IHS-,-,-MIL-M-38510/204F 9 FIGURE 3. Functional block diagrams Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-M-38510/204F 10 FIGURE 3. Functional block diagrams Continued. Provided by IHSNot for

40、 ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-M-38510/204F 11 FIGURE 3. Functional block diagrams Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-M-38510/204F 12 NOTES: 1. Test table for devices progra

41、mmed in accordance with an altered item drawing may be replaced by the equivalent tests which apply to the specific program configuration for the resulting read-only memory. 2. CL= 30 pF minimum, including jig and probe capacitance; R1= 330 25% and R2= 660 20 %. 3. Outputs may be under load simultan

42、eously. FIGURE 4. Switching time test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-M-38510/204F 13 NOTE: All other waveform characteristics shall be as specified in table IVA. FIGURE 5a. Programming voltage waveforms during programmin

43、g for circuit A. NOTE: All other waveform characteristics shall be as specified in table IVB. FIGURE 5b. Programming voltage waveforms during programming for circuit C. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-M-38510/204F 14 FIGURE 5c. Pr

44、ogramming voltage waveforms during programming for circuit G. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-M-38510/204F 15 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-3853

45、5 or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. 4.2 Screening. Screening shall be in accordance with MIL-PRF-38535 and shall be conducted on all devices prior to qualification

46、and quality conformance inspection. The following additional criteria shall apply: a. The burn-in test duration, test condition, and test temperature, or approved alternatives shall be as specified in the device manufacturers QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall b

47、e maintained under document control by the device manufacturers Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applic

48、able, in accordance with the intent specified in test method 1015 of MIL-STD-883. b. Interim and final electrical test parameters shall be as specified in table II, except interim electrical parameters test prior to burn-in is optional at the discretion of the manufacturer. c. Additional screening for space level product shall be as specified in MIL-PRF-38535, appendix B. d. Cl