DLA DSCC-VID-V62 09611-2009 MICROCIRCUIT DIGITAL CONTROLLER AREA NETWORK (CAN) TRANSCEIVER MONOLITHIC SILICON.pdf
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1、 REVISIONS LTR DESCRIPTION DATE APPROVED Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE 18 19 20 21 22 REV REV STATUS OF PAGES PAGE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 PMIC N/A PREPARED BY RICK OFFICER DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 Orig
2、inal date of drawing YY-MM-DD CHECKED BY RAJESH PITHADIA APPROVED BY ROBERT M. HEBER TITLE MICROCIRCUIT, DIGITAL, CONTROLLER AREA NETWORK (CAN) TRANSCEIVER, MONOLITHIC SILICON SIZE A CODE IDENT. NO. 16236 DWG NO. V62/09611 09-01-13 REV PAGE 1 OF 22 AMSC N/A 5962-V020-09 Provided by IHSNot for Resale
3、No reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09611 REV PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance controller area network (CAN) transce
4、iver microcircuit, with an operating temperature range of -55C to +125C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering docume
5、ntation: V62/09611 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01 SN65HVD233-EP Controller area network (CAN) transceiver 1.2.2 Case outline(s). The case outline(s) are as specified herein
6、. Outline letter Number of pins JEDEC PUB 95 Package style X 8 MS-012-AA Plastic surface mount 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacture: Finish designator Material A Hot solder dip B Tin-lead plate C Gold plate D Palla
7、dium E Gold flash palladium Z Other 1.3 Absolute maximum ratings. 1/ 2/ Supply voltage range ( VCC) . -0.3 V to 7.0 V Voltage range at any bus terminal (CANH or CANL) . -36 V to +36 V Voltage input range, transient pulse, CANH and CANL, through 100 (see figure 5) -100 V to +100 V Input voltage range
8、 ( VI) (D, R, RS, LBK) . -0.5 V to 7.0 V Receiver output current (IO) . -10 mA to 10 mA Electrostatic discharge (ESD): Human body model (HBM): 3/ CANH, CANL and GND . 16 kV All pins . 3 kV Charged device model (CDM): 4/ All pins 1 kV 1/ Stresses beyond those listed under “absolute maximum rating” ma
9、y cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect
10、 device reliability. 2/ All voltage values, except differential I/O bus voltages, are with respect to network ground terminal. 3/ Tested in accordance with JEDEC Standard 22, test method A114-A. 4/ Tested in accordance with JEDEC Standard 22, test method C101 Provided by IHSNot for ResaleNo reproduc
11、tion or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09611 REV PAGE 3 1.3 Absolute maximum ratings - continued. 1/ 2/ Continuous total power dissipation See 1.5, dissipation rating table Operating junction te
12、mperature (TJ) +150C Storage temperature range (TSTG) -65C to 150C Lead temperature 1.6 mm from case for 10 seconds +260C Thermal resistance, junction to ambient (JA): 5/ Low K, no air flow . 185C/W 6/ High K, no air flow . 101C/W 7/ Thermal resistance, junction to board (JB): High K, no air flow 82
13、.8C/W 7/ Thermal resistance, junction to case (JC) . 26.5C/W Average power dissipation (PAVG) : With RL= 60 , RSat 0 V, input to D a 1 MHz 50% duty cycle square wave, VCCat 3.3 V and TA= +25C 36.4 mW Thermal shutdown junction temperature (TSD) 170C/W 1.4 Recommended operating conditions. 8/ Supply v
14、oltage range ( VCC): . 3.0 V to 3.6 V Voltage at any bus terminal (separately or common mode) -7.0 to 12.0 V High level input voltage, (VIH) D, LBK pins 2.0 V to 5.5 V Low level input voltage (VIL), D, LBK pins . 0 V to 0.8 V Differential input voltage, (VID) . -6.0 V to 6.0 V Resistance from RSto g
15、round . 0.0 V to 100 k Input voltage at RSfor standby 0.75 VCCto 5.5 V High level output current, (IOH): Driver -50 mA minimum Receiver . -10 mA minimum Low level output current, (IOL): Driver 50 mA maximum Receiver . 10 mA maximum Operating junction temperature (TJ) +150C Operating free-air tempera
16、ture range ( TA) -55C to +125C 9/ 1.5. Dissipation rating table. Case outline Circuit board TA 25C power rating Derating factor 10/ above TA= 25C TA= 85C power rating TA= 125C power rating X Low K 596.6 mW 5.7 mW/C 255.7 mW 28.4 mW High K 1076.9 mW 10.3 mW/C 461.5 mW 51.3 mW _ 5/ See manufacturers l
17、iterature number SZZA003 for an explanation of this parameter. 6/ JESD51-3 low effective thermal conductivity test board for leaded surface mount packages. 7/ JESD51-7 high effective thermal conductivity test board for leaded surface mount packages. 8/ Use of this product beyond the manufacturers de
18、sign rules or stated parameters is done at the users risk. The manufacturer and/or distributor maintain no responsibility or liability for product used beyond the stated limits. 9/ Maximum free air temperature operation is allowed as long as the device maximum junction temperature is not exceeded. 1
19、0/ This is the inverse of the junction to ambient thermal resistance when board mounted and with no air flow. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09611
20、 REV PAGE 4 2. APPLICABLE DOCUMENTS JEDEC PUB 95 Registered and Standard Outlines for Semiconductor Devices (Applications for copies should be addressed to the Electronic Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834 or online at http:/www.jedec.org) 3. REQUIREMENTS 3.1 Markin
21、g. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers par
22、t number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construct
23、ion, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline. The case outline shall be as shown in 1.2.2 and figure 1. 3.5.2 Terminal connections. The terminal connections shall be as shown in figure 2. 3.5.3 Functional tables. The functional tables shall be as shown in fi
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