DLA DSCC-VID-V62 09602 REV A-2012 MICROCIRCUIT DIGITAL LOW VOLTAGE HIGH SPEED QUADRUPLE DIFFERENTIAL LINE RECEIVER WITH 5 kV ESD PROTECTION MONOLITHIC SILICON.pdf
《DLA DSCC-VID-V62 09602 REV A-2012 MICROCIRCUIT DIGITAL LOW VOLTAGE HIGH SPEED QUADRUPLE DIFFERENTIAL LINE RECEIVER WITH 5 kV ESD PROTECTION MONOLITHIC SILICON.pdf》由会员分享,可在线阅读,更多相关《DLA DSCC-VID-V62 09602 REV A-2012 MICROCIRCUIT DIGITAL LOW VOLTAGE HIGH SPEED QUADRUPLE DIFFERENTIAL LINE RECEIVER WITH 5 kV ESD PROTECTION MONOLITHIC SILICON.pdf(12页珍藏版)》请在麦多课文档分享上搜索。
1、 REVISIONS LTR DESCRIPTION DATE APPROVED A Change the unit for VICand VIDin section 1.4. Correct the name for terminal connection 1 and 2. Update boilerplate paragraphs to current requirements. - PHN 12-07-23 Thomas M. Hess CURRENT DESIGN ACTIVITY CAGE CODE 16236 HAS CHANGED NAMES TO: DLA LAND AND M
2、ARITIME COLUMBUS, OHIO 43218-3990 Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV A A A A A A A A A A A A PAGE 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Phu H. Nguyen DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 Original date of
3、 drawing YY-MM-DD CHECKED BY Phu H. Nguyen TITLE MICROCIRCUIT, DIGITAL, LOW VOLTAGE HIGH SPEED QUADRUPLE DIFFERENTIAL LINE RECEIVER WITH 15 kV ESD PROTECTION, MONOLITHIC SILICON 08-12-10 APPROVED BY Thomas M. Hess SIZE A CODE IDENT. NO. 16236 DWG NO. V62/09602 REV A PAGE 1 OF 12 AMSC N/A 5962-V082-1
4、2 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09602 REV A PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance low
5、voltage high speed quadruple differential line receiver with 15 kV ESD protection microcircuit, with an operating temperature range of -55C to +125C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an adm
6、inistrative control number for identifying the item on the engineering documentation: V62/09602 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01 AM26LV32E-EP Low voltage high speed quadruple
7、 differential line receiver with 15 kV ESD protection 1.2.2 Case outline(s). The case outline(s) are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 16 MS-012 Plastic small outline package 1.2.3 Lead finishes. The lead finishes are as specified below or other lead fin
8、ishes as provided by the device manufacturer: Finish designator Material A Hot solder dip B Tin-lead plate C Gold plate D Palladium E Gold flash palladium Z Other Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBU
9、S, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09602 REV A PAGE 3 1.3 Absolute maximum ratings. 1/ 2/ Supply voltage range (VCC) . -0.5 V to +6.0 V 3/ Input voltage range (VI): A or B inputs . -14.0 V to + 14.0 V Enable inputs -0.5 V to + 6.0 V Differential input voltage -14.0 V to +14.0 V 4/ Outpu
10、t voltage range (VO) . -0.5 V to +6.0 V Maximum input clamp current (IIK) (VI 0) -20 mA Maximum output clamp current (IOK) (VO 0) . -20 mA Maximum output current (IO) 20 mA Package thermal impedance (JA) . 73C/W 5/ 6/ Operating virtual junction temperature range (TJ) +150C Storage temperature range
11、-65C to +150C Operating free-air temperature range (TA) . -55C to +125C 1.4 Recommended operating conditions. Supply voltage range (VCC) . 3.0 V to 3.6 Enable high level input voltage, (VIH) . 2.0 V to 5.5 V Enable low level input voltage, (VIL) . 0.0 V to 0.8 Common mode input voltage (VIC) . -7.0
12、V to +7.0 V Differential input voltage, (VID) -7.0 V to +7.0 V Maximum high level output current (IOH) -5 mA Maximum low level output current (IOL) +5 mA Operating free-air temperature range (TA) . -55C to +125C 1/ Stresses beyond those listed under “absolute maximum rating” may cause permanent dama
13、ge to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2
14、/ This device is designed to meet TIA/EIA-422-B. 3/ All voltage values, except differential input voltage are with respect to network GND. 4/ Differential input voltage is measured at the noninverting input with respect to the corresponding inverting input. 5/ Maximum power dissipation is a function
15、 of TJ(max), JA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD= (TJ(max) TA) / JA. Selecting the maximum of +150C can affect reliability. 6/ The package thermal impedance is calculated in accordance with JESD 51-7. Provided by IHSNot for ResaleNo reproduc
16、tion or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09602 REV A PAGE 4 2. APPLICABLE DOCUMENTS ELECTRONICS INDUSTRIES ALLIANCE (EIA) JEDEC PUB 95 Registered and Standard Outlines for Semiconductor Devices. J
17、ESD 51-7 High effective-thermal-conductivity test board for leaded surface- mount packages. TIA/EIA-422-B Electrical Characteristics of Balanced Voltage Digital Interface Circuits. (Applications for copies should be addressed to the Electronic Industries Alliance, 2500 Wilson Boulevard, Arlington, V
18、A 22201-3834 or online at http:/www.jedec.org or http:/www.eia.org) INTERNATIONAL ELECTROTECHNICAL COMMISSION (IEC) IEC 61000-4-2 Electromagnetic compatibility (EMC) Part 4-2: Testing and measurement techniques Electrostatic discharge immunity test. (Applications for copies should be addressed to th
19、e IEC Central Office, 3 Rue de Varembe, P.O. Box 131, CH 1211 GENEVA 20, Switzerland or online at http:/www.iec.ch). 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code,
20、or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical perfor
21、mance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline. The case outline shall be as shown in 1.2.2 and figure 1. 3.5.2 Termi
22、nal connections. The terminal connections shall be as shown in figure 2. 3.5.3 Function table. The function table shall be as shown in figure 3. 3.5.4 Logic diagram. The logic diagram shall be as shown in figure 4. 3.5.5 Test circuits and voltage waveforms. The test circuits and voltage waveforms sh
23、all be as shown in figures 5-7. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09602 REV A PAGE 5 TABLE I. Electrical performance characteristics. 1/ Test Symbol
- 1.请仔细阅读文档,确保文档完整性,对于不预览、不比对内容而直接下载带来的问题本站不予受理。
- 2.下载的文档,不会出现我们的网址水印。
- 3、该文档所得收入(下载+内容+预览)归上传者、原创作者;如果您是本文档原作者,请点此认领!既往收益都归您。
下载文档到电脑,查找使用更方便
10000 积分 0人已下载
下载 | 加入VIP,交流精品资源 |
- 配套讲稿:
如PPT文件的首页显示word图标,表示该PPT已包含配套word讲稿。双击word图标可打开word文档。
- 特殊限制:
部分文档作品中含有的国旗、国徽等图片,仅作为作品整体效果示例展示,禁止商用。设计者仅对作品中独创性部分享有著作权。
- 关 键 词:
- DLADSCCVIDV6209602REVA2012MICROCIRCUITDIGITALLOWVOLTAGEHIGHSPEEDQUADRUPLEDIFFERENTIALLINERECEIVERWITH5KVESDPROTECTIONMONOLITHICSILICONPDF

链接地址:http://www.mydoc123.com/p-689266.html