DLA DSCC-VID-V62 06646 REV A-2011 MICROCIRCUIT LINEAR HIGH OUTPUT CURRENT OPERATIONAL AMPLIFIER MONOLITHIC SILICON.pdf
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1、 REVISIONS LTR DESCRIPTION DATE APPROVED A Add footnote 1/ to section 1.2.2 and footnote 5/ to section 6.3. Update boilerplate paragraphs to current requirements. - PHN 11-12-21 Thomas M. Hess CURRENT DESIGN ACTIVITY CAGE CODE 16236 HAS CHANGED NAMES TO: DLA LAND AND MARITIME COLUMBUS, OHIO 43218-39
2、90 Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV A A A A A A A A A A A A A A A A PAGE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 PMIC N/A PREPARED BY RICK OFFICER DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 Original date of drawing YY-
3、MM-DD CHECKED BY TOM HESS TITLE MICROCIRCUIT, LINEAR, HIGH OUTPUT CURRENT OPERATIONAL AMPLIFIER, MONOLITHIC SILICON 06-08-15 APPROVED BY RAYMOND MONNIN SIZE A CODE IDENT. NO. 16236 DWG NO. V62/06646 REV A PAGE 1 OF 16 AMSC N/A 5962-V015-12 Provided by IHSNot for ResaleNo reproduction or networking p
4、ermitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/06646 REV A PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance high output current operational amplifier microcircuit, with an op
5、erating temperature range of -55C to +125C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/06646 - 01 X E D
6、rawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01 TLV4110-EP High output current operational amplifier with shutdown 02 TLV4111-EP High output current operational amplifier 03 TLV4112-EP High output cu
7、rrent dual operational amplifier 04 TLV4113-EP High output current dual operational amplifier with shutdown 1.2.2 Case outline(s). The case outline(s) are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 8 MS-012-AA Plastic small outline Y 8 MO-187 Plastic small outlin
8、e with thermal pad Z 1/ 10 MO-187-BA-T Plastic small outline with thermal pad 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator Material A Hot solder dip B Tin-lead plate C Gold plate D Palladium E Gold flas
9、h palladium Z Other _ 1/ The manufacture has changed lead frames NiPdAu to NiPdAuAg and location of assembly from their Hana facility to their Shanghai facility. Product with a Lot Trace Code of 1CxxxxH and earlier is a NiPdAu frame from the Hana facility. Provided by IHSNot for ResaleNo reproductio
10、n or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/06646 REV A PAGE 3 1.3 Absolute maximum ratings. 2/ Supply voltage (VDD) . 7 V 2/ Differential input voltage (VID) VDDInput voltage range (VI) VDDOutput curre
11、nt (IO) . 800 mA 4/ Continuous RMS output current (each output of amplifier): TJ 105C . 350 mA TJ 150C . 110 mA Peak output current (each output of amplifier): TJ 105C . 500 mA TJ 150C . 155 mA Continuous total power dissipation . See 1.5, Dissipation rating table Maximum junction temperature (TJ) .
12、 150C Storage temperature range (TSTG) -65C to +150C Lead temperature 1.6 mm (1/16 inch) from case for 10 seconds . 260C 1.4 Recommended operating conditions. 5/ Supply voltage (VDD) . 2.5 V to 6 V Common mode input voltage range (VICR) 0 V to VDD 1.5 V Shutdown turn on/off voltage level: 6/ V(on):
13、VDD= 3 V . 2.1 V minimum VDD= 5 V . 3.8 V minimum V(off): VDD= 3 V . 0.9 V maximum VDD= 5 V . 1.65 V maximum Operating free-air temperature range (TA) . -55C to +125C 2/ Stresses beyond those listed under “absolute maximum rating” may cause permanent damage to the device. These are stress ratings on
14、ly, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 3/ All voltage values, except differential vol
15、tages, are with respect to GND. 4/ To prevent permanent damage the die temperature must not exceed the maximum junction temperature. 5/ Use of this product beyond the manufacturers design rules or stated parameters is done at the users risk. The manufacturer and/or distributor maintain no responsibi
16、lity or liability for product used beyond the stated limits. 6/ Relative to ground. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/06646 REV A PAGE 4 1.5 Dissipat
17、ion rating table. 7/ Case outlines JCJATA 25C power rating TA= 25C power rating X 38.3C/W 176C/W 710 mW 142 mW Y 4.7C/W 52.7C/W 2.37 W 474.4 mW Z 4.7C/W 52.3C/W 2.39 W 478 mW 2. APPLICABLE DOCUMENTS JEDEC PUB 95 Registered and Standard Outlines for Semiconductor Devices (Applications for copies shou
18、ld be addressed to the Electronic Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834 or online at http:/www.jedec.org) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacture
19、rs name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions a
20、nd electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outlines. The case outlines shall be as shown in 1.2.2 and
21、 figure 1. 3.5.2 Terminal connections. The terminal connections shall be as shown in figure 2. 7/ See the Texas Instruments document, power pad thermally enhanced packages application report (SLMA002), for more information on the power pad package. The thermal data was measured on a PCB layout on th
22、e information in the section entitled Texas Instruments recommended board for power pad on page 33 of the before mentioned document. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO.
23、16236 DWG NO. V62/06646 REV A PAGE 5 TABLE I. Electrical performance characteristics. 1/ Test Symbol Conditions VDD= 3 V and 5 V unless otherwise specifiedTemperature, TA Device type Limits Unit Min Max DC performance section Input offset voltage VIOVIC= VDD/ 2, RL= 100 , 25C All 3500 V RS= 50 , VO=
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