CEPT T CD 02-01 E-1986 Specification of Engineering Requirements for a Synchronous Digital Multiplexer Operating at 64 KBit s Using an 8 Bit (6+2) Envelope Structure《使用8 Bit(6+2)封套.pdf

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1、. CEPT T/CD*02-03*E 79 = 2326434 0003YbL b W Page E 1 Recommendation T/CD 02-01 E (Ostende 1979, revised at Cannes 1983) Concerning the specification of engineering requirements for a synchronous digital multiplexer operating at 64 kbit/s using an 8-bit (6+2) envelope structure O Recommendation prop

2、osed by Working Group T/WG 10 “Data Communications” (CD) Text of the revised Recommendation adopted by the “Telecoirnitiicntioiis” Commission: “The Conference of European Post and Telecommunications Administrations, Coilsidering - that CCITT Recommendation X.50 describes the standard for a TDM syste

3、m for synchronous data transmission - that GT/CD has studied the harmonization of multiplex equipment for data communication under the auspices at 64 kbit/s using an 8-bit (6+ 12) envelope structure; of Question CD 1. Recommends - that the attached specification of engineering requirements for a syn

4、chronous digital multiplexer operating at 64 kbit/s using an 8-bit (6+ 12) envelope structure, annexed to this Recommendation should be takeninto account by all CEPT Administrations when implementation of such a piece of equipment is being planned by Administra- tions.” O Administrations are free to

5、 stipulate additional requirements, and also which of the optional requirements, if any, are to be provided. Note 1: This specification is the subject of continuing study and possible amendments. Note 2: The Annex is an integtai part of the Recommendation. Edition of March 15, 1986 CEPT T/CD*82-OL*E

6、 79 m 2326414 0003462 8 m . TlCD02-01 E Page 3 Contents SCOPE 5 Section A . Common requirements 5 1 . GENERAL CHARACTERISTICS . 5 1.1. Bitrate . 5 1.2. Timingsignal 5 2 . FRAMESTRUCTURE 5 2.1. 80 8-bit envelope structure . 5 2.2. 20 8-bit envelope structure . 7 2.3. Allocation of channels on interna

7、tional multiplex links at 64 kbit/s 7 3 . ALIGNMENT 9 3.1. Envelope alignment at the tributary interface . 9 3.2. Frame alignment at 64 kbit/s interface 9 4 . FAULT CONDITIONS AND CONSEQUENT ACTIONS . 9 4.1. Fault conditions . 9 4.2. Consequent actions 9 5 . TESTLOOPS 10 6 . PERFORMANCES 11 7 . POWE

8、R SUPPLY 11 8 . MECHANICAL REQUIREMENTS 11 9 . ENVIRONMENTAL REQUIREMENTS 11 Section B . Network dependent requirements 12 1 . INTERFACES . 12 1.1 Tributary interfaces 12 1.2. 64 kbit/s interface definitions 12 2 . CONTROLOFLOOPSIANDK . 13 3 . TELEMAINTENANCE OVER A DATA NETWORK USING X.50 FRAME STR

9、UCTURE 13 O Section C . Optional reqitiretnents 15 1 . INPUT BUFFER REQUIREMENTS 15 2 . EXTERNALCLOCKINTERFACE 15 O Note: Bars at the left hand margin indicate that the wording of this Specification is similar to CCITT Recommendation X.50 for the relevant item . Edition of March 15. 1986 / I CEPT T/

10、CD*02-O1*E 79 m 2326414 0003463 T m F T/CD 02-01 E Page 5 I I I I I D S SCOPE This specification gives the characteristics of a synchronous digital multiplex equipment which combines on an octet by octet basis, n synchronous homogeneous or heterogeneous tributary channels at the net bit rates from 0

11、.6 to 9.6 kbit/s defined in CCITT Recommendation X.l into a digital stream, at the gross bit rate of 64 kbit/s, according to CCITT Recommendation X.50. Section A. Coinmon reqrrireineiits 1. 1.1. 1.2. 2. 2.1. GENERAL CHARACTERISTICS The functional structure and the interfaces of the multiplex equipme

12、nt are shown in Figure 1 (T/CD 02-01). Bit rate The nominal bit rate is 64 kbit/s. The tolerance on this rate is +50 parts per million (ppm). Timing signal It should be possible to synchronise the internal clock in two ways: i) synchronization from the incoming 64 kbit/s signal; ii) synchronization

13、from an external clock (optional). Moreover an independent operation mode should be possible. FRAME STRUCTURE The signal elements of each individual channel should be assembled in 8-bit envelopes. In an %bit envelope, bit 1 is reserved for framing purposes, bits 2-7 are the information bits of the c

14、hannel, and bit 8 is a status bit, as follows: 12345678 The addition of the framing and the status bits results in 33% increase in bit rate, so that beares channel rates are: 12.8 kbit/s for the 9.6 kbit/s data signalling rate; 6.4 kbit/s for the 4.8 kbit/s data signalling rate; 3.2 kbit/s for the 2

15、.4 kbit/s data signalling rate; 800 bit/s for the 600 bit/s data signalling rate; The status bit is associated with each envelope and, in conjunction with the information bit, conveys call control information. For the multiplexing of channels, an 8-bit envelope interleaved structure should be used w

16、ith a distributed framing pattern employing the framing bits of consecutive 8-bit envelopes. The multiplexing structure will comprise 80 envelopes as described in 2.1. below; as an alternative the multiplexing structure described in 2.2. can be used. 80 8-bit envelope structure In the case of homoge

17、neous multiplexing the envelopes will appear on the 64 kbit/s bearer as follows: - 12.8 kbit/s channels will repeat every 5th - 6.4 kbit/s channels will repeat every 10th 8-bit envelope; - 3.2 kbit/s channels will repeat every 20th 8-bit envelope; - 0.8 kbit/s channels will repeat every 80th 8-bit e

18、nvelope; Where a heterogeneous multiplexing is used, within each 12.8 kbit/s channel only a homogeneous misture of sub-rate channels will be allowed. A 72-bit long framing pattern is recommended. This pattern is part of the 80-bit pattern which is generated according to the primitive polynomial: 1 +

19、 x4 + x7 of the Z7 Galois field with the forcing configuration 1001101 and which is reproduced in Table 1 (T/CD 02-01) showing 8 bits (,A to “H) reserved for housekeeping. The frst F bit, indicsted as “A” in Table 1 (T/CD 02-01) is used to convey to the distant end alarm indications detected at the

20、local end (see paragraph 4.). Edition of March 15, 1986 _= T/CD 02-01 Page 6 CEPT T/CD*OZ-OL*E 2326434 0003464 L o do O on C .- .d - E P .d 3 * 5 Figure 1 (T/CD 02-01). Functional structure and interfaces of 64 kbit/s data multiplexors. Edition of March 15, 1986 CEPT T/CD*02-01*E 79 2326414 OO3465 3

21、 _ I/CD 02-01 E Page 7 The ?A? bit shall be assigned such that: ?A? equals 1 means no alarm ?A? equals O means alarm. The other F bits indicated as ?B?, ?C?, ?D?, ?E?, ?F?, ?G?, and ?H? in Table 1 (T/CD 02-01) could be reserved to convey further international house-keeping information. Pending the r

22、esolution of the house- keeping requirements, these bits are provisionally fixed to : ?B? equals 1, ?C? equals 1, ?D? equals O, ?E? equals O, ?F? equals 1, ?G? equals 1, ?H? equals O. The use of these bits is under study. 1st bit AlOOO11111 B 100001110 C 111001011 D 010010000 E 010001001 F 000101110

23、 G 011011000 H O11001101 Forcing configuration Table 1 (T/DC 02-01). 2.2. 20 8-bit envelope structure In - the case of homogeneous multiplexing, the envelopes will appear on the 64 kbit/s bearer as follows: 12.8 kbit/s channels will repeat every 5th envelope; 6.4 kbit/s channels will repeat every 10

24、th envelope; 3.2 kbit/s channels will repeat every 20th envelope; Where a heterogeneous multiplexing is used, within each 12.8 kbit/s channel, only a homogeneous mixture of sub-rate channels will be allowed. A 19-bit long framing pattern is recommended. The pattern is part of the 20-bit pattern whic

25、h is generated according to the primitive polynomial: 1 + xz + x5 of the 25 Galois field with the forcing configuration Oll10 and is reproduced in Table 2 (T/CD 02-01). The first F bit indicated as ?A? in Table 2 (T/CD 02-01) is used to convey to the distant end alarm indications detected at the loc

26、al end (see paragraph 4.). The ?A? bit shall be assigned such that: ?A? equals 1 means no alarm ?A? equals O means alarm 1st bit A 1101001000010101110 I Forcing configuration Table 2 (T/DC 02-01). 2.3. Allocation of channels on international multiplex links at 64 kbit/s On international links carryi

27、ng data channels multiplexed at 64 kbit/s, the allocation of tributary channels at rates of 0.6, 2.4, 4.8, 9.6 kbit/s within the multiplex frame should be chosen, by bilateral agreement, among the configurations listed in Table 3 (T/CD 02-01). Note: The phase number i (i = 1, ., 5) corresponds to th

28、e set of envelopes i + 5j (j = O, ., 15 for 80 envelopes frames; j = O, ., 3 for the 20 envelopes frame) of each frame. Each phase contains either one 9.6 kbit/s or two 4.8 kbit/s or four 2.4 kbit/s or sixteen 0.6 kbit/s channels. Edition of March 15, 1986 CEPT T/CD*O2-OL*E 79 W 2326414 00034bb 5 T/

29、CD02-01 E 8 Configuration number Phase number 1 2 3 4 5 o1 9.6 9.6 9.6 9.6 9.6 4.6 2.4 0.6 4.8 2.4 0.6 2.4 0.6 0.6 - - 02 03 04 9.6 9.6 9.6 9.6 9.6 9.6 9.6 9.6 9.6 9.6 9.6 9.6 - 9.6 9.6 9.6 9.6 9.6 9.6 9.6 9.6 9.6 - 9.6 9.6 9.6 4.8 4.8 4.8 2.4 2.4 0.6 - 05 06 07 08 o9 10 9.6 9.6 9.6 9.6 9.6 9.6 9.6

30、9.6 9.6 9.6 9.6 9.6 9.6 9.6 9.6 9.6 9.6 9.6 9.6 9.6 9.6 9.6 9.6 9.6 9.6 9.6 9.6 9.6 9.6 9.6 9.6 - 9.6 9.6 9.6 9.6 9.6 9.6 9.6 9.6 9.6 9.6 4.8 4.8 4.8 4.8 4.8 4.8 4.8 4.8 4.8 4.8 2.4 2.4 2.4 2.4 0.6 4.8 4.8 4.8 4.8 4.8 4.8 4.8 4.8 4.8 4.8 2.4 2.4 2.4 2.4 0.6 2.4 2.4 2.4 2.4 0.6 0.6 - - 4.8 4.8 4.8 4.

31、8 4.8 4.8 2.4 2.4 2.4 0.6 4.8 4.8 4.8 2.4 2.4 0.6 2.4 2.4 0.6 0.6 4.8 2.4 0.6 2.4 0.6 0.6 2.4 0.6 0.6 0.6 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 4.8 4.8 4.8 4.8 4.8 4.8 2.4 2.4 2.4 0.6 2.4 2.4 2.4 0.6 0.6 4.8 4.8 4.8 4.8 4.8 4.8 2.4 2.4 2.4 0.6 2.4 2.4 2.4 0.6 0.6

32、 2.4 2.4 2.4 0.6 0.6 0.6 - 4.8 4.8 4.8 2.4 2.4 0.6 2.4 2.4 0.6 0.6 2.4 2.4 0.6 0.6 0.6 4.8 4.8 4.8 2.4 2.4 0.6 2.4 2.4 0.6 0.6 2.4 2.4 0.6 0.6 0.6 2.4 2.4 0.6 0.6 0.6 0.6 - 4.8 2.4 0.6 2.4 0.6 0.6 2.4 0.6 0.6 0.6 2.4 0.6 0.6 0.6 0.6 4.8 2.4 0.6 2.4 0.6 0.6 2.4 0.6 0.6 0.6 2.4 0.6 0.6 0.6 0.6 2.4 0.6

33、 0.6 0.6 0.6 0.6 - 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 4.8 4.8 4.8 4.8 4.8 4.8 4.8 4.8 4.8 4.8 4.8 4.8 4.8 4.8 4.8 2.4 2.4 2.4 2.4 2.4 0.6 Table 3 (T/CD 02-01). Allocation of tributary channels in the 64 kbit/s multiplex frame. -= Edition of March 15, 1986 CEPT T/CD*JZ-OL*

34、E 79 m 2326414 0003467 7 m 3. 3.1. 3.2. 3.2.1. 4. 4.1. 4.2. T/CD02-01 E Page 9 ALIG“ Envelope alignment at the tributary interface This paragraph is not applicable in the case in which the envelope structure is not present on subscriber The following main features should be fulfilled in any other ca

35、se. - Framing pattern in the F bits of consecutive envelopes: . . . O 1 O 1 . , . - Bit S transparently pass from tributary to 64 kbit/s interface and V.V. (except in some maintenance - Mean time for the recovery of envelope alignment after a slip and under the assumption of absence loop. operation)

36、. errors: 50 envelopes (provisional value). Frame alignment at 64 kbit/s interface The 72-bit and 19-bit pattern as defined in paragraph 2.1. for an 80 envelopes frame and in paragraph 2.2., for a 20 envelopes frame, provide the means for fast and secure frame alignment. General requirements i) The

37、frame synchronization method should be insensitive as far as possible to bit errors, error bursts and short bursts of AIS generated by transmission equipment. U) When a slip occurs in the transmission equipment a fast frame alignment recovery must be possible. i) The frame alignment recovery time, a

38、fter a slip and in absence of bit errors should be less than 120 envelopes with 95% probability; ii) The time from the start of a disturbance as defined in 3.2.1.i) to any action affecting the data channels including the transmission of alarm to the distant end defined in paragraph 2., shall be grea

39、ter than X (X in the range 1 s20 ms); iii) A random error rate of 1 in lo4 shali not cause any frame alignment recovery action. Framirig met (Iod pelformame FAULT CONDEXONS AND CONSEQUENT ACTIONS Fault conditions The multiplex equipment should detect the following fault conditions : - Failure of pow

40、er supply; - Failure of timing: - Loss of incoming signal at the tributary interface; - Loss of envelope alignment at the tributary interface; - Loss of incoming signal or frame alignment at the 64 kbit/s interface; - Alarm from far end. The need for an error rate monitoring is for further study. Co

41、nsequent actions Further to the detection of a fault condition, appropriate actions should be taken as specified in Table 4 When the Alarm indication signal (AIS) (see Note I) is detected at the 64 kbit/s interface, the local prompt alarm indication should optionally be inhibited and the AIS should

42、be sent on all tributaries. Note I: The equivalent binary content of the Alarm indication signal (AIS) is a continuous stream of 1 s. Note 2: The Alarm to far end is transmitted by changing bit A of 64 kbit/s framing pattern from the state 1 to the state O (see paragraph 2.). Note 3: When the prompt

43、 alarm is not inhibited, the AIS or subsequent loss of frame alignment is regarded as Service alarm indicating that the data service is interrupted. Note 4: It is for further study whether the Service alarm detected by means of AIS should be conveyed in a separate housekeeping bit, e.g. bit B, to th

44、e far end. (T/CD 02-01). I Edition of March 15, 1986 CEPT T/CD*02-01*E m 2326434 O003468 9 W TfCD02-01 E Page 10 Il I Equipment part Central part Receiving side from tributaries Receiving side from composite signal Fault conditions Power and timing failure (Other fault conditions may be relevant, e.

45、g. buffer over- flow) Loss of incoming signal Loss of envelope alignment Loss of incoming signal or frame alignment Alarm from far end Alarm Deferred Prompt Yes Yes Yes Yes Yes Towards tributary AIS on all tributaries Action Towards composite signal Network out of service after a specified period (N

46、ote 1) on the relevant tributary channel Network out of service after a specified period (Note 1) on the relevant tributary channel Alarm to far end Note: A yes in the Table signifies that an action should be taken as a consequence of the relevant fault condition. Table 4 (T/CD 02-01). Fault conditi

47、ons and consequent actions for X.50 multiplexor. Note 1: Signal during specified period to be D = 1, S = OFF. 5. TEST LOOPS A loop (or some loops) should be implemented for maintenance purposes. With reference to Figure 2 (T/CD 02-01) at least one of the following implementations is possible: - loop

48、 i (external channel loop), manually and/or automatically activated, locally and/or remotely controlled ; - loop k (digital logic channel loop), automatically activated, locally and/or remotely controlled; - loop 1 (digital logic channel loop, toward user), manually activated; - loop o (digital logi

49、c aggregate loop), manually activated; - loop x (external aggregate loop), manually activated; in some cases (when there is a built-in modem) it corresponds to loop 4. During the condition of loops i or k activated, the AIS signal must be automatically sent toward the user. As far as the control of loops i and k is concerned, it should be performed by mean of the multiplex signal, without interfering the transmission of the channels not interested by the loop. The signals for the activating and disactivating procedures should be inserted into