ARMY MIL-I-48634-1986 INTEGRATED CIRCUIT DIGITAL CMOS LOGIC ARRAY MONOLITHIC SILICON《铁制硅互补金属氧化物半导体制数字集成电路》.pdf
《ARMY MIL-I-48634-1986 INTEGRATED CIRCUIT DIGITAL CMOS LOGIC ARRAY MONOLITHIC SILICON《铁制硅互补金属氧化物半导体制数字集成电路》.pdf》由会员分享,可在线阅读,更多相关《ARMY MIL-I-48634-1986 INTEGRATED CIRCUIT DIGITAL CMOS LOGIC ARRAY MONOLITHIC SILICON《铁制硅互补金属氧化物半导体制数字集成电路》.pdf(50页珍藏版)》请在麦多课文档分享上搜索。
1、MIL-1-48634 (AR) 31 JULY 1986 MILITARY SPECIFICATION INTEGRATED CIRCUIT, DIGITAL, CMOS LOGIC ARRAY MONOLITHIC SILICON This specification is approved for use within the U.S. Army Armsiment, Munitions and Chemical Command, and is available for use by all Departments and Agencies of the Department of D
2、efense. 1. SCOPE 1.1 Scope. This specification establishes the performance, test, manufacturing and acceptance requirements for the logic array integrated circuit (I.C.) to be used in the M718El/M741El Mines. 2. APPLICABLE DOCUMENTS 2.1.1 L. Unless otherwise specified, the following specifications a
3、nd standards of the issue listed in that issue of the Department of Defense Index of Specifications and Standards (DoDISS) specified in the solicitation, form a part of this specification to the extend specified herein. SPEC1 FI CAT IONS MILITARY MI L-M- 3 8 5 1 O - Microcircuits, general MIL-1-4 5
4、208 - inspection system specification for. requirements. MIL-M-55565 - Microcircuits, preparation for delivery of. FSC 1375 AMSC N/A DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited. Provided by IHSNot for ResaleNo reproduction or networking permitted without license
5、from IHS-,-,-MIL-1-48634 (AR) STANDARDS MILITARY MIL-STD-105 - Sampling procedures and Tables for inspection by attributes. MIL-STD-883 - Test methods and procedures for microelectronics . MIL-STD-133 1 - Parameters to be controlled for the specification of micro- circuit s. MIL-STD-130 - Identifica
6、tion marking of U.S. military property. 2.1.2 Other Government documents, drawinqs, and publications. The following other Government documents form a part of this specification to the extend herein. DRAWINGS U. S. ARMY ARMAMENT, MUNITIONS AND CHEMICAL COMMAND PRODUCT AND PACKAGING DRAWINGS 9342578 -
7、 Logic Diagram, Logic Array, CMOS 9317646 - Qualification, Electronic Component. fzopies of specifications, standards, handbooks, drawings, and pubh.cations required by manufacturers in connection with specific acquisition functions should be obtained from the Contracting activity or as directed by
8、the contracting officer.) 2.1.3 Order of precedence. In the event of a conflict between the text of this specification and the references cited herein, the text of this specification shall take precedence. 3. REQUIMMENTS 3.1 Parts and Materials. 3.1.1 Components. The I.C. shall comply with all the r
9、equirements of the applicable drawings, specifications and standards. 3.1.2 Metals. External metal surface shall be corrosion resistant or shall be plated or treated to resist corrosion. External leads shall meet the requirements specified in 3.5.3. 2 Provided by IHSNot for ResaleNo reproduction or
10、networking permitted without license from IHS-,-,-MIL-I-4b3Y 23 W 9977706 0322627 LI MIL-1-48634 (AR) 3.Pe3 Other materials. External. parts, elements or coatings including m-ot blister, crack, soften, flow or exhibit defect that adversely affect storage, operation or environmental capabilities of t
11、he integrated circuit delivered to this specification under the specified test condition. 3.2 1. 1.C. design and construction shall be in accordance with the requirements specified herein and in the applicable specifications OE drawings. 3.2.1 Dimensions. The package dimension shall conform to MIL-M
12、-38510- C, Case Outline D6, Configuration 1. 3.2.2 Packaqe. The finished component shall be supplied in a 18 pin, dual-in-line hermetically sealed package. The package shall be of the type shown in Figure 1, utilizing a ceramic lid, a ceramic base with gold deposit fo mounting the die, Alloy 42 or K
13、ovar solid metal lead frame thru to cavity with aluminum cladding, and a glass frit to accomplish the seal between the lid, lead frame and the base frit seal temperature shall be in excess of 400OC. No organic or polymeric material. shall. be used inside the package. 3.2.3 Passivation. The chip shal
14、l be passivated with silicon dioxide and/or silicon nitrade to render it impervious to contaminated environments. The bonding pad areas shall be the only areas with no surface passivation. 3.2.4 Static charge protect ion. Static charge protect ion shall be provided internally on all terminals. 3.2.5
15、 Pin assignments shall be as shown in Figure 2. 3.3 Desiqn documentation. When specified in the procurement document, design , topography and schematic circuit information for the microcircuit supplied under this specification shall be submitted to the procuring activity. Unless otherwise specified,
16、 all design documentation shall be sufficient to depict completely the physical and electrical construction of the microcircuit supplied under this specification, and shall be traceable to the specific production lot (s) and inspection lot codes under which microcircuit are manufactured and tested s
17、o that revisions can be identified. 3.3.1 Die topoqraphy. For microcircuit dies, there shall be an enlarqed color photograph (s) showing the topography of elements of the die to a minimum magniEication of 80X. If this results in a photograph larger than 8“ x lo“, the magnification may be reduced to
18、accommodate an 8“ x 10“ view. 3 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-I-iBb34 13 9999906 0322b28 b 4 FRIT Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SA SB PTB 1 - 2 c_I 3 MIL-1-4863
19、4 (AR) 4 GC - DD COW CLK -INCF, -1NIT FIGURE 2 -PIN ASSIGNbmNT 5 NC vss NC NC +INCR +INIT Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-1-48643 (AR) 3.3.2 Logic diaqram. The actual logic diagrams of the microcircuit supplied under this specific
20、ation shall be provided, showing all the logic/circuit elements functionally designed into the microcircuit together with their values, when applicable. 3.3.3 Country of manufacturer. The component specified herein shall be manufactured, assembled and tested within the USA or its territories or by a
21、 foreign source complyinq with the provisions of the defense standardization manual, DOD 4120.3-M, paragraph 4-106.6, subject to the approval of the Government Technical Agency. (See 6.4). 3.4 Electrical requirements. 3.4.1 Maximum Rating. (As specified in Table 1) TABLE 1. MAXIMUM RATING Characteri
22、stic Symbol Ratinq (See 3.4.3) Temper at ur e D C Supply Voltage VDD -0.3 to +10 All Inputs VIN -0.3 to +10 Oper at ing TA (OP) -55 to +I25 Storage TA (STG) -65 to 1150 Unit Volts Volts OC oc - 3.4.2 Performance characteristics. (As specified in Table 2) 3.4.2.1 The I.C. circuit shall function in ac
23、cordance with the logic diagram as specified in dwg. 9342578 when operated under power supply requirements as specified in paragraph 3.4.3. 3.4.3 Power supply requirements. The component shall be capable of functioning with a power supply having the following requirements. 3.4.3.1 The output impedan
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