ANSI INCITS TR-18-1997 Information Technology Fibre Channel - 10-bit interface《信息技术.光纤通道.10-bit接口》.pdf

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1、INCITS TR-18-1997Information Technology Fibre Channel - 10-bit interfaceCopyright American National Standards Institute Provided by IHS under license with ANSINot for ResaleNo reproduction or networking permitted without license from IHS-,-,-X3s Technical Report Series This Technical Report is one i

2、n a series produced by the Accredited Standards Committee, X3, Information Technology. The Secretariat for X3 is held by the Information Technology Industry Council (ITI), 1250 Eye Street, NW, Suite 200, Washington, DC 20005. As a by-product of the standards development process and the resources of

3、knowledge devoted to it, X3 from time to time produces Technical Reports. Such Technical Reports are not standards, nor are they intended to be used as such. X3 Technical Reports are produced in some cases to disseminate the technical and logical con- cepts reflected in standards already published o

4、r under development. In other cases, they derive from studies in areas where it is found premature to develop a standard due to a still-changing technology, or inappropriate to develop a rigorous standard due to the existence of a number of viable options, the choice of which depends on the users pa

5、rticular requirements. These Technical Reports, thus, provide guidelines, the use of which can result in greater consistency and coherence of information processing systems. When the draft Technical Report is completed, the Technical Committee approval process is the same as for a draft standard. Pr

6、ocessing by X3 is also similar to that for a draft standard. CAUTION: The developers of this technical report have requested that holders of patents that may be required for the implementation of the technical report disclose such patents to the publisher. However, neither the developers nor the pub

7、lisher have undertaken a patent search in order to identify which, if any, patents may apply to this technical report. As of the date of publication of this technical report, following calls for the identification of patents that may be required for the implementation of the technical report, notice

8、 of one or more such claims has been received. By publication of this technical report, no position is taken with respect to the validity of this claim or of any rights in connection therewith. The known patent holder(s) has (have), however, filed a statement of willingness to grant a license under

9、these rights on reasonable and nondiscriminatory terms and conditions to applicants desiring to obtain such a license. Details may be obtained from the publisher. No further patent search is conducted by the developer or publisher in respect to any technical report it processes. No representation is

10、 made or implied that this is the only license that may be required to avoid infringement in the use of this technical report. Published by American National Standards Institute 11 West 42nd Street, New York, New York 10036 Copyright 01 997 by American National Standards Institute All rights reserve

11、d. No part of this publication may be reproduced in any form, in an electronic retrieval system or otherwise, without prior written permission of the publisher. Printed in the United States of America Copyright American National Standards Institute Provided by IHS under license with ANSINot for Resa

12、leNo reproduction or networking permitted without license from IHS-,-,-X3/TR-18-1997 Revision 2.3 X3 Technical Report - Fibre Channel - IO-bit Interface Secretariat Information Technology Industry Council Abstract The Fibre Channel - 10-bit Interface document defines the electrical characteristics o

13、f the interface between the physical (FC-0) layer and the transmission protocol (FC-1) layer at the 1 062,5 Mbaud rate. This method of implementation deviates from the method described in FC-PH and allows for lower cost Arbitrated Loop (FC-AL) applications using this specification to interoperate. C

14、opyright American National Standards Institute Provided by IHS under license with ANSINot for ResaleNo reproduction or networking permitted without license from IHS-,-,-Fibre Channel . IO-bit Interface REV 2.3, May 30. 1996 Contents Page Foreword . ii 1Scope . 2Normativereferences 1 3Definitionsandc

15、onvention 2 4Functionaldescription . 3 5Electricaldefinitions . 5 6Transmitinterface . 7 Annex 7Receiveinterface . 8 AClockingmethods . 10 Figures 110-bitinterfacediagram 1 2 Input output valid level for AC measurements . 6 3Riseandfalltimedefinition . 6 4 Transmit interface timing diagrams . 7 5 Re

16、ceive interface timing diagram . 9 A.l Clocking scheme for TBC = REFCLK . 10 A.2 Clocking scheme for TBC sourced from Protocol layer . 11 A.3 Clocking scheme for TBC clocking only . 12 ISignaldefinitions . 4 2 Reserved control signal combinations . 5 3 TTUCMOS electrical characteristics 5 4Transmiti

17、nterfacetiming . 7 5Commasequencedefinition . 8 6Receiveinterfacetiming 9 i Copyright American National Standards Institute Provided by IHS under license with ANSINot for ResaleNo reproduction or networking permitted without license from IHS-,-,-Fibre Channel - IO-bit Interface REV 2.3, May 30, 1996

18、 Foreword (This Foreword is not part of X3 Technical Report X3.18-199x) The Fibre Channel - IO-bit Interface defines the electrical characteristics of the interface between the physical (FC-0) layer and the transmission protocol (FC-1) layer at the 1 062,5 MBaud rate. This method of implementation d

19、eviates from the method described in FC-PH and allows for lower cost Arbitrated Loop (FC-AL) applications using this specification to interoperate. This technical report was developed by Task Group X3T11 of Accredited Standards Committee X3 starting in 1994. The technical report approval process sta

20、rted in 1995. This document includes one annex which is informative and is not considered part of the technical report. Request for interpretation, suggestions for improvement or addenda, or defect reports are welcome. They should be sent to the X3 Secretariat, Information Technology Industry Counci

21、l, 1250 Eye Street, NW, Suite 200, Washington, DC 20005-3922. This technical report was processed and approved for submittal to ANSI by Accredited Standards Commit- tee on Information Technology, X3. Committee approval of the technical report does not necessarily imply that all committee members vot

22、ed for approval. At the time it approved this technical report, the X3 Com- mittee had the following members: James D. Converse, Chair Karen Higginbottom, Vice Chair Kate McMillan, Secretary Oraanization ReDresented Name of ReDresentative AMP Incorporated. . Ben Bennett (P) Edward Kelly (A) Apple Co

23、mputer Inc David K. Michael (P) Jerry Kellenbenz (A) AT i.e., the thousands and higher multiples are separated by a space and a comma is used as the decimal point. A comparison of the American and IS0 conven- tions are shown: the text shall take precedence. Exceptions to this convention are indicate

24、d in the appropriate sec- tions. In all the figure, tables, and text of this document, the most significant bit of a binary quantity is shown on the left side. Exceptions to this conven- tion are indicated in the appropriate sections. The term “shall“ is used to indicate a mandatory rule. If the man

25、datory rule is not followed, the results are unpredictable unless indicated other- wise. If a field or control bit in a frame is specified as not meaningful, the entity which receives the frame shall not check that field or control bit. Hexadecimal notation Hexadecimal notation is used to represent

26、fields. For example, a three byte D-ID field containing a binary value of 11111111 11111111 11111010 is denoted by FF FF FA. 3.3 Abbreviations, acronyms and sym- bols Abbreviations and acronyms applicable to this Technical Report are listed. Definitions of several of these items are included in clau

27、se 3.1 Defini- tions“. FC Fibre Channel PLL Phase Lock Loop PPm parts per million IS0 American 0,6 0.6 1 000 1,000 1 323 462,9 1,323,462.9 2 Copyright American National Standards Institute Provided by IHS under license with ANSINot for ResaleNo reproduction or networking permitted without license fr

28、om IHS-,-,-Fibre Channel - IO-bit Interface REV 2.3, May 30, 1996 4 Functional description This document defines a IO-bit interface between the Transmission protocol layer and the Physical layer in Fiber Channel implementations. The inter- face is divided into the “Transmit Interface“ and the “Recei

29、ve Interface“. The Transmit Interface is defined as an input to the Physical layer with a IO-bit wide transmit data bus and its associated transmit byte clock. The refer- ence clock is a 106,25 MHz (+IO0 ppm) signal. The Transmission protocol layer presents data to the Physical layer relative to the

30、 rising edge of the transmit byte clock, the Physical layer accepts data on the rising edge of every clock cycle. The Receive Interface is defined as an output of the Physical layer. It is comprised of a IO-bit wide data bus, two receive byte clocks, an optional enable comma detection and a comma de

31、tect indi- cation. The receive clocks operate at 53,125 MHz and are 180“ out of phase with each other. The 106,25 MBaud receive data is presented to the Transmission protocol layer relative to the rising edge of each of the two receive byte clocks. Two other signals complete the definition of the 10

32、- bit interfaces: The first is the wrap or loopback sig- nal, this is defined as an input to the Physical layer and causes the serialized transmit data to be looped back to the auxiliary receiver inputs. The second is the lock to reference signal, this signal is defined as an input to the Physical l

33、ayer and forces the receiver PLL to lock to the reference clock. 4.1 Data flow The IO-bit data presented to the Physical layer shall be serially transmitted sequentially to the cable plant bit 0 through bit 9, the relationship of transmit bits and the 8B/10B characters are described in annex N of FC

34、-PH. The receiver in the Physical layer shall receive and frame data at an arbitrary byte boundary until a comma sequence is received. The receiver shall realign its current byte boundary, if necessary to that of the received comma. This process is referred to in this document as “byte alignment“. D

35、uring the byte alignment process the Physical layer may delete up to 4 characters in order to align the correct receive clock and the data byte contain- ing the comma character (byte 0). This process is referred to as “byte slipping“. 3 4.2 Electrical interface signals The Interface signals listed b

36、elow shall comprise the minimum set of signals which must be supplied for compliance with this Technical Report. 4.2.1 TX0,9 TX0,9 is the IO-bit parallel transmit data pre- sented to the Physical layer for serialization and transmission onto the media. The order of trans- mission is TXO first, follo

37、wed by TX1 through TX9. 4.2.2 TBC TBC is the 106,25 MHz transmit byte clock. This byte clock is used to latch data into the Physical layer for transmission. If this clock is used as the transmitter PLL reference, it shall have the same +I 00 ppm tolerance as the REFCLK. TBC shall be frequency locked

38、 to REFCLK. 4.2.3 EWRAP EWRAP shall causes the Physical layer devices to electrically loop serialized transmit data to the deserializer. The primary serial outputs on the transmitter shall be held in a static state during EWRAP operation. EWRAP may be tied low (func- tion disabled) by the Transmissi

39、on protocol layer. 4.2.4 RX0,9 RX0,9 is the IO-bit parallel receive data pre- sented to the Transmission protocol layer for fur- ther processing. The receive data byte 0 containing the comma character shall be byte aligned to RBCl; this is to say that byte 0 is in phase with RBCl. 4.2.5 RBCO RBCO is

40、 the 53,125 MHz receive byte clock that the protocol device shall use to latch the bytes 1 and 3 of the receive data word. This clock may be stretched during byte and word alignment, and shall not be truncated or slivered. 4.2.6 RBC1 RBCI is the 53,125 MHz receive byte clock that the protocol device

41、 shall use to latch the bytes 0 and 2 of the receive data word. RBCI is 180“ out of phase with RBCO. This clock may be stretched during byte and word alignment, and shall not be truncated or slivered. Copyright American National Standards Institute Provided by IHS under license with ANSINot for Resa

42、leNo reproduction or networking permitted without license from IHS-,-,-Fibre Channel - 10-bit Interface REV 2.3, May 30, 1996 4.2.7COM-DET COM-DET signal is an indication that the data byte (byte 0 of word 0) associated with the current RBC1 contains a valid comma character. The Physical layer shall

43、 be required as a minimum, to detect the ?-bit comma+ character. The Physical layer shall provide this signal as an output, but the Transmission protocol layer may optionally ingnore use of the signal as an input. 4.2.8 -LCK-REF -LCK-REF causes the Physical layer receiver to lock its PLL to REFCLK.

44、The Physical layer shall be frequency locked within 500 ps. This function may optionally not be utilized in the Physical layer (i.e., auto-lock to reference), but the 500 ps fre- quency lock requirement is still valid. 4.2.9 REFCLK REFCLK is the 106,25 MHz transmit PLL reference clock. The frequency

45、 tolerance for this clock shall be *IO0 ppm. REFCLK is used by the transmitter PLL to generate the 1 0623 MHz bit rate clock. REFCLK is used by the receiver when -LCK-REF is active. REFCLK may be the same signal as TBC. 4.2.1 0 EN-CDET EN-CDET enables the Physical layer to perform the byte alignment

46、 function on the comma sequence. When EN-CDET is asserted the byte alignment function is operational. The Physical layer may have the byte alignment function always enabled. 4.3 Signal definitions The signals listed below in table 1 shall be required at the specification interface, but all signal fu

47、nc- tions may not be utilized by the Physical or Trans- mission protocol layers. Table 1 - Signal definitions 4 Copyright American National Standards Institute Provided by IHS under license with ANSINot for ResaleNo reproduction or networking permitted without license from IHS-,-,-Fibre Channel - 10

48、-bit Interface REV 2.3, May 30, 1996 4.4 Reserved control signals Table 2 list the 10-bit interface control signals and allowed combinations. Table 2 - Reserved control signal combinations EWRAP L L L L H H H H -LCK-REF H H L H H L L L H H L H H L L L EN-CDET Interpretation Undefined Lock receiver P

49、LL to REFCLK Normal operation; COM-DET disabled Normal operation: COM-DET enabled Undefined Undefined Loop transmit data to receiver: COM-DET disabled Loop transmit data to receiver; COM-DET enabled associated *with the TTLKMOS outputs of the compliant. Physical layer. Table 3 - TTLICMOS electrical characteristics r Refers to the driving device power supply. 5 Copyright American National Standards Institute Provid