UL 1741 CRD-2016 UL Standard for Safety Inverters Converters Controllers and Interconnection System Equipment for Use With Distributed Energy Resources - Section Paragraph Referen.pdf

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1、UL COPYRIGHTED MATERIAL NOT AUTHORIZED FOR FURTHER REPRODUCTION ORDISTRIBUTION WITHOUT PERMISSION FROM ULUNDERWRITERS LABORATORIES INC. CERTIFICATION REQUIREMENT DECISIONThis Certification Requirement Decision is prepared by UL LLC. It is normative for the applicable ULProduct Certification Program(

2、s); however, it is currently not part of the UL Standard(s) referencedbelow.Product Category (CCN): QIKHStandard Number: UL 1741Standard Title: Standard for Inverters, Converters, Controllers and InterconnectionSystem Equipment for Use With Distributed Energy ResourcesEdition Date: January 28, 2010E

3、dition Number: 2Section / Paragraph Reference: New Sections 40B1- 40B2Subject: Additional Requirements for Single Phase 2 Wire Utility InteractiveInverters Connected to Single Phase 3 Wire EPS Circuits.DECISION:The requirements below include new definitions and a new Section 40B, to be used for the

4、evaluation ofinverters with single phase two wire power output circuits (L1-L2) that are rated for connection to singlephase 3 wire (L1-N-N2) EPS circuits. These requirements do not apply to single phase 2 wire invertersrated for connection to three phase EPS circuits.DefinitionsSingle Phase 2 Wire

5、Utility Interactive InverterAsinglephase inverter with only two outputterminals/conductors that are rated to be connected to EPS L1 and L2 (line to line connection). Theseinverters do not include an ungrounded / neutral conductor in the power export or EPS measurementcircuit.Single Phase 3 wire Util

6、ity Interactive Inverter A single phase inverter with two output powerterminals/conductors and a neutral/grounded terminal/conductor. These inverters are rated for connectionto EPS L1, L2 and Neutral or Ground. These inverters may export power Line to Line (L-L) or Line toNeutral to Line (L-N-L). Th

7、ese inverters monitor voltage between L1 and L2 and the neutral or groundedconductor.Add the following Sections to UL 1741.40B1 Two Wire Inverters connected to 3 Wire SystemsGeneral single phase 2 wire inverters rated for connection to single phase 3 wire EPS systems shallcomply with the performance

8、 criteria for single phase 3 wire inverters including response to abnormalvoltages including line to line and line to neutral. Single phase 3 wire protection provides both utilityprotective functions and overvoltage protection for local connected loads wired between each line andneutral. Single phas

9、e 2 wire inverters rated for connection to 3 wire single phase systems shall respondto single phase 3 wire abnormal voltage conditions that can differ between each line and neutral.40B1.1 The requirements in Sections 40B1 40B2 supplement and, in some cases, amend therequirements in Section 40.40B1.2

10、 The requirements in Sections 40B1 40B are designed to represent worst case conditions thatcould potentially generate Line to Neutral voltage imbalances where single phase 2 wire inverters areconnected to single phase 3 wire single phase EPS circuits.UL COPYRIGHTED MATERIAL NOT AUTHORIZED FOR FURTHE

11、R REPRODUCTION ORDISTRIBUTION WITHOUT PERMISSION FROM UL40B2 Testing Procedures40B2.1 Over and under Voltage Trip Tests40B2.1.1 Single phase 2 wire inverter shall comply with the Test for Response to Abnormal VoltageConditions as described in Section 5.2 of IEEE 1547.1 (2005) line to neutral and lin

12、e to line. The invertershall comply with the test requirements within the inverters rated Manufacture Stated Accuracy (MSA) forall L-L and L-N voltage measurements.Note: this test shall be applied in the same manner as if the inverter is a single phase, 3 wire inverter eventhough the EUT is a single

13、 phase, 2 wire inverter that is connected line to line.40B2.2 Open Phase Test40B2.2.1 The Single phase 2 wire inverter shall comply with Test for Response to Abnormal VoltageConditions as described in Section 5.9 of IEEE 1547.1 (2005) with the below modifications to step c) andd) of the IEEE 1547.1

14、test method:c) Open one phase conductor disconnect while the EUT is operating at 100%*, 66%*, 33%* ofunit rated output current and at greater of a) 5% of rated output current or b) the EUTsminimum output current.* The power output shall be adjusted to the target level 5%.d) Record the clearing time

15、and maximum RMS voltage at the unit output terminals andbetween the unit output terminals and load circuit neutral shown in Figure 40B2.40B2.2.2 Two Wire Voltage Imbalance Trip TestThis test uses the balanced load anti-islanding test setup1in Section 5.7 IEEE 1547.1 2005 as modifiedin Figure 40B2 be

16、low:1While this test uses the anti-islanding test setup it is not intended to demonstrate compliance with Section 5.7.This is generated text for figtxt.STANDARD NUMBER: UL 1741 -2-UL COPYRIGHTED MATERIAL NOT AUTHORIZED FOR FURTHER REPRODUCTION ORDISTRIBUTION WITHOUT PERMISSION FROM ULThe single resi

17、stive element used in Section 5.7 of IEEE 1547.1 (2005) is connected from Line 1 to Line2. This single element is replaced with two resistive elements connected Line 1 to Neutral and Line 2 toNeutral to allow creation of imbalanced voltages between Line 1 to Neutral and Line 2 to Neutral loadswhen t

18、he test circuit is separated from the EPS by opening S1.Conduct the following test sequence:a) Record all relevant unit operating parameters.b) Adjust Simulated Utility to nominal voltage (Example: 120Vac/120Vac = 240Vac) andfrequency (60 Hz).c) Close Switch S1.d) Adjust power of EUT to 100% (5%) of

19、 rated output.e) The first test iteration shall be performed at the 50%-50% condition where R150%+R250%=RTotaland R1= R2 (2%) Adjust R1 and R2 to null the active current flowing through switch S1within 2% of unit rating. Record the value of RTotal. This RTotalvalue will be used as the basisfor all o

20、ther non 50% -50% load conditions defined for R1 and R2 in the table below.Note: The intention is that the RLC circuit will be balanced against the EUT outputpower after the S1 switch is opened. The RLC circuit current will only be balanced priorto opening the S1 switch for the R150%+R250%load condi

21、tion and the other testconditions will have a L1- neutral and L2_neutral imbalance prior to opening S1.Figure 40B2Test Set up for 2 wire imbalanced trip testingSTANDARD NUMBER: UL 1741 -3-UL COPYRIGHTED MATERIAL NOT AUTHORIZED FOR FURTHER REPRODUCTION ORDISTRIBUTION WITHOUT PERMISSION FROM ULf) For

22、each test condition in Table 40B1, adjust R1 and R2 such that they sum to the RTotalvalue recorded in step e) above, i.e. R1 +R2 will consume the EUT active power outputcomponent 2% after the S1 switch is opened.g) Adjust C and L to produce a Q 1.0 and null active and reactive current flowing throug

23、h S1to less than 2% of the EUT rated output current on each phase. Record the values of all LRCcircuit components and unit ratingsh) Adjust RTotal(R1+R2), L, and C until the fundamental frequency current through switch S1 isless than 2% of the rated current of the EUT.Note: the 2% current level is o

24、nly valid at the 50-50 resistor split level where R1=R2i) Record voltages across R1 (Line 1-N), R2 (Line 2-N), the resistance of R1, R2 and RTotal.The sum of R1plus R2 will need to be equal to RTotal2% from condition e) above for each testcondition. Record the fundamental frequency first harmonic cu

25、rrent through both legs of switchS1j) Open switch S1.k) Record voltages and clearing times for R1 (Line 1-N), R2 (Line 2-N) and the sum of R1+R2(Line 1 Line 2). Repeat this step two additional times for a total of 3 tests at each testconditionl) Repeat steps f) through k) for all values of resistanc

26、e in Table 40B1 below.m) Repeat steps f) through m) at EUT active power levels of 66% (5%) and 33% (5%) ofEUT rating.n) Remove C and L from the test circuit. Repeat steps c) - m) skipping step g) for eachiteration.Note: Q (quality factor) calculations can be found in IEEE 1547.1 section 5.7The clear

27、ing time results for the testing conducted in Section 40B.1 to 40B2.2.2 for (Line 1-N) and (Line2-N) shall comply with the default magnitude and durations for clearing times described in Table 1 ofSection 4.2.3 of IEEE 1547 (2003), as amended by IEEE 1547.a (2014) and the EUT shall not exportcurrent

28、 for more than 2 seconds following the opening of S1 for the voltage range 88% to 110% of nominalvoltage.STANDARD NUMBER: UL 1741 -4-UL COPYRIGHTED MATERIAL NOT AUTHORIZED FOR FURTHER REPRODUCTION ORDISTRIBUTION WITHOUT PERMISSION FROM ULTable 40B1(Ohms) Projected VoltagesR1 R2Percent of RTotalPerce

29、nt of RTotal(approx.) (approx.) R1+R2=RTotalL1-N L2-N L1-L25% 95% 100% (2%) 12 228 24010% 90% 100% (2%) 24 216 24015% 85% 100% (2%) 36 204 24020% 80% 100% (2%) 48 192 24025% 75% 100% (2%) 60 180 24030% 70% 100% (2%) 72 168 24035% 65% 100% (2%) 84 156 24040% 60% 100% (2%) 96 144 24045% 55% 100% (2%)

30、108 132 24050% 50% 100% (2%) 120 120 24055% 45% 100% (2%) 132 108 24060% 40% 100% (2%) 144 96 24065% 35% 100% (2%) 156 84 24070% 30% 100% (2%) 168 72 24075% 25% 100% (2%) 180 60 24080% 20% 100% (2%) 192 48 24085% 15% 100% (2%) 204 36 24090% 10% 100% (2%) 216 24 24095% 5% 100% (2%) 228 12 240Table 40

31、B1 Test conditions for resistive elements during 2 Wire Voltage Imbalance Trip Test with theLCR load conditions and again with only the resistive load elements (no LC elements). The test is to berepeated for the resistive only load case n) from the prescribed testing sequence above.RATIONALE FOR DEC

32、ISION:Historically the requirement for detecting line to neutral voltages in single phase 3 wire interconnectionshas resided in IEEE 1547 (2003). This requirement is proposed to be removed in future versions of IEEEstandard as line to line connected, 2 wire interactive inverters typically cannot cau

33、se a voltage imbalancewhile connected to the area EPS. The existing IEEE 1547 requirements are intended to protect the EPSand there are additional concerns related to potential voltage imbalances on an area EPS when a 2 wire(Line - Line) interactive inverter is disconnected from a three wire (Line-

34、Neutral- Line) area EPS. Underthese conditions voltage imbalances can occur from a load based voltage divider condition between singlephase loads wired between L1-N and L2-N. This voltage divider can impose an over voltage condition onone of the two phases that may damage loads powered by that phase

35、 on the local EPS when connectedin parallel with the 2 wire interactive inverter during the time it takes to for the interactive inverter to ceasecurrent export. This same voltage imbalance may occur with single phase three wire inverters that utilizeL-N or L-G voltage sensing, since these inverters

36、 are not required to export current through the neutralconductor.Under normal operating conditions the EPS maintains a voltage balance between each of the two EPSphases and neutral. Once the inverter is disconnected from the EPS the inverter operational requirementsare no longer within the scope of

37、IEEE 1547 (2003) and any voltage imbalance related issues are notaddressed. This CRD introduces additional testing requirements to verify the various types of utilitySTANDARD NUMBER: UL 1741 -5-UL COPYRIGHTED MATERIAL NOT AUTHORIZED FOR FURTHER REPRODUCTION ORDISTRIBUTION WITHOUT PERMISSION FROM ULi

38、nteractive inverters comply with the default magnitude and duration limits for abnormal voltages requiredby Section 4.2 IEEE 1547 (2003) when those systems are disconnected, intentionally or unintentionally,from the area EPS.Copyright 2016 UL LLCUL LLC, in performing its functions in accordance with

39、 its objectives, does not guarantee or warrant thecorrectness of Certification Requirement Decisions it may issue or that they will be recognized or adoptedby anyone. Certification Requirement Decisions are the opinion of UL LLC. in practically applying therequirements of the standard. They do not r

40、epresent formal interpretations of the standard underAmerican National Standards Institute (ANSI) processes. UL LLC shall not be responsible to anyone forthe use of or reliance upon Certification Requirement Decisions by anyone. UL LLC shall not incur anyobligation or liability for damages, includin

41、g consequential damages, arising out of or in connection withthe use or reliance upon Certification Requirement Decisions. The electronic version of the CertificationRequirement Decision is the current version and previously printed copies may be outdated.This document is published as a service to ULs certification customersSTANDARD NUMBER: UL 1741 -6-