SAE J 1708-2010 Serial Data Communications Between Microcomputer Systems in Heavy-Duty Vehicle Applications《在重型车辆应用微机系统之间的串行数据通信》.pdf

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1、_SAE Technical Standards Board Rules provide that: “This report is published by SAE to advance the state of technical and engineering sciences. The use of this report is entirely voluntary, and its applicability and suitability for any particular use, including any patent infringement arising theref

2、rom, is the sole responsibility of the user.” SAE reviews each technical report at least every five years at which time it may be reaffirmed, revised, or cancelled. SAE invites your written comments and suggestions. Copyright 2010 SAE International All rights reserved. No part of this publication ma

3、y be reproduced, stored in a retrieval system or transmitted, in any form or by any means, electronic, mechanical, photocopying, recording, or otherwise, without the prior written permission of SAE. TO PLACE A DOCUMENT ORDER: Tel: 877-606-7323 (inside USA and Canada) Tel: +1 724-776-4970 (outside US

4、A) Fax: 724-776-0790 Email: CustomerServicesae.org SAE WEB ADDRESS: http:/www.sae.orgSAE values your input. To provide feedback on this Technical Report, please visit http:/www.sae.org/technical/standards/J1708_201012SURFACEVEHICLERECOMMENDEDPRACTICEJ1708 DEC2010 Issued 1986-01Revised 2010-12 Supers

5、eding J1708 OCT2008 Serial Data Communications Between Microcomputer Systems inHeavy-Duty Vehicle Applications RATIONALEAdded MID 125 Assignment from SAE J2497 and made changes to Applicable Documents and other minor document fixes to bring SAE J1708 in line with current SAE Standards format. FOREWO

6、RDThe SAE group responsible for the content of this recommended practice was revised to the SAE Low Speed Communications Network Subcommittee sponsored by the SAE Truck and Bus Electrical and Electronics Committee. This Document was revised to comply with the new SAE Technical Standards Board format

7、. Earlier versions of this document stated: This SAE/TMC Joint Recommended Practice has been developed by the Truck and Bus Electronic Interface Subcommittee of the Truck and Bus Electrical Committee and by the S.1 Study Group of the Maintenance Council. The objectives of the subcommittee are to dev

8、elop information reports, recommended practices, and standards concerned with the interface requirements and connecting devices required in the transmission of electronic signals and information among truck and bus components. Objectives: Some of the goals of the subcommittee in developing this docu

9、ment were to: a. Minimize hardware cost and overhead. b. Provide flexibility for expansion and technology advancements with minimum hardware and software impact on in-place assemblies. c. Utilize widely accepted electronics industry standard hardware and protocol to give designers flexibility in par

10、ts selection. d. Provide a high degree of electromagnetic compatibility. e. Provide original equipment manufacturers, suppliers, and aftermarket suppliers the flexibility to customize for product individuality and for proprietary considerations. Copyright SAE International Provided by IHS under lice

11、nse with SAENot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SAE J1708 Revised DEC2010 Page 2 of 14TABLE OF CONTENTS 1. SCOPE 31.1 Purpose . 32. REFERENCES 32.1 Applicable Publications . 32.1.1 SAE Publications . 32.1.2 EIA Publication 33. DEFINITIONS . 43.1 Bus Acc

12、ess Time 43.2 Baud 43.3 Bit Time . 43.4 Character 43.5 Character Time . 43.6 Contention . 43.7 Differential Signal 43.8 Idle State . 43.9 Idle Line . 43.10 Message Priority . 43.11 Node 43.12 Start Bit 53.13 Stop Bit 54. ELECTRICAL PARAMETERS 54.1 Logic State 54.2 Bus State . 54.2.1 Logic High State

13、 54.2.2 Logic Low State . 54.3 Network Capacity 54.4 Bus Termination 54.5 Ground 54.6 Wire . 64.7 Length . 65. NETWORK PARAMETERS 65.1 Network Topology . 65.2 Network Access 65.2.1 Idle Line - Bus Synchronization by a Receiver . 65.2.2 Bus Access . 75.2.3 Bus Contention 96. PROTOCOL 96.1 Bit Time .

14、96.2 Character Format 96.3 Message Format . 96.3.1 Message Content 96.3.2 Inter-Character Bit Time 106.3.3 Message Identification Character (MID) . 106.3.4 Data Characters 116.3.5 Checksum . 126.3.6 Message Length 126.3.7 Message Length Exceptions . 127. NOTES 127.1 Marginal Indicia . 12Copyright SA

15、E International Provided by IHS under license with SAENot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SAE J1708 Revised DEC2010 Page 3 of 14APPENDIX A SERIAL DATA BUS STANDARD NODE (UNIPOLAR DRIVE WITH PASSIVE TERMINATION IN EACH MODULE) 13APPENDIX B EXAMPLE BUS RE

16、ACCESS PROCEDURE 141. SCOPE This SAE Recommended Practice defines a recommended practice for implementing a bidirectional, serial communication link among modules containing microcomputers. This document defines those parameters of the serial link that relate primarily to hardware and basic software

17、 compatibility such as interface requirements, system protocol, and message format. The actual data to be transmitted by particular modules, which is an important aspect of communications compatibility, is not specified in this document. These and other details of communication link implementation a

18、nd use should be specified in the separate application documents referenced in Section 2. 1.1 Purpose The purpose of this document is to define a general-purpose serial data communication link that may be utilized in heavy-duty vehicle applications. It is intended to serve as a guide toward standard

19、 practice to promote serial communication compatibility among microcomputer-based modules. The primary use of the general-purpose communications link is expected to be the sharing of data among stand-alone modules to cost effectively enhance their operation. Communication links used to implement fun

20、ctions that require a dedicated communication link between specific modules may deviate from this document. 2. REFERENCES 2.1 Applicable Documents The following publications form a part of this specification to the extent specified herein. Unless otherwise indicated, the latest issue of SAE publicat

21、ions shall apply. It is recommended that a separate applications document be published by the manufacturer for each device using the serial link. These documents should define the data format, message I.D.s, message priorities, error detection (and correction), maximum message length, percent bus ut

22、ilization, and methods of physically adding/removing units to/from the line for the particular application. 2.1.1 SAE Publications Available from SAE International, 400 Commonwealth Drive, Warrendale, PA 15096-0001, Tel: 877-606-7323 (inside USA and Canada) or 724-776-4970 (outside USA), www.sae.org

23、.SAE J1455 Recommended Environmental Practices for Electronic Equipment Design in Heavy-Duty Vehicle ApplicationsSAE J1587 Electronic Data Interchange Between Microcomputer Systems in Heavy-Duty Vehicle Applications SAE J1922 Powertrain Control Interface for Electronic Controls Used in Medium- and H

24、eavy-Duty Diesel On-Highway Vehicle Applications SAE J2497 Power Line Carrier Communications for Commercial Vehicles 2.1.2 EIA Publication Available from Electronic Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834, Tel: 703-907-7500, www.eia.org.EIA RS-485 Standard for Electrical

25、 Characteristics of Generators and Receivers for Use in Balanced Digital Multipoint Systems, April 1983 Copyright SAE International Provided by IHS under license with SAENot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SAE J1708 Revised DEC2010 Page 4 of 143. DEFINI

26、TIONS 3.1 BUS ACCESS TIME A time duration equal to the minimum time of an Idle Line plus the product of 2 bit times and the message priority (which ranges from 1 to 8). An example is shown in 5.2.2.3. 3.2 BAUD The maximum number of analog signal transitions per second that can occur on a channel. In

27、 this coding system, this is the reciprocal of the bit time. 3.3 BIT TIME Duration or period of one unit of information. 3.4 CHARACTER A character shall consist of 10 bit times. The character must start with a low-logic bit, then 8 bits of data (least significantbit first) followed by a high-logic l

28、evel stop bit. 3.5 CHARACTER TIME The duration of one character which is equal to 10 bit times. 3.6 CONTENTION A state of the bus in which two or more transmitters are turned on simultaneously to conflicting logic states. 3.7 DIFFERENTIAL SIGNAL A two-wire process in which both lines are switched as

29、 opposed to a single-ended signal wherein one line is grounded and the signal line is switched between logic states. 3.8 IDLE STATE The state that produces a high-logic level on the input of the bus receiver when all transmitters on the network are turned off.3.9 IDLE LINE The condition that exists

30、when the bus has remained in a continuous high-logic state for at least 10 bit times after the end of the last stop bit. The minimum time duration of an idle line is 10 bit times. An example is shown in 5.2.1. NOTE: The idle line serves as the delimiter between messages on the bus. 3.10 MESSAGE PRIO

31、RITY A measure of message criticality assigned on a scale of 1 to 8 by the appropriate applications document. The most critical message has a priority of one. 3.11 NODE A receiver or transceiver circuit connected to the bus. Copyright SAE International Provided by IHS under license with SAENot for R

32、esaleNo reproduction or networking permitted without license from IHS-,-,-SAE J1708 Revised DEC2010 Page 5 of 143.12 START BIT Initial element of a character defined as a low-logic level of 1 bit time duration as viewed at the output of the bus receiver.3.13 STOP BIT Final element of a character def

33、ined as a high-logic level of 1 bit time duration as viewed at the output of the bus receiver. 4. ELECTRICAL PARAMETERS The electrical parameters of this serial data link are a modification of the EIA RS-485 standard. In some areas this document conflicts with EIA RS-485. This document shall serve a

34、s the guiding document in such cases. Appendix A details a serial data bus standard node which defines the interface circuit parameters. Operation of this standard node is detailed in this section. 4.1 Logic State Positive true logic will be used when referring to the states of transmitted inputs an

35、d received outputs. Referring to Appendix A, the input of the transmitter (marked as point Tx) and the output of the receiver (marked as Rx) will be in logic 1 state when driven or passively pulled to +V, and will be at a logic 0 state when driven to ground. 4.2 Bus State The bus is in a logic 1 (hi

36、gh) state whenever Point A is at least 0.2 V more positive than Point B. The bus is in a logic 0 (low) state whenever Point A is at least 0.2 V more negative than Point B (Points A and B, refer to Figure A1). The bus state is indeterminate when the differential voltage is less than 0.2 V. 4.2.1 Logi

37、c High State The bus will be in a logic 1 (high) state when all connected transmitters are idle or sending logic 1. An idle state is produced when all transmitters on the network are turned off. All nodes shall include means to pull the bus to a logic 1 (high) when all transmitters are off (see Appe

38、ndix A). 4.2.2 Logic Low State The bus will be in a logic 0 (low) state when one or more transmitters are sending logic 0, which guarantees that logic 0 (low) dominates when the bus is in contention. 4.3 Network Capacity The bus will support a minimum of 20 standard nodes where each node is comprise

39、d of the circuit defined in Appendix A. Deviations from this circuit must be carefully analyzed to determine impact on bus loading and noise margins over the common mode range. 4.4 Bus Termination Bus-termination resistors as referenced in EIA RS-485 are not required and shall not be used. 4.5 Groun

40、d All assemblies using the link must have common ground reference. Copyright SAE International Provided by IHS under license with SAENot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SAE J1708 Revised DEC2010 Page 6 of 144.6 Wire A minimum of 18-gauge twisted-pair wi

41、re, with a minimum of one twist per inch (360 degrees/2.54 cm) is required. The twists shall be distributed evenly over the length of the wire. 4.7 Length This document is intended for, but not limited to, applications with a maximum length of 131 ft (40 m). 5. NETWORK PARAMETERS 5.1 Network Topolog

42、y The network interconnect shall use a common or global bus. There is no restriction on the length between each Electronic Control Unit, but the total length of the network datalink (total length = A+B+C+D+E+F) shall not exceed 131 ft (40 m). FIGURE 1 - NETWORK TOPOLOGY 5.2 Network Access The method

43、 of access to the network is random. 5.2.1 Idle Line - Bus Synchronization by a Receiver A receiver that cannot distinguish between a stop bit and any other high-logic state may become synchronized with the bus by noting the receipt of 12 consecutive high-logic bits. In the absence of errors, the fi

44、rst low-logic bit (0) following 12consecutive high-logic bits (1) is the start bit of a message identification character (MID) (that is, the first character of amessage).Copyright SAE International Provided by IHS under license with SAENot for ResaleNo reproduction or networking permitted without li

45、cense from IHS-,-,-SAE J1708 Revised DEC2010 Page 7 of 14EXAMPLE: A Receiver that has just connected to the data link will not know the current message strings being broadcast. The goal of the Receiver is to find an Idle Line, so the MID character of the next string can be determined. The Receiver c

46、ould see the reception of all high-logic levels as shown in “Worst Case Character Time bit map” in Figure 2 in 5.2.2.3. In this case, there would be 8 high-logic level data bit times, 1 high-logic level for the stop bit, and up to 2 high-logic level inter-character bit times. This means that 11 bit

47、times at high-logic level define the start of a new character, but not necessarily a MID character. If the next logic level seen by the Receiver is a low logic level, then another Character Time will follow and the Bus Synchronization must start over. If the next logic level seen by the Receiver is

48、a high-logic level, then an Idle Line may have been identified. If, as shown in Figure 2, there was a Start Bit at the beginning of the 12 bit times, then a true Idle Line time has not occurred. The receiver will not see a start bit until a total of 19 high-logic levels plus the product of 2 bit times and the message priority (which ranges from 1 to 8) of the next message to be transmitted are seen. However, if the receiver did not see the first bit in the Figure 2 “Worst Case Character Time bit map” row, that is the Start bit shown at the far left, then it would have