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    JEDEC JESD22-A113G-2015 Preconditioning of Nonhermetic Surface Mount Devices Prior to Reliability Testing.pdf

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    JEDEC JESD22-A113G-2015 Preconditioning of Nonhermetic Surface Mount Devices Prior to Reliability Testing.pdf

    1、JEDEC STANDARD Preconditioning of Nonhermetic Surface Mount Devices Prior to Reliability Testing JESD22-A113G (Revision of JESD22A113F, October 2008) OCTOBER 2015 JEDEC SOLID STATE TECHNOLOGY ASSOCIATION NOTICE JEDEC standards and publications contain material that has been prepared, reviewed, and a

    2、pproved through the JEDEC Board of Directors level and subsequently reviewed and approved by the JEDEC legal counsel. JEDEC standards and publications are designed to serve the public interest through eliminating misunderstandings between manufacturers and purchasers, facilitating interchangeability

    3、 and improvement of products, and assisting the purchaser in selecting and obtaining with minimum delay the proper product for use by those other than JEDEC members, whether the standard is to be used either domestically or internationally. JEDEC standards and publications are adopted without regard

    4、 to whether or not their adoption may involve patents or articles, materials, or processes. By such action JEDEC does not assume any liability to any patent owner, nor does it assume any obligation whatever to parties adopting the JEDEC standards or publications. The information included in JEDEC st

    5、andards and publications represents a sound approach to product specification and application, principally from the solid state device manufacturer viewpoint. Within the JEDEC organization there are procedures whereby a JEDEC standard or publication may be further processed and ultimately become an

    6、ANSI standard. No claims to be in conformance with this standard may be made unless all requirements stated in the standard are met. Inquiries, comments, and suggestions relative to the content of this JEDEC standard or publication should be addressed to JEDEC at the address below, or refer to www.j

    7、edec.org under Standards and Documents for alternative contact information. Published by JEDEC Solid State Technology Association 2015 3103 North 10th Street Suite 240 South Arlington, VA 22201-2107 This document may be downloaded free of charge; however JEDEC retains the copyright on this material.

    8、 By downloading this file the individual agrees not to charge for or resell the resulting material. PRICE: Contact JEDEC Printed in the U.S.A. All rights reserved PLEASE! DONT VIOLATE THE LAW! This document is copyrighted by JEDEC and may not be reproduced without permission. For information, contac

    9、t: JEDEC Solid State Technology Association 3103 North 10th Street Suite 240 South Arlington, VA 22201-2107 or refer to www.jedec.org under Standards-Documents/Copyright Information. JEDEC Standard No. 22-A113G -i- Test Method A113G (Revision of A113F) TEST METHOD A113G PRECONDITIONING OF NONHERMETI

    10、C SURFACE MOUNT DEVICES PRIOR TO RELIABILITY TESTING Foreword This document provides an industry standard test method for preconditioning packaged devices that is representative of a typical industry multiple solder reflow operation. Introduction The typical use of surface mount devices (SMD) involv

    11、es subjecting the SMDs to elevated temperatures during board assembly, which, by itself or combined with moisture in the package can induce internal package damage that could be a reliability concern. Preconditioning of SMD packages is used to simulate the effects of board assembly prior to reliabil

    12、ity testing. This allows reliability testing at the packaged device level on as shippable products with a board assembly simulation. During preconditioning, test samples are subjected to temperature cycling (optional), dry bake, moisture soaking, solder reflow simulation, flux, rinse, dry, and elect

    13、rical test before reliability testing. This test method references the reflow profiles stated in J-STD-020. If a packaged device is not able to withstand the full thermal profile as stated in J-STD-020, J-STD-075 should be used to evaluate and classify process sensitivities. JEDEC Standard No. 22-A1

    14、13F Test Method A113F -ii- (Revision of A113E) JEDEC Standard No. 22-A113G Page 1 Test Method A113G (Revision of A113F) TEST METHOD A113G PRECONDITIONING OF NONHERMETIC SURFACE MOUNT DEVICES PRIOR TO RELIABILITY TESTING (From JEDEC Board ballot JCB-15-32, formulated under the cognizance of the JC-14

    15、.1 Subcommittee on Reliability Test Methods for Packaged Devices.) 1 Scope This Test Method establishes an industry standard preconditioning flow for nonhermetic solid state SMDs that is representative of a typical industry multiple solder reflow operation. These SMDs should be subjected to the appr

    16、opriate preconditioning sequence of this document by the manufacturer prior to being submitted to specific in-house reliability testing (qualification and reliability monitoring) to evaluate long term reliability (which might be impacted by solder reflow). NOTE For good correlation of results betwee

    17、n moisture/reflow-induced stress sensitivity testing (per J-STD-020 and JESD22-A113) and actual reflow conditions used, identical temperature measurements by both the SMD manufacturer and the board assembler are necessary. Therefore, it is recommended that the package temperature at the top center o

    18、f the package be determined during assembly board reflow profile setup, to ensure that it does not exceed the evaluation temperature based on package thickness and volume as stated in J-STD-020. 2 Normative reference IPC/JEDEC J-STD-020, Moisture/Reflow Sensitivity Classification for Nonhermetic Sol

    19、id State Surface Mount Devices IPC/JEDEC J-STD-033, Handling, Packing, Shipping and Use of Moisture/Reflow Sensitive Surface Mount Devices ECIA/IPC/JEDEC J-STD-075, Classification of Non-IC Electronic Components for Assembly Processes JESD22-A104, Temperature Cycling JESD625, Requirements for Handli

    20、ng Electrostatic Discharge Sensitive (ESD) Devices JESD47, Stress-Test-Driven Qualification of Integrated Circuits JESD94, Application Specific Qualification Using Knowledge Based Test Methodology JEDEC Standard No. 22-A113G Page 2 Test Method A113G (Revision of A113F) 3 Apparatus This test method r

    21、equires use of the following equipment. 3.1 Temperature and humidity chamber Moisture chamber(s) capable of operating at 85 C/85% RH, 85 C/60% RH, and 30 C/60% RH. Within the chamber working area, temperature tolerance must be 2 C and the RH tolerance must be 3% RH. A chamber with 60 C/60% RH capabi

    22、lity is optional for accelerated soak conditions (See J-STD-020). 3.2 Solder reflow equipment a) (Preferred) - Full Convection reflow system capable of maintaining the reflow profiles required by this standard. b) Infrared (IR)/Convection solder reflow equipment capable of maintaining the reflow pro

    23、files required by this standard. It is required that this equipment use IR to heat only the air and not directly impinge upon the SMD packages under test. NOTE The moisture/reflow and process sensitivity classification test results are dependent upon the package body temperature (rather than the ref

    24、low carrier and/or package terminal temperature). 3.3 Optical microscope Optical Microscope (40x for external visual exam). 3.4 Electrical test equipment Electrical test equipment capable of performing room temperature dc and functional tests. 3.5 Bake oven Bake oven capable of operating at 125 +5/-

    25、0 C. 3.6 Temperature Cycle Chamber Temperature Cycle Chamber capable of operating, as a minimum, over the range of -40 C (or lower) to 60 C (or higher) per JESD22-A104. This equipment is only required if optional Step 4.3 is used. JEDEC Standard No. 22-A113G Page 3 Test Method A113G (Revision of A11

    26、3F) 4 Test procedure Using similar SMDs, it is recommended that the moisture sensitivity level (MSL), per J-STD-020, be determined before starting the preconditioning sequence to establish which moisture soak condition is appropriate, i.e., likely to pass. If the MSL level is not known then other re

    27、levant moisture evaluation data may be consulted, or an arbitrary selection may be made. Multiple moisture soak conditions can also be run to determine a passing level. However, the soak condition used must be consistent with the floor life information in J-STD-020. Reflow requirements are provided

    28、for both Pb-free and legacy SnPb conditions and should be used based on the intended end use of the SMD. The same package may have different MSL levels depending on whether the SnPb or Pb-free reflow is used. Some SMDs with a unique construction or materials may have limitations independent of moist

    29、ure exposure that are strictly due to the thermal profile stated in J-STD-020 and may not be able to fully meet one or several of the temperature and/or duration requirements of the reflow profile. Some SMDs may have other limitations due to other assembly processes, such as exposure to chemicals. F

    30、or those SMDs with thermal and/or other process limitations follow the process sensitivity classification stated in J-STD-075 to identify the appropriate process sensitivity level (PSL) rating. For example, if a SMD cannot meet its required peak temperature based on its volume and thickness, then th

    31、e peak temperature of the profile used for the preconditioning must be changed based on the value stated by its PSL classification. Thus if the SMD should be subjected to 260 C, but its PSL rating is R6, the peak temperature used for preconditioning shall be 250 C. Similar to MSL, if the PSL level i

    32、s not yet determined, relevant evaluation/engineering data may be used to generate the initial profile parameters. If the SMD passes the subsequent qualification testing, then the PSL rating will be based on the chosen parameters used for preconditioning; however, if there are fails that are deemed

    33、to be due to the thermal exposure of the preconditioning flow, requalification is required with reduced profile conditions that allow the SMD to pass the qualification requirements. At all times the test parts should be handled using proper ESD procedures in accordance with JESD625. Refer to Annex A

    34、 for the typical test flow. NOTE If the preconditioning sequence is being performed by the semiconductor manufacturer, steps 4.1, 4.2, and 4.4 are optional since they are the suppliers risks. If the preconditioning sequence is being performed by the user, steps 4.7 through 4.9 are optional. 4.1 Init

    35、ial electrical test Perform electrical and/or functional test to verify that the SMDs meet the room temperature data sheet specification. Replace any test samples that fail to meet this requirement. JEDEC Standard No. 22-A113G Page 4 Test Method A113G (Revision of A113F) 4 Test procedure (contd) 4.2

    36、 Visual inspection Perform an external visual examination under 40X optical magnification to ensure that no samples with external cracks or other damage are used in this test method. If mechanical rejects are found, corrective action must be implemented in the manufacturing process and a new sample

    37、must be drawn from product that has been processed with the corrective action. 4.3 Temperature cycling Perform five (5) cycles of temperature cycle from -40 C (or lower) to 60 C (or higher) to simulate shipping conditions. Acceptable alternative test conditions and temperature tolerances are A throu

    38、gh I, L through N, and T as defined in Table 1 of JESD22-A104, Temperature Cycling. This step is optional based on product requirements. 4.4 Bake out Bake the samples for 24 hours minimum at 125 +5/-0 C. This step is intended to remove all moisture from the package so that it will be “dry.” NOTE 1 T

    39、his time/temperature may be modified if desorption data on the particular SMD being preconditioned shows that a different condition is required to obtain a “dry“ package. Refer to J-STD-020 for procedures on running absorption and desorption curves. NOTE 2 If the SMD cannot be subjected to a bake at

    40、 125 C for 24 hours or longer, then use a lower temperature condition with a longer duration to ensure that all moisture is removed. See J-STD-033 for alternative bake conditions and durations that are equivalent. 4.5 Moisture Soak Place samples in a clean, dry, shallow container so that the package

    41、 bodies do not touch or overlap each other. Submit each sample to the appropriate moisture soak requirements shown in J-STD-020. The moisture soak should be initiated within 2 hours of bake. NOTE The moisture soak is optional for SMDs (Flip Chip die, etc.) where moisture absorption data is available

    42、 showing the particular SMD being preconditioned does not absorb moisture. Refer to J-STD-020 for procedures on running absorption and desorption curves. JEDEC Standard No. 22-A113G Page 5 Test Method A113G (Revision of A113F) 4 Test procedure (contd) 4.6 Reflow Not sooner than 15 minutes and not lo

    43、nger than 4 hours after removal from the temperature/humidity chamber, subject the sample to 3 cycles (See NOTE 1) of the appropriate reflow conditions. The reflow conditions are defined in J-STD-020. If the timing between removal from the temperature/humidity chamber and initial reflow cannot be me

    44、t then the parts must be rebaked and resoaked according to 4.4 and 4.5. NOTE 1 The 3 reflow cycles represent the following: - Cycle 1 - the first pass of a Double-Sided, Double-Pass (DSDP) assembly reflow process. - Cycle 2 - the second pass of a DSDP assembly reflow process. - Cycle 3 - rework of a

    45、 near neighbor on the assembly where the SMD being classified experiences reflow-like temperatures. NOTE 2 For SMDs classified per J-STD-075 that cannot be subjected to 3 reflows, only perform the number of reflows for which the SMD is classified. NOTE 3 If the reflow cycle regimen is not representa

    46、tive for the SMD being classified, refer to JESD94 for application specific qualification guidance. The following is an example of an application that would require an addition reflow cycle. SMDs that are placed directly next to a CPU in an LGA socket or on the underside of the PWB from an LGA socke

    47、t (e.g., power management devices) may see 4 reflow cycles due to rework of the LGA socket. In that case, evaluation of 4 reflow cycles may be necessary to account for the total thermal exposure. Reflow cycle 3 would represent the removal of a damaged LGA socket and reflow cycle 4 would simulate the

    48、 attaching of the replacement socket. The sample parts shall be cooled sufficiently (preferably back to room temperature) between reflow cycles so that the reflow temperatures/times of the samples are not affected on the subsequent reflow cycles. Reflow practices shall be sufficient to ensure that a

    49、ll sample parts, in each reflow cycle, will meet the appropriate reflow profile requirements of J-STD-020. SMDs intended for use in a “Pb-free” assembly process shall be evaluated using the “Pb-free” reflow temperature whether or not the SMD is Pb-free. If parts are reflowed in other than the normal assembly reflow orientation (i.e. live bug/dead bug) the damage response should be correlated. The reflow oven should be loaded with the same configuration or be verified to have an equivalent thermal load when running preconditioning as was used to develop the reflow pr


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