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    JEDEC JESD22-A104E-2014 Temperature Cycling.pdf

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    JEDEC JESD22-A104E-2014 Temperature Cycling.pdf

    1、JEDEC STANDARD Temperature Cycling JESD22-A104E (Revision of JESD22-A104D, March 2009) OCTOBER 2014 JEDEC SOLID STATE TECHNOLOGY ASSOCIATION NOTICE JEDEC standards and publications contain material that has been prepared, reviewed, and approved through the JEDEC Board of Directors level and subseque

    2、ntly reviewed and approved by the JEDEC legal counsel. JEDEC standards and publications are designed to serve the public interest through eliminating misunderstandings between manufacturers and purchasers, facilitating interchangeability and improvement of products, and assisting the purchaser in se

    3、lecting and obtaining with minimum delay the proper product for use by those other than JEDEC members, whether the standard is to be used either domestically or internationally. JEDEC standards and publications are adopted without regard to whether or not their adoption may involve patents or articl

    4、es, materials, or processes. By such action JEDEC does not assume any liability to any patent owner, nor does it assume any obligation whatever to parties adopting the JEDEC standards or publications. The information included in JEDEC standards and publications represents a sound approach to product

    5、 specification and application, principally from the solid state device manufacturer viewpoint. Within the JEDEC organization there are procedures whereby a JEDEC standard or publication may be further processed and ultimately become an ANSI standard. No claims to be in conformance with this standar

    6、d may be made unless all requirements stated in the standard are met. Inquiries, comments, and suggestions relative to the content of this JEDEC standard or publication should be addressed to JEDEC at the address below, or refer to www.jedec.org under Standards and Documents for alternative contact

    7、information. Published by JEDEC Solid State Technology Association 2013 3103 North 10th Street Suite 240 South Arlington, VA 22201-2107 This document may be downloaded free of charge; however JEDEC retains the copyright on this material. By downloading this file the individual agrees not to charge f

    8、or or resell the resulting material. PRICE: Contact JEDEC Printed in the U.S.A. All rights reserved PLEASE! DONT VIOLATE THE LAW! This document is copyrighted by JEDEC and may not be reproduced without permission. For information, contact: JEDEC Solid State Technology Association 3103 North 10th Str

    9、eet Suite 240 South Arlington, VA 22201-2107 or refer to www.jedec.org under Standards-Documents/Copyright Information. JEDEC Standard No. 22-A104E Page 1 Test Method A104E (Revision of Test Method A104D) TEST METHOD A104E TEMPERATURE CYCLING (From Board Ballot JCB-00-16, JCB-05-82, JCB-09-20, and J

    10、CB-14-45, formulated under the cognizance of the JC-14.1 Committee on Reliability Test Methods for Packaged Devices.) 1 Scope This standard applies to single-, dual- and triple-chamber temperature cycling and covers component and solder interconnection testing. It should be noted that this standard

    11、does not cover or apply to thermal shock chambers. In single chamber cycling, the load is placed in a stationary chamber and is heated or cooled by introducing hot or cold air into the chamber. In dual-chamber cycling, the load is placed on a moving platform that shuttles between stationary chambers

    12、 maintained at fixed temperatures. In triple-chamber temperature cycling there are three chambers and the load is moved between them. This test is conducted to determine the ability of components and solder interconnects to withstand mechanical stresses induced by alternating high- and low-temperatu

    13、re extremes. Permanent changes in electrical and/or physical characteristics can result from these mechanical stresses. 2 Terms and definitions 2.1 load: The sample(s) and associated fixtures (trays, racks, etc.) in the chamber during the test. 2.2 working zone: The volume in the chamber(s) in which

    14、 the temperature of the load is controlled within the specified conditions. 2.3 sample temperature (Ts): The temperature of the samples during temperature cycling, as measured by thermocouples or equivalent temperature measurement apparatus affixed to, or imbedded in, their bodies. NOTE The thermoco

    15、uple, or equivalent temperature measurement apparatus, attachment method used should ensure that the entire mass of the sample(s) is reaching the temperature extremes and the soak requirements. 2.4 maximum sample temperature: (Ts(max): The maximum temperature experienced by the sample(s) as measured

    16、 by thermocouples, per 3.3. 2.5 minimum sample temperature: (Ts(min): The minimum temperature experienced by the sample(s) as measured by thermocouples, per 3.3. JEDEC Standard No. 22-A104E Page 2 Test Method A104E (Revision of Test Method A104D) 2 Terms and definitions (contd) 2.6 load transfer tim

    17、e: The time it takes to physically transfer the load from one temperature chamber and introduce it into the other. Load transfer applies to dual and triple chamber cycling. 2.7 maximum load: The largest load that can be placed in the chamber and still meet the specified temperature cycling requireme

    18、nts as verified by thermocouples, per 3.3. 2.8 nominal T: The difference between nominal Ts(max)and nominal Ts(min)for the Temperature Cycling Test Condition; see Table 1. 2.9 soak time: The total time the sample temperature is within a specified range of each nominal Ts(max)and nominal Ts(min). Thi

    19、s range is defined as the time Tsis at 5 C to +10 C /+15 C (dependent on the Test Condition tolerance) of Ts(max)nominal for the upper end of the cycle and the time Ts is +5 C to 10 C of Ts(min)nominal for the lower end of the cycle. 2.10 soak temperature: The temperature range that is 5 C to +10/+1

    20、5 C (dependent on the Test Condition tolerance) of Ts(max)nominal and +5 C to 10 C of Ts(min)nominal. 2.11 (temperature) cycle time: The time interval between one high-temperature extreme to the next, or from one low-temperature extreme to the next, for a given sample; see Figure 1. 2.12 ramp rate:

    21、The rate of temperature increase or decrease per unit of time for the sample(s). NOTE 1 Ramp rate should be measured for the linear portion of the profile curve, which is generally the range between 10% and 90% of the test condition temperature range; see points a and b in Figure 1. NOTE 2 Ramp rate

    22、 can be load dependent and should be verified for the load being tested. 2.13 test conditions: The various temperature cycle range options listed in Table 1. 2.14 soak mode: The categorization nomenclature that defines minimum soak time at soak temperature(max) see Table 1. 2.16 nominal Ts(min): The

    23、 temperature of the sample required to meet the minimum nominal temperature for a specific test condition; see Table 1. JEDEC Standard No. 22-A104E Page 3 Test Method A104E (Revision of Test Method A104D) 3 Reference documents JEP 140, Beaded Thermocouple Measurement of Semiconductor Packages. JEP 1

    24、53, Characterization and Monitoring of thermal Stress Test Oven Temperatures. JESD94, Application Specific Qualification using Knowledge Based Test Methodology. IPC-SM-785, Guidelines for Accelerated Reliability Testing of Surface Mount Solder Attachments. 4 Apparatus The chamber(s) used shall be ca

    25、pable of providing and controlling the specified temperatures and cycle timing in the working zone(s), when the chamber is loaded with a maximum load. Direct heat conduction to sample(s) shall be minimized. The capability of each chamber achieving the sample temperature requirements shall be verifie

    26、d across each chamber by one or both of the following methods: a) Periodic calibration using instrumented parts and a maximum load, and continual monitoring during each test of such fixed tool thermocouple temperature measurement(s) as adequate to ensure run-to-run repeatability. b) Continual monito

    27、ring during each test of an instrumented part or parts placed at worst-case temperature locations (for example, this may be the corners and middle of the load). 5 Procedure Sample(s) shall be placed in such a position with respect to the air stream such that there is substantially no obstruction to

    28、the flow of air across and around each sample(s). When special mounting is required, it shall be specified. The sample shall then be subjected to the specified temperature cycling test condition for the specified number of cycles (e.g., JESD47 for qualification or as agreed to between the supplier a

    29、nd user). Completion of the total number of cycles specified for the test may be interrupted for interim end-point testing, test chamber loading or unloading of device lots, electrical test of samples at specified intervals or as the result of power or equipment failure. However, if the aggregate nu

    30、mber of times of all interruptions exceeds 10% of the total number of cycles specified, the test must be restarted from the beginning. If the thermocouple is affixed to the sample body, the amount of glue or tape used shall be minimized to insure proper temperature measurements. The thermocouple, or

    31、 equivalent temperature measurement apparatus, attachment method used should ensure that the entire mass of the sample(s) is reaching the temperature extremes and the soak requirements. JEDEC Standard No. 22-A104E Page 4 Test Method A104E (Revision of Test Method A104D) 5.1 Nominal cycle rates Nomin

    32、al cycle rates are dependent on the Soak Mode selected. 5.1.1 Component cycle rates Typical component level temperature cycle rates are in the range of 1 to 3 cycles per hour (cph). Typical failure mechanisms include, but are not limited to, fatigue (such as metal circuit fatigue) and delamination.

    33、For certain failure mechanisms, such as ball bond integrity, faster rates, 3 cph can be used, if the temperature cycling chambers are capable of meeting the Tsnominal and soak requirements for the given Test Condition. 5.1.2 Solder interconnect cycle rates Typical solder interconnect cycle rates are

    34、 slower, in the range of 1 to 2 cph, when solder joint fatigue evaluations are performed. These include flip chip, ball grid array and stacked packages with solder interconnections. Cycle frequency and soak time is more significant for solder interconnections. 5.1.3 Tin whisker cycle rate Tin whiske

    35、r cycle rate shall be about 3 cycles per hour as stated in JESD22-A121. JEDEC Standard No. 22-A104E Page 5 Test Method A104E (Revision of Test Method A104D) 5.2 Maximum and minimum temperature The maximum and minimum sample temperatures measured shall be within the range stated in Table 1 for the sp

    36、ecific test condition being used. Typical boundary values of +10C for Ts(max) and -10C for Ts(min)are discretionary and depending on equipment capability and test objectives. Table 1 Temperature cycling test conditions Test Condition* Nominal Ts(min)(C) Nominal Ts(max)(C) A -55 +85 B -55 +125 C -65

    37、+150 G -40 +125 H -55 +150 I -40 +115 J -0 +100 K -0 +125 L -55 +110 M -40 +150 N R T -40 -25 -40 +85 +125 +100 *CAUTION: Care should be taken when selecting Test Conditions, since: 1) the Ts(max)requirement for a specific Test Condition may exceed the glass transition temperature of some package ma

    38、terials which may induce failure mechanisms not normally seen during design application conditions in the field, 2) large thermal gradients between and across the devices under test (DUT) need to be avoided in order to preserve the test data integrity and 3) CTE differences over the test condition t

    39、emperature range can produce premature failure of plated through holes in the test board, thus limiting electrical readout capability for the parts on test. Test Conditions that exceed 125 C for Ts(max)are not recommended to Pb/Sn solder compositions due to potential dynamic recrystallization. Selec

    40、tion of the thermal cycling test condition should correspond with its test objective, and application use condition. In some cases, characterization of material responses to the extreme temperatures for the chosen test selection may be critical to avoid unintended outcomes as mentioned above. Therma

    41、l cycling profiles commonly used for device qualification are referenced in JESD47; yet, any other profile listed in this document (or custom profiles) may be utilized in accordance with JESD94 (knowledge based test methodology) or investigative purposes. NOTE Temperature cycling test conditions dif

    42、ferent from Table 1 can be used. However, test conditions should meet the soak, cycles per hour and ramp rate recommendations for the failure mechanism being tested. These conditions must be documented as indicated in 7(f). JEDEC Standard No. 22-A104E Page 6 Test Method A104E (Revision of Test Metho

    43、d A104D) 5.2 Maximum and minimum temperature (contd) Table 2 Soak mode conditions Soak Mode Minimum Soak Time at Soak Temperature(max) see Table 2. During this soak time the specimen shall reach the required nominal temperature, either Ts(max)or Ts(min). 5.4 Upper and lower soak temperatures Upper a

    44、nd Lower Soak Temperatures vary with the Test Condition selected; see Table 1. 5.5 Soak modes Soak Modes are listed in Table 2. Soak Modes with longer soak times than those shown in Table 2 are not compatible with standard cycle rates and should be selected only as required for a specific failure me

    45、chanism. 5.5.1 Component soak mode In component temperature cycling, Soak Mode 1 is typically used. 5.5.2 Interconnect soak mode Soak Modes 2, 3 and 4 are generally used for solder fatigue and creep testing associated with interconnections such as flip chip or BGA solder joints. 5.5.3 Tin whisker so

    46、ak mode Tin whisker soak mode shall be 5 to 10 minutes as stated in JESD22-A121. This equates to soak mode 2, see Table 2. JEDEC Standard No. 22-A104E Page 7 Test Method A104E (Revision of Test Method A104D) 5.6 Nominal cycle time Nominal cycle times vary with the Soak Mode selected. Table 3 lists t

    47、ypical cycle rates for components versus test condition and soak mode. For solder interconnections, cycle times less than 30 minutes are not recommended. Table 3 Typical frequency and soak mode for test conditions Condition Typical Cycles/Hr. Typical Soak Mode A 2 3 1, 2 see section 4. b) Temperatur

    48、e extremes; see Table 1, soak time; see Table 2, sample cooling and heating ramp rate and number of cycles, or specific component requirements. c) Interim measurement intervals, when required. d) Special acceptance criteria for examinations, seal tests (for hermetic packages), internal bond integrit

    49、y tests and electrical tests if other than those specified in the device specification. e) For qualification testing, sample size and quality level. f) Temperature extremes other than in Table 1. Specify the number of cycles, temperature extremes, soak time, cycles per hour, tolerance on temperature extremes (if different from Table 1), ramp rate and interim measurements, if required. JEDEC Standard No. 22-A104E Page 10 Test Method A104E (Revision of Test Method A104D) Annex A (informative) Temperature Profile Figure 1 Representative temperature profil


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