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    DLA SMD-5962-89905 REV H-2012 MICROCIRCUIT LINEAR HIGH SPEED PULSE WIDTH MODULATOR CONTROLLER MONOLITHIC SILICON.pdf

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    DLA SMD-5962-89905 REV H-2012 MICROCIRCUIT LINEAR HIGH SPEED PULSE WIDTH MODULATOR CONTROLLER MONOLITHIC SILICON.pdf

    1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add device types 02 and 03. Technical and editorial changes throughout. 95-10-06 M. A. FRYE B Correct Figure 1 in regard to device types 02 and 03 for case outline 2. Change VCCto VSin Figure 2. Technical and editorial changes throughout. lgt 98-

    2、03-27 R. MONNIN C Add class V for vendor CAGE 48726. Add table IIB. rrp 99-11-04 R. MONNIN D Make change to the Initial accuracy test as specified in the Oscillator section in table I. - ro 01-03-20 R. MONNIN E Make correction to case outline E terminal connections for device types 02 and 03 as spec

    3、ified in figure 1. Add case outline 2 terminal connections for device type 01. ro 02-06-04 R. MONNIN F Drawing updated to reflect current requirements. -rrp 09-04-20 J. RODENBECK G Make a correction to output source current test in Table I, move the -0.5 mA limit from the min column to the max colum

    4、n. - ro 10-10-18 C. SAFFLE H Make correction to footnote 1/ VSlimit from 15 V to 12 V for device types 02 and 03 only as specified under table I. - ro 12-08-22 C. SAFFLE REV SHEET REV H H SHEET 15 16 REV STATUS REV H H H H H H H H H H H H H H OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A

    5、 PREPARED BY JOSEPH A. KERBY DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY CHARLES E. BESORE APPROVED BY MICHAEL A. FRYE MICROCI

    6、RCUIT, LINEAR, HIGH SPEED PULSE WIDTH MODULATOR CONTROLLER, MONOLITHIC SILICON DRAWING APPROVAL DATE 91-01-31 AMSC N/A REVISION LEVEL H SIZE A CAGE CODE 67268 5962-89905 SHEET 1 OF 16 DSCC FORM 2233 APR 97 5962-E429-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without lice

    7、nse from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89905 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q and M) and spac

    8、e application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following examples.

    9、For device class M and Q: 5962 - 89905 01 E A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Case outline (see 1.2.4) Lead finish (see 1.2.5) / / Drawing number For device class V: 5962 - 89905 02 V E A Federal stock class designator RHA designator (see 1.2.1) Devi

    10、ce type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M R

    11、HA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 1823

    12、High speed PWM controller 02 1823A High speed PWM controller 03 1823B High speed PWM controller 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as listed below. Since the device class designator has been added after the original i

    13、ssuance of this drawing, device classes M and Q designators will not be included in the PIN and will not be marked on the device. Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordanc

    14、e with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89905 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL H

    15、SHEET 3 DSCC FORM 2234 APR 97 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line 2 CQCC1-N20 20 Square leadless chip carrier 1.2.5 Lead finish. The lead fi

    16、nish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1.3 Absolute maximum ratings. 1/ Supply voltage (VS) : Device type 01 . 30 V dc Device types 02 and 03 . 22 V dc DC output current, source or sink 0.5 A Pulse output current, sink or sou

    17、rce (0.5 s) Device type 01 . 2.0 A Device types 02 and 03 . 2.2 A Analog input voltage : Device type 01 (pins INV, NINV, RAMP, S/S, and ILSD) . -0.3 V dc to 6.0 V dc Device types 02 and 03 (pins INV, NINV, and RAMP) -0.3 V dc to 7.0 V dc Device types 02 and 03 (pins S/S and ILSD) . -0.3 V dc to 6.0

    18、V dc Clock output current -5.0 mA Error amplifier output current . 5.0 mA Soft start sink current 20 mA Oscillator charging current -5.0 mA Power dissipation (PD) 2/ 3/ . 1.0 W Storage temperature range . -65C to +150C Lead temperature (soldering, 10 seconds) +300C Junction temperature (TJ) . +150C

    19、Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Thermal resistance, junction-to-ambient (JA) : Case outline E . 80C/W Case outline 2 70C/W Power ground : Device types 02 and 03 . 0.2 V 1.4 Recommended operating conditions. Supply voltage (VS) . 10 V dc to 30 V dc Ambient operating tempe

    20、rature range (TA) . -55C to +125C _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ For case E, derate linearly above TA= +60C at 11 mW/C. For case 2, derate linearly a

    21、bove TA= +40C at 9 mW/C. 3/ Must withstand the added PDdue to short circuit test; e.g., ISC. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89905 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVE

    22、L H SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cite

    23、d in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines

    24、. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building

    25、4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption

    26、 has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not

    27、affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and

    28、 physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be

    29、 as specified on figure 1. 3.2.3 Block diagrams. The block diagrams shall be as specified on figure 2. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits a

    30、re as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table I. Provided by IHSNot for Resale

    31、No reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89905 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TA +125C

    32、 unless otherwise specified Group A subgroups Device type Limits Unit Min Max Reference section Output voltage VREFTJ= +25C, IO= 1.0 mA 1 All 5.05 5.15 V Line regulation VRLN10 V VS 30 V 1, 2, 3 01 20 mV 12 V VS 20 V 02, 03 15 Load regulation VRLD1.0 mA IO 10 mA 1, 2, 3 All 20 mV Long term stability

    33、 2/ VREF/ t TJ= +125C, t = 1000 hours 2 All 25 mV Output noise voltage 2/ NO10 Hz f 10 kHz, TA= +25C 1 All 200 V Total output variation 2/ VOM1IO= -1.0 mA, VS= 10 V 1, 2, 3 All 5.00 5.20 V VOM2IO= -1.0 mA, VS= 30 V 5.00 5.20 VOM3IO= -10 mA, VS= 10 V 5.00 5.20 VOM4IO= -10 mA, VS= 30 V 5.00 5.20 Short

    34、 circuit current ISCVREF = 0 V 1, 2, 3 01 -15 -100 mA 02, 03 -30 -90 Oscillator section Initial accuracy 2/ fOTJ= +25C 4 01 360 440 kHz 02, 03 375 425 Voltage stability fO/ 10 V VS 30 V 4, 5, 6 01 2.0 % V 12 V VS 20 V 02, 03 1.0 Total variation 2/ fOM1VS= 10 V 4, 5, 6 01 340 460 kHz 02, 03 350 450 f

    35、OM2VS= 30 V 01 340 460 02, 03 350 450 Clock out high VCKH1, 2, 3 01 3.9 V 02, 03 3.7 Clock out low VCKL1, 2, 3 ALL 2.9 V Ramp voltage, peak 2/ VRP1, 2, 3 ALL 2.6 3.0 V Ramp voltage, valley 2/ VRV1, 2, 3 ALL 0.7 1.25 V See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or net

    36、working permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89905 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions 1/ -55C TA +125C unless ot

    37、herwise specified Group A subgroups Device type Limits Unit Min Max Oscillator section continued Ramp voltage, valley 2/ to peak VRVP1, 2, 3 ALL 1.6 2.0 V Oscillator discharge current IODRT = open, V(CT)= 2.0 V 1, 2, 3 02, 03 9.0 11.0 V Error amplifier section Input offset voltage VIOVCM= 3.0 V, VO=

    38、 3.0 V 1, 2, 3 ALL 10 mV Input bias current IISVCM= 3.0 V, VO= 3.0 V 1, 2, 3 ALL 3.0 A Input offset current IIOVCM= 3.0 V, VO= 3.0 V 1, 2, 3 ALL 1.0 A Open loop gain AVOL1.0 V VO 4.0 V 4, 5, 6 ALL 60 dB Common mode rejection ratio CMRR 1.5 V VCM 5.5 V, VOUT= 3.0 V 4, 5, 6 ALL 75 dB Power supply reje

    39、ction ratio PSRR 10 V VS 30 V, VOUT= 3.0 V 4, 5, 6 01 85 dB 12 V VS 20 V, VOUT= 3.0 V 02, 03 85 Output sink current ISNKVE/A OUT= 1.0 V 1, 2, 3 ALL 1.0 mA Output source current ISRCVE/A OUT= 4.0 V 1, 2, 3 ALL -0.5 mA Output high voltage VOH1IE/A OUT= -0.5 mA 1, 2, 3 01 4.0 5.0 V 02, 03 4.5 5.0 Outpu

    40、t low voltage VOL1IE/A OUT= 1.0 mA 1, 2, 3 ALL 0 1.0 V Unity gain bandwidth 2/ BW f = 200 kHz 4, 5, 6 01 3.0 MHz 02, 03 6.0 Slew rate 2/ SR 4, 5, 6 ALL 6.0 V/s See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MI

    41、CROCIRCUIT DRAWING SIZE A 5962-89905 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions 1/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Uni

    42、t Min Max PWM comparator section RAMP bias current IBVRAMP= 0 V 1, 2, 3 01 -5.0 A 02, 03 -8.0 Duty cycle range DCRG4, 5, 6 01 0 80 % 02, 03 0 85 E/A OUT zero dc threshold voltage VTHVRAMP= 0 V 1, 2, 3 ALL 1.1 1.4 V Delay to output 2/ tDI9, 10, 11 ALL 80 ns Soft start duty cycle clamp section Charge

    43、current ICHGVS/S= 0.5 V 1, 2, 3 01 3.0 20 A VS/S= 2.5 V 02, 03 8.0 20 Discharge current IDCGVS/S= 1.0 V 1, 2, 3 01 1.0 mA VS/S= 2.5 V 02, 03 100 350 A Current limit / shutdown section ILSDpin bias current IB0 V V(ILSD) 4.0 V 1, 2, 3 01 10 A 0 V V(ILSD) 2.0 V 02, 03 15 Current limit offset voltage VL

    44、IMV(LIMREF)= 1.1 V 1, 2, 3 01 15 mV Shutdown threshold VSDN1, 2, 3 01 1.25 1.55 V Current limit common mode range ICMR1, 2, 3 01 1.0 1.25 V Delay to output 2/ tD29, 10, 11 ALL 80 ns Output section Output low level VOL2IOUT= 20 mA 1, 2, 3 ALL 0.4 V IOUT= 200 mA 2.2 Output high level VOH2IOUT= -20 mA

    45、1, 2, 3 01 13.0 V 02, 03 2.9 IOUT= -200 mA 01 12.0 02, 03 3.0 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89905 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVE

    46、L H SHEET 8 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions 1/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max Output section continued Collector leakage ILCVC= 30 V 1, 2, 3 01 500 A VC= 20 V 02, 03

    47、150 Rise time 2/ trCL= 1.0 nF 9, 10, 11 01 60 ns 02, 03 45 Fall time 2/ tfCL= 1.0 nF 9, 10, 11 01 60 ns 02, 03 45 UVLO output low saturation VOLSIO= 20 mA 1, 2, 3 02, 03 1.2 V Under voltage lockout section Start threshold VTH1, 2, 3 01 8.8 9.6 V 02 8.4 9.6 03 17 Stop threshold VSTH1, 2, 3 03 9.0 V U

    48、VLO hysteresis Vhys1, 2, 3 01, 02 0.4 1.2 V 03 5.0 7.0 Supply current Start-up current ISTRVS= 8.0 V 1, 2, 3 01 2.5 mA VC= VCC= VTH(START) 0.5 V 02, 03 0.3 Supply current ISV(INV, RAMP, and ILSD) = 0 V, 1, 2, 3 01 33 mA VNINV= 1.0 V 02, 03 36 1/ Unless specified otherwise, characteristics apply at RT= 3.65 k, CT= 1.0 nF, for device type 01, VS= 15 V and for device types 02 and 03, VS= 12 V. 2/ Guaranteed, if not tested, to the specified limits in


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