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    DLA DSCC-VID-V62 09626 REV A-2010 MICROCIRCUIT DIGITAL-LINEAR 16 CHANNEL 24 BIT ANALOG TO DIGITAL CONVERTER MONOLITHIC SILICON.pdf

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    DLA DSCC-VID-V62 09626 REV A-2010 MICROCIRCUIT DIGITAL-LINEAR 16 CHANNEL 24 BIT ANALOG TO DIGITAL CONVERTER MONOLITHIC SILICON.pdf

    1、 REVISIONSLTR DESCRIPTION DATE APPROVEDA Add device type 02 and case outline Y. - ro 10-01-07 C. SAFFLE Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV A A A A A PAGE 18 19 20 21 22 REV STATUS OF PAGES REV A A A A A A A A A A A A A A A A A PAGE 1 2 3 4 5 6 7 8 9 10 11 12 13

    2、14 15 16 17 PMIC N/A PREPARED BY RICK OFFICER DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 Original date of drawing YY-MM-DD CHECKED BY RAJESH PITHADIA TITLE MICROCIRCUIT, DIGITAL-LINEAR, 16 CHANNEL, 24 BIT ANALOG TO DIGITAL CONVERTER, MONOLITHIC SILICON 09-05-12 APPROVED BY JOSEPH D. RO

    3、DENBECK SIZE A CODE IDENT. NO. 16236 DWG NO. V62/09626 REV A PAGE 1 OF 22 AMSC N/A 5962-V021-10 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09626 REV A PAGE 2

    4、1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance 16 channel, 24 bit analog to digital converter (ADC) microcircuit, with an operating temperature range of -55C to +125C for device type 01 and -40C to +105C for device type 02. 1.2 Vendor Item Drawing Administr

    5、ative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/09626 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (S

    6、ee 1.2.3) 1.2.1 Device type(s). Device type Generic Temperature range Circuit function 01 ADS1258M-EP -55C to +125C 16 channel, 24 bit analog to digital converter 02 ADS1258IP-EP -40C to +105C 16 channel, 24 bit analog to digital converter 1.2.2 Case outline(s). The case outline(s) are as specified

    7、herein. Outline letter Number of pins JEDEC PUB 95 Package style X 48 See figure 1 Plastic square leadless chip carrier with thermal pad Y 48 MS-026 Plastic quad flat pack with thermal pad 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device

    8、manufacture: Finish designator Material A Hot solder dip B Tin-lead plateC Gold plateD PalladiumE Gold flash palladium Z Other Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236

    9、DWG NO. V62/09626 REV A PAGE 3 1.3 Absolute maximum ratings. 1/ Positive analog power supply (AVDD) to negative analog power supply (AVSS) . -0.3 V to 5.5 V AVSSto digital ground (DGND) -2.8 V to 0.3 V Digital power supply (DVDD) to DGND . -0.3 V to 5.5 V Input current, momentary . 100 mA Input curr

    10、ent, continuous 10 mA Analog input voltage . AVSS 0.3 V to AVDD+ 0.3 V Digital input voltage to DGND -0.3 V to DVDD+ 0.3 V Maximum junction temperature (TJ) . +150C Storage temperature range -60C to +150C Thermal resistance, junction to case (JC) . 20C/W Thermal resistance, junction to ambient (JA)

    11、: High K 33C/W 2/ Low K . 75C/W 3/ 1.4 Recommended operating conditions. 4/ AVDD+2.5 V AVSS-2.5 V DVDD. +3.3 V Operating temperature range (TA) . -55C to +125C 1/ Stresses beyond those listed under “absolute maximum rating” may cause permanent damage to the device. These are stress ratings only, and

    12、 functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ High K specifies values determined on a JESD 51-7

    13、highly conductive printed circuit board. 3/ Low K specifies values determined on a JESD 51-3 low conductive printed circuit board. 4/ Use of this product beyond the manufacturers design rules or stated parameters is done at the users risk. The manufacturer and/or distributor maintain no responsibili

    14、ty or liability for product used beyond the stated limits. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09626 REV A PAGE 4 2. APPLICABLE DOCUMENTS EIA/JEDEC 51-

    15、3 Low Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages EIA/JEDEC 51-7 High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages JEDEC PUB 95 Registered and Standard Outlines for Semiconductor Devices (Applications for copies should be addressed to th

    16、e Electronic Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834 or online at http:/www.jedec.org) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, o

    17、r logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical perform

    18、ance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline. The case outline shall be as shown in 1.2.2 and figure 1. 3.5.2 Termin

    19、al connections. The terminal connections shall be as shown in figure 2. 3.5.3 Block diagram. The block diagram shall be as shown in figure 3. 3.5.4 Timing waveforms. The timing waveforms shall be as shown in figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without licen

    20、se from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09626 REV A PAGE 5 TABLE I. Electrical performance characteristics. 1/ Test Symbol Conditions 2/Temperature, TADevice type Limits Unit Min Max Analog multiplexer inputs section Absolute input volta

    21、ge VINAIN0-AIN15, AINCOM with respect to DGND -55C to +125C 01 AVSS 100 mV AVDD+ 100 mV V -40C to +105C 02 AVSS 100 mV AVDD+ 100 mV On channel resistance RON-55C to +125C 01 80 typical -40C to +105C 02 80 typical Crosstalk CT fIN= 1 kHz -55C to +125C 01 -110 typical dB -40C to +105C 02 -110 typical

    22、Sensor bias SBCS SBCS1:0 = 01 -55C to +125C 01 1.5 typical A (current source) -40C to +105C 02 1.5 typical SBCS1:0 = 11 -55C to +125C 01 24 typical -40C to +105C 02 24 typical 1.5 A:24 A ratio error RE -55C to +125C 01 1 typical % -40C to +105C 02 1 typical ADC input section Full scale input voltage

    23、 VFSVIN= ADCINP ADCINN -55C to +125C 01 1.0 6 VREFtypical V -40C to +105C 02 1.0 6 VREFtypical Absolute input voltage VIN ADCINP, ADCINN -55C to +125C 01 AVSS 100 mV AVDD+ 100 mV V -40C to +105C 02 AVSS 100 mV AVDD+ 100 mV Differential input impedance ZDIN-55C to +125C 01 65 typical k -40C to +105C

    24、02 65 typical See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09626 REV A PAGE 6 TABLE I. Electrical performance characteristics Con

    25、tinued. 1/ Test Symbol Conditions 2/Temperature, TADevice type Limits Unit Min Max System performance section Resolution RES No missing codes -55C to +125C 01 24 Bits -40C to +105C 02 24 Data rate, fixed channel mode DRF -55C to +125C 01 1.953 125 kSPS -40C to +105C 02 1.953 125 Data rate, auto scan

    26、 mode DRA -55C to +125C 01 1.805 23.739 kSPS -40C to +105C 02 1.805 23.739 Integral nonlinearity 3/ INL Differential input -55C to +125C 01 0.0003 0.0010 % of -40C to +105C 02 0.0003 0.0010 FSR 4/ Offset error, chopping off OE Shorted inputs -55C to +125C 01 20 typical V -40C to +105C 02 20 typical

    27、Offset error, chopping on OE Shorted inputs -55C to +125C 01 -650 650 V -40C to +105C 02 10 Offset drift, chopping off OD Shorted inputs -55C to +125C 01 0.5 typical V/C -40C to +105C 02 0.5 typical Offset drift, chopping on OD Shorted inputs -55C to +125C 01 0.1 V/C -40C to +105C 02 01 Gain error G

    28、E -55C to +125C 01 -0.5 0.5 % -40C to +105C 02 0.5 Gain drift GD -55C to +125C 01 0.4 typical ppm / -40C to +105C 02 2 C Noise N -55C to +125C 01 See table II -40C to +105C 02 See table II See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without lic

    29、ense from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09626 REV A PAGE 7 TABLE I. Electrical performance characteristics Continued. 1/ Test Symbol Conditions 2/Temperature, TADevice type Limits Unit Min Max System performance section - continued. Co

    30、mmon mode rejection ratio CMRR fCM= 60 Hz -55C to +125C 01 90 dB -40C to +105C 02 90 Power supply rejection ratio, AVDD, AVSSPSRR fPS= 60 Hz -55C to +125C 01 70 dB -40C to +105C 02 70 Power supply rejection ratio, DVDDPSRR fPS= 60 Hz -55C to +125C 01 80 dB -40C to +105C 02 80 Voltage reference input

    31、 section Reference input voltage VREFVREF= VREFP- VREFN-55C to +125C 01 0.5 AVDD- AVSSV -40C to +105C 02 0.5 AVDD- AVSSNegative reference input VREFN-55C to +125C 01 AVSS 0.1 VREFP 0.5 V -40C to +105C 02 AVSS 0.1 VREFP 0.5 Positive reference input VREFP-55C to +125C 01 VREFN+ 0.5 AVDD+ 0.1 V -40C to

    32、 +105C 02 VREFN+ 0.5 AVDD+ 0.1 Reference input impedance ZRIN-55C to +125C 01 40 typical k -40C to +105C 02 40 typical See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE

    33、A CODE IDENT NO. 16236 DWG NO. V62/09626 REV A PAGE 8 TABLE I. Electrical performance characteristics Continued. 1/ Test Symbol Conditions 2/Temperature, TADevice type Limits Unit Min Max System parameters section External reference reading error -55C to +125C 01 3 % -40C to +105C 02 3 Analog supply

    34、 reading error -55C to +125C 01 3 % -40C to +105C 02 3 Temperature sensor reading, voltage +25C 01 168 typical mV 02 168 typical Temperature sensor reading, coefficient +25C 01 394 typical V/C 02 394 typical Digital input / output section Logic levels VIH-55C to +125C 01 0.7 DVDDDVDDV -40C to +105C

    35、02 0.7 DVDDDVDDVIL-55C to +125C 01 DGND 0.3 DVDD-40C to +105C 02 DGND 0.3 DVDDVOHIOH= 2 mA -55C to +125C 01 0.8 DVDDDVDD-40C to +105C 02 0.8 DVDDDVDDVOLIOL= 2 mA -55C to +125C 01 DGND 0.2 DVDD-40C to +105C 02 DGND 0.2 DVDDSee footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or

    36、 networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09626 REV A PAGE 9 TABLE I. Electrical performance characteristics Continued. 1/ Test Symbol Conditions 2/Temperature, TADevice type Limits Unit Min Max Digital i

    37、nput / output section - continued. Input leakage IINLVIN= DVDD, GND -55C to +125C 01 10 A -40C to +105C 02 10 Master clock input CLKIO Frequency -55C to +125C 01 0.1 16 MHz -40C to +105C 02 0.1 16 Master clock input CLKIO Duty cycle -55C to +125C 01 40 60 % -40C to +105C 02 40 60 Crystal oscillator

    38、Crystal frequency fCRY-55C to +125C 01 32.768 typical kHz -40C to +105C 02 32.768 typical Clock output frequency fCOUT-55C to +125C 01 15.729 typical MHz -40C to +105C 02 15.729 typical Start up time, clock output valid -55C to +125C 01 150 typical mS -40C to +105C 02 150 typical Clock output duty c

    39、ycle -55C to +125C 01 40 60 % -40C to +105C 02 40 60 Power supply section Digital supply voltage DVDD-55C to +125C 01 2.7 5.25 V -40C to +105C 02 2.7 5.25 Negative analog power supply AVSS-55C to +125C 01 -2.6 0 V -40C to +105C 02 -2.6 0 Positive analog power supply AVDD-55C to +125C 01 AVSS+ 4.75 A

    40、VSS+ 5.25 V -40C to +105C 02 AVSS+ 4.75 AVSS+ 5.25 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09626 REV A PAGE 10 TABLE I. Elec

    41、trical performance characteristics Continued. 1/ Test Symbol Conditions 2/Temperature, TA Device type Limits Unit Min Max Power supply section continued. DVDDsupply current External clock operation IEC-55C to +125C 01 0.75 mA -40C to +105C 02 0.6 Internal oscillator operation, clock output disabled

    42、IOED-55C to +125C 01 0.04 typical mA -40C to +105C 02 0.04 typical Internal oscillator 5/ operation, clock output enabled ICOE-55C to +125C 01 1.4 typical mA -40C to +105C 02 1.4 typical Power down 6/ IPD-55C to +125C 01 25 A -40C to +105C 02 25 AVDD, AVSSsupply current Converting IC-55C to +125C 01

    43、 12 mA -40C to +105C 02 12 Standby ISB-55C to +125C 01 5.6 typical mA -40C to +105C 02 5.6 typical Sleep ISL-55C to +125C 01 2.1 typical mA -40C to +105C 02 2.1 typical Power down IPD-55C to +125C 01 85 A -40C to +105C 02 85 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction

    44、 or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09626 REV A PAGE 11 TABLE I. Electrical performance characteristics Continued. 1/ Test Symbol Conditions 2/Temperature, TADevice type Limits Unit Min Max Power

    45、 dissipation section Converting PC-55C to +125C 01 62 mW -40C to +105C 02 62 Standby PSB-55C to +125C 01 29 typical mW -40C to +105C 02 29 typical Sleep PSL-55C to +125C 01 11 typical mW -40C to +105C 02 11 typical Power down PD-55C to +125C 01 14 typical W -40C to +105C 02 14 typical 1/ Testing and

    46、 other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific parametri

    47、c testing, product performance is assured by characterization and/or design. 2/ Unless otherwise specified, AVDD= +2.5 V, AVSS= -2.5 V, DVDD= +3.3 V, fCLK= 16 MHz (external clock) or fCLK= 15.729 MHz (internal clock), an OPA227 device buffer between multiplexer differential (MUX) outputs and ADC inputs, VREF= +4.096 V, and VREFN= -2.5 V. 3/ Best straight line fit meth


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