欢迎来到麦多课文档分享! | 帮助中心 海量文档,免费浏览,给你所需,享你所想!
麦多课文档分享
全部分类
  • 标准规范>
  • 教学课件>
  • 考试资料>
  • 办公文档>
  • 学术论文>
  • 行业资料>
  • 易语言源码>
  • ImageVerifierCode 换一换
    首页 麦多课文档分享 > 资源分类 > PDF文档下载
    分享到微信 分享到微博 分享到QQ空间

    DLA DSCC-VID-V62 05623 REV A-2012 MICROCIRCUIT DIGITAL DUAL 2-INPUT POSITIVE-NAND GATE MONOLITHIC SILICON.pdf

    • 资源ID:689215       资源大小:109.67KB        全文页数:10页
    • 资源格式: PDF        下载积分:10000积分
    快捷下载 游客一键下载
    账号登录下载
    微信登录下载
    二维码
    微信扫一扫登录
    下载资源需要10000积分(如需开发票,请勿充值!)
    邮箱/手机:
    温馨提示:
    如需开发票,请勿充值!快捷下载时,用户名和密码都是您填写的邮箱或者手机号,方便查询和重复下载(系统自动生成)。
    如需开发票,请勿充值!如填写123,账号就是123,密码也是123。
    支付方式: 支付宝扫码支付    微信扫码支付   
    验证码:   换一换

    加入VIP,交流精品资源
     
    账号:
    密码:
    验证码:   换一换
      忘记密码?
        
    友情提示
    2、PDF文件下载后,可能会被浏览器默认打开,此种情况可以点击浏览器菜单,保存网页到桌面,就可以正常下载了。
    3、本站不支持迅雷下载,请使用电脑自带的IE浏览器,或者360浏览器、谷歌浏览器下载即可。
    4、本站资源下载后的文档和图纸-无水印,预览文档经过压缩,下载后原文更清晰。
    5、试题试卷类文档,如果标题没有明确说明有答案则都视为没有答案,请知晓。

    DLA DSCC-VID-V62 05623 REV A-2012 MICROCIRCUIT DIGITAL DUAL 2-INPUT POSITIVE-NAND GATE MONOLITHIC SILICON.pdf

    1、 REVISIONS LTR DESCRIPTION DATE APPROVED A Update boilerplate paragraphs to current requirements. - PHN 12-01-19 Thomas M. Hess CURRENT DESIGN ACTIVITY CAGE CODE 16236 HAS CHANGED NAMES TO: DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 Prepared in accordance with ASME Y14.24 Vendor item drawing RE

    2、V PAGE REV PAGE REV STATUS OF PAGES REV A A A A A A A A A A PAGE 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY Charles F. Saffle DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO 43218-3990 Original date of drawing CHECKED BY Charles F. Saffle TITLE MICROCIRCUIT, DIGITAL, DUAL 2-INPUT POSITIVE-NAND GATE, M

    3、ONOLITHIC SILICON YY MM DD 05-10-19 APPROVED BY Thomas M. Hess SIZE A CODE IDENT. NO. 16236 DWG NO. V62/05623 REV A PAGE 1 OF 10 AMSC N/A 5962-V024-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE

    4、 A CODE IDENT NO. 16236 DWG NO. V62/05623 REV A PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance dual 2-input positive-NAND gate microcircuit, with an operating temperature range of -55C to +115C. 1.2 Vendor Item Drawing Administrative Control Number.

    5、The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/05623 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device

    6、 type(s). Device type Generic Circuit function 01 SN74LVC2G00W-EP Dual 2-input positive-NAND gate 1.2.2 Case outline(s). The case outlines are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 8 JEDEC MO-187 Plastic small outline package 1.2.3 Lead finishes. The lead fi

    7、nishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator Material A Hot solder dip B Tin-lead plate C Gold plate D Palladium E Gold flash palladium Z Other 1.3 Absolute maximum ratings. 1/ Supply voltage range, (VCC) . -0.5 V to +6.5 V Input volt

    8、age range, (VI) . -0.5 V to +6.5 V 2/ Voltage range applied to any output in the high impedance or power-off state, (VO) -0.5 V to +6.5 V 2/ Voltage range applied to any output in the high or slow state, (VO) . -0.5 V to VCC+ 0.5 V 2/ 3/ Input clamp current, (IIK) (VI 0) -50 mA Output clamp current,

    9、 (IOK) (VO 0) . -50 mA Continuous output current, (IO) 50 mA Continuous current through VCCor GND . 100 mA Package thermal impedance (JA) . 220C/W 4/ Storage temperature range, (TSTG) . -65C to +150C _ 1/ Stresses beyond those listed under “absolute maximum rating” may cause permanent damage to the

    10、device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ The inpu

    11、t negative-voltage and output voltage ratings may exceeded if the input and output clamp-current ratings are observed. 3/ The value of VCCis provided in recommended operating conditions. 4/ The package thermal impedance is calculated in accordance with JESD 51-7. Provided by IHSNot for ResaleNo repr

    12、oduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/05623 REV A PAGE 3 1.4 Recommended operating conditions. 5/ Supply voltage, (VCC): Operating range . +1.65 V to +5.5 V Minimum data retention only +1.5

    13、 V Minimum high level input voltage, (VIH): VCC= 1.65 V to 1.95 V +0.65 x VCCVCC= 2.3 V to 2.7 V +1.7 V VCC= 3 V to 3.6 V . +2 V VCC= 4.5 V to 5.5 V +0.7 x VCCMaximum low level input voltage, (VIL): VCC= 1.65 V to 1.95 V +0.35 x VCCVCC= 2.3 V to 2.7 V +0.7 V VCC= 3 V to 3.6 V . +0.8 V VCC= 4.5 V to

    14、5.5 V +0.3 x VCCInput voltage range, (VI) 0 V to 5.5 V Output voltage range, (VO) 0 V to VCCMaximum high level output current, (IOH): VCC= 1.65 V . -4 mA VCC= 2.3 V . -8 mA VCC= 3 V -16 mA VCC= 3 V . -24 mA VCC= 4.5 V . -32 mA Maximum low level output current, (IOL): VCC= 1.65 V . 4 mA VCC= 2.3 V .

    15、8 mA VCC= 3 V 16 mA VCC= 3 V . 24 mA VCC= 4.5 V . 32 mA Maximum Input transition rise or fall rate (t/v): VCC= 1.8 V 0.15 V, 2.5 V 0.2 V 20 ns/V VCC= 3.3 V 0.3 V . 10 ns/V VCC= 5 V 0.5 V 5 ns/V Operating free air temperature, (TA) -55C to +115C 2. APPLICABLE DOCUMENTS JEDEC SOLID STATE TECHNOLOGY AS

    16、SOCIATION (JEDEC) JEDEC PUB 95 Registered and Standard Outlines for Semiconductor Devices JEDEC STD 51-7 High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages (Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid State Technology Associ

    17、ation, 3103 North 10th Street, Suite 240S, Arlington, VA 22201.) _ 5/ All unused inputs of the device must be held at VCCor GND to ensure proper device operation. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBU

    18、S, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/05623 REV A PAGE 4 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification

    19、 (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4

    20、, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline. The case outline shall be as shown in 1.2.2 and figure 1. 3.5.2 Terminal connections. The terminal connections shall be

    21、 as shown in figure 2. 3.5.3 Logic diagram. The logic diagram shall be as shown in figure 3. 3.5.4 Function table. The function table shall be as shown in figure 4. 3.5.5 Load circuit and switching waveforms. The load circuit and switching waveforms shall be as specified in figure 5. Provided by IHS

    22、Not for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/05623 REV A PAGE 5 TABLE I. Electrical performance characteristics. 1/ Test Symbol Conditions -55C TA +115C unless otherwise speci

    23、fied VCCLimits Unit Min Max High level output voltage VOHIOH= -100 A 1.65 V to 5.5 V VCC 0.1 V IOH= -4 mA 1.65 V 1.2 IOH= -8 mA 2.3 V 1.9 IOH= -16 mA 3 V 2.4 IOH= -24 mA 2.3 IOH= -32 mA 4.5 V 3.8 Low level output voltage VOLIOL= 100 A 1.65 V to 5.5 V 0.1 IOL= 4 mA 1.65 V 0.45 IOL= 8 mA 2.3 V 0.3 IOL

    24、= 16 mA 3 V 0.4 IOL= 24 mA 0.55 IOL= 32 mA 4.5 V 0.57 Input current, A or B inputs IIVI= 5.5 V or GND 0 to 5.5 V 5 A Input/output power off leakage current IoffVIor VO= 5.5 V 0 V 10 A Quiescent supply current ICCVI= 5.5 V or GND, IO= 0 1.65 V to 5.5 V 10 A Quiescent supply current delta ICCOne input

    25、 at VCC 0.6 V, Other inputs at VCCor GND 3 V to 5.5 V 500 A Input capacitance CiVI= VCCor GND, TA= 25C 3.3 V 5 Typ pF Propagation delay time, from input A or B to output Y tpdSee figure 5. 1.8 V 0.15 V 3.7 8.9 ns 2.5 V 0.2 V 1.6 5.8 3.3 V 0.3 V 1.1 5.3 5 V 0.5 V 1 4.3 Power dissipation capacitance C

    26、pdTA= 25C f = 10 MHz 1.8 V 19 Typ pF 2.5 V 19 Typ 3.3 V 20 Typ 5.0 V 22 Typ 1/ Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature ra

    27、nge and all parameters may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization and/or design. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COL

    28、UMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/05623 REV A PAGE 6 Case X Notes: 1. All linear dimensions are in millimeters. 2. This drawing is subject to change without notice. 3. Body dimensions do not include mold flash or protrusion. 4. Falls within JEDEC MO-187 variation DA. FIGURE 1. Case

    29、 outline. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/05623 REV A PAGE 7 Case X Symbol Dimensions Millimeters Inches Min Max Min Max A - 1.30 - 0.051 A1 0.00 0

    30、.10 0.000 0.004 b 0.15 0.30 0.006 0.012 c 0.15 NOM 0.006 NOM D 2.75 3.15 0.108 0.124 E 2.70 2.90 0.106 0.114 E1 3.75 4.25 0.148 0.167 e 0.65 BSC 0.026 BSC L 0.20 0.60 0.008 0.024 FIGURE 1. Case outline - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license

    31、from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/05623 REV A PAGE 8 Case outline: X Terminal number Terminal name 1 1A 2 1B 3 2Y 4 GND 5 2A 6 2B 7 1Y 8 VCCFIGURE 2. Terminal connections. FIGURE 3. Logic diagram. (Each gate) Inputs Output Y A B H L X

    32、 H X L L H H FIGURE 4. Function Table Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/05623 REV A PAGE 9 Notes: 1. CLincludes probe and test fixture capacitance. 2

    33、. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. 3. All input pulses are supplied by generator

    34、s having following characteristics: PRR 10 MHz, ZO= 50 . 4. The outputs are measured one at a time with one transition per measurement. 5. tPLZand tPHZare the same tdis. 6. tPZLand tPZHare the same ten. 7. tPLHand tPHLare the same tpd. 8. All parameters and waveforms are not applicable to all device

    35、s. FIGURE 5. Load circuit and switching waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/05623 REV A PAGE 10 4. VERIFICATION 4.1 Product assurance requir

    36、ements. The manufacturer is responsible for performing all inspection and test requirements as indicated in their internal documentation. Such procedures should include proper handling of electrostatic sensitive devices, classification, packaging, and labeling of moisture sensitive devices, as appli

    37、cable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturers standard commercial practices for electrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices are electrostatic discharge sensitive and are classif

    38、ied as ESDS class 1 minimum. 6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufacturers data book. The device manufacturer reserves the right to make changes without notice. This drawing will be modified as changes are provided. 6.3 Sugge

    39、sted source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee of present or continued availability as a source of supply for the item. Vendor item drawing administrative control number 1/ Device manufacturer CAGE code Vendor part number To

    40、p-side marking 2/ V62/05623-01XE 01295 SN74LVC2G00WDCTREP C00_ _ _ 1/ The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation. 2/ The actual top-side marking has three additional characters that designate the year, month, and ass

    41、embly/test site. CAGE code Source of supply 01295 Texas Instruments, Inc. Semiconductor Group 8505 Forest Lane P.O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84, M/S 853 Sherman, TX 75090-9493 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-


    注意事项

    本文(DLA DSCC-VID-V62 05623 REV A-2012 MICROCIRCUIT DIGITAL DUAL 2-INPUT POSITIVE-NAND GATE MONOLITHIC SILICON.pdf)为本站会员(fatcommittee260)主动上传,麦多课文档分享仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文档分享(点击联系客服),我们立即给予删除!




    关于我们 - 网站声明 - 网站地图 - 资源地图 - 友情链接 - 网站客服 - 联系我们

    copyright@ 2008-2019 麦多课文库(www.mydoc123.com)网站版权所有
    备案/许可证编号:苏ICP备17064731号-1 

    收起
    展开