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    JEDEC JESD8-12A 01-2007 1 2 V + - 0 1V (Normal Range) and 0 8 - 1 3 V (Wide Range) Power Supply Voltage and Interface Standard for Nonterminated Digital Integrated Circuits (Minor .pdf

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    JEDEC JESD8-12A 01-2007 1 2 V + - 0 1V (Normal Range) and 0 8 - 1 3 V (Wide Range) Power Supply Voltage and Interface Standard for Nonterminated Digital Integrated Circuits (Minor .pdf

    1、JEDEC STANDARD 1.2 V +/- 0.1V (Normal Range) and 0.8 - 1.3 V (Wide Range) Power Supply Voltage and Interface Standard for Nonterminated Digital Integrated Circuits JESD8-12A.01 (Minor Revision of JESD8-12A, November 2005) SEPTEMBER 2007 JEDEC SOLID STATE TECHNOLOGY ASSOCIATION NOTICE JEDEC standards

    2、 and publications contain material that has been prepared, reviewed, and approved through the JEDEC Board of Directors level and subsequently reviewed and approved by the JEDEC legal counsel. JEDEC standards and publications are designed to serve the public interest through eliminating misunderstand

    3、ings between manufacturers and purchasers, facilitating interchangeability and improvement of products, and assisting the purchaser in selecting and obtaining with minimum delay the proper product for use by those other than JEDEC members, whether the standard is to be used either domestically or in

    4、ternationally. JEDEC standards and publications are adopted without regard to whether or not their adoption may involve patents or articles, materials, or processes. By such action JEDEC does not assume any liability to any patent owner, nor does it assume any obligation whatever to parties adopting

    5、 the JEDEC standards or publications. The information included in JEDEC standards and publications represents a sound approach to product specification and application, principally from the solid state device manufacturer viewpoint. Within the JEDEC organization there are procedures whereby a JEDEC

    6、standard or publication may be further processed and ultimately become an ANSI standard. No claims to be in conformance with this standard may be made unless all requirements stated in the standard are met. Inquiries, comments, and suggestions relative to the content of this JEDEC standard or public

    7、ation should be addressed to JEDEC at the address below, or call (703) 907-7559 or www.jedec.org Published by JEDEC Solid State Technology Association 2007 2500 Wilson Boulevard Arlington, VA 22201-3834 This document may be downloaded free of charge; however JEDEC retains the copyright on this mater

    8、ial. By downloading this file the individual agrees not to charge for or resell the resulting material. PRICE: Please refer to the current Catalog of JEDEC Engineering Standards and Publications online at http:/www.jedec.org/Catalog/catalog.cfm Printed in the U.S.A. All rights reserved PLEASE! DONT

    9、VIOLATE THE LAW! This document is copyrighted by JEDEC and may not be reproduced without permission. Organizations may obtain permission to reproduce a limited number of copies through entering into a license agreement. For information, contact: JEDEC Solid State Technology Association 2500 Wilson B

    10、oulevard Arlington, Virginia 22201-3834 or call (703) 907-7559 JEDEC Standard No. 8-12A.01 Page 1 1.2 V +/- 0.1 V (Normal Range) and 0.8 - 1.3 V (Wide Range) Power Supply Voltage and Interface Standard for Nonterminated Digital Integrated Circuits (From JEDEC Board Ballot JCB-00-74 and JCB-05-80, fo

    11、rmulated under the cognizance of the JC-16 Committee on Interface Technology) 1 Scope This standard defines power supply voltage ranges, dc interface and switching parameters for a high speed, low voltage family of nonterminated digital circuits driving/driven by parts of the same family, or mixed f

    12、amilies which comply with the input receiver specifications. The specifications in this standard represent a minimum set of interface specifications for CMOS compatible circuits. The purpose of this document is to provide a standard of specification for uniformity, multiplicity of sources, eliminati

    13、on of confusion, and ease of device specification and design by users. Clause 2.3 describes normal dc electrical characteristics and clause 2.4 (added in revision A) describes the optional characteristics for Schmitt trigger operation. 2 Standard specifications All voltages are referenced to ground

    14、except where noted. 2.1 Absolute maximum continuous ratings Supply Voltage, VDD-0.5 V to 1.8 V dc Input Voltage, VIN(except I/O pins) (note 1, 2 and 3) -0.5 V to VDD+ 0.5 V dc Output Voltage, VOUT(including I/O pins) (note 2 and 3) -0.5 V to VDD+ 0.5 V dc Input Diode Current, IIK(VIVDD) +/- 20 mA dc

    15、 Output Diode Current, IOK(VO VDD) +/- 20 mA NOTE 1 Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum

    16、 conditions is not implied. NOTE 2 Not to exceed 1.8 V. NOTE 3 The maximum voltage allowed between any two pins must be less than 2.0 V. JEDEC Standard No. 8-12A.01 Page 2 2.2 Recommended operating conditions 2.2.1 Normal range Symbol Parameter Operating Range VDDPower Supply Voltage 1.1 V to 1.3 V

    17、TAOperating Temperature Note 1 NOTE 1 Specified by manufacture to be commercial, industrial, and/or military grade. 2.2.2 Wide range Symbol Parameter Operating Range VDDPower Supply Voltage 0.8 V to 1.3 V TAOperating Temperature Note 1 NOTE 1 Specified by manufacture to be commercial, industrial, an

    18、d/or military grade. 2.3 DC electrical characteristics 2.3.1 Normal range VDD(min)= 1.1 V and VDD(max)= 1.3 V across operating temperature range - Note 1 and 2 Symbol Parameter Test Condition MIN MAX Unit VDDSupply Voltage 1.1 1.3 V VIHInput High Voltage 0.65 VDDVDD + 0.3 V VILInput Low Voltage -0.3

    19、 0.35 VDDV VOHOutput High Voltage IOH= -2 mA 0.75 VDDV VOLOutput Low Voltage IOL= 2 mA 0.25 VDDV NOTE 1 VDDof the sending and receiving devices must track within 0.1 V to maintain adequate dc margins. NOTE 2 For VIHand VIL, VDDrefers to the receiving device. For VOHand VOL, VDDrefers to the sending

    20、device. JEDEC Standard No. 8-12A.01 Page 3 2.3 DC electrical characteristics (contd) 2.3.2 Wide range VDD(min)= 0.8 V and VDD(max)= 1.3 V across operating temperature range - Note 1 and 2 Symbol Parameter Test Condition MIN MAX Unit VDDSupply Voltage 0.8 1.3 V VIHInput High Voltage 0.7 VDDVDD + 0.3

    21、V VILInput Low Voltage -0.3 0.3 VDDV VOHOutput High Voltage IOH= -100 uA VDD - 0.1 V VOLOutput Low Voltage IOL= 100 uA 0.1 V NOTE 1 VDDof the sending and receiving devices must track within 0.1 V to maintain adequate dc margins. NOTE 2 For VIHand VIL, VDDrefers to the receiving device. For VOHand VO

    22、L, VDDrefers to the sending device. 2.4 Optional DC electrical characteristics for Schmitt trigger operation 2.4.1 Optional Schmitt trigger operation - Normal range VDD(min)= 1.1 V and VDD(max)= 1.3 V across operating temperature range - Note 1 and 2 Symbol Parameter Test Condition MIN MAX Unit VDDS

    23、upply Voltage - 1.1 1.3 V Vt+ (VP) Positive Going Threshold Voltage VOUT VOH(min)0.4 VDD0.7 VDDV Vt (Vn) Negative going Threshold Voltage VOUT VOL(max)0.3 VDD0.6 VDDV Vh(Vt) Hysteresis Voltage Vt+ - Vt 0.1 VDD0.4 VDDV VOHOutput High Voltage IOH= -2 mA 0.75 VDDV VOLOutput Low Voltage IOL= 2 mA 0.25 V

    24、DDV NOTE 1 VDDof the sending and receiving devices must track within 0.1 V to maintain adequate dc margins. NOTE 2 For Vt+ (Vp) and Vt- (Vn), VDDrefers to the receiving device. For VOHand VOL, VDD refers to the sending device. JEDEC Standard No. 8-12A.01 Page 4 2.4 Optional DC electrical characteris

    25、tics for Schmitt trigger operation (contd) 2.4.2 Optional Schmitt trigger operation - Wide range VDD(min)= 0.8 V and VDD(max)= 1.3 V across operating temperature range - Note 1 and 2 Symbol Parameter Test Condition MIN MAX Unit VDDSupply Voltage - 0.8 1.3 V Vt+ (VP) Positive Going Threshold Voltage

    26、VOUT VOH(min)0.35 VDD0.75 VDDV Vt (Vn) Negative going Threshold Voltage VOUT VOL(max)0.25 VDD0.65 VDDV Vh(Vt) Hysteresis Voltage Vt+ - Vt 0.1 VDD0.5 VDDV VOHOutput High Voltage IOH= -100 uA VDD - 0.1 V VOLOutput Low Voltage IOL= 100 uA 0.1 VDDV NOTE 1 VDDof the sending and receiving devices must tra

    27、ck within 0.1 V to maintain adequate dc margins. NOTE 2 For Vt+ (Vp) and Vt- (Vn), VDDrefers to the receiving device. For VOHand VOL, VDD refers to the sending device. 3 Test conditions for Optional Schmitt trigger operation 3.1 Positive Going Threshold Voltage: Vt+ (Vp) As the input signal is raise

    28、d from a ground level in the measurement circuit shown in Figure 1, the input voltage value at which the output logic changed is determined as Vt+ (Vp). 3.2 Negative Going Threshold Voltage: Vt- (Vn) As the input signal is dropped from a power supply voltage level in the measurement circuit shown in

    29、 Figure 1, the input voltage value at which the output logic changed is determined as Vt- (Vn). JEDEC Standard No. 8-12A.01 Page 5 3 Test conditions for Optional Schmitt trigger operation (contd) Figure 1 DC characteristic measurement circuit of Schmitt Trigger input JEDEC Standard No. 8-12A.01 Page

    30、 6 Annex A Differences between JESD8-12A.01 and JESD8-12A This table briefly describes changes that appear in this standard, JESD8-12A.01, compared to its predecessor, JESD8-12A (November 2005). These changes were approved at the March, 2007 meeting of the JC-16 committee. Page Description of change

    31、 3 The table in Section 2.4.1 was updated to properly reflect that the VOHand VOLTest Conditions should be in mA not uA. Annex A.1 (informative) Differences between JESD8-12A and JESD8-12 This table briefly describes most of the changes made to entries that appear in this standard, JESD8-12A, compar

    32、ed to its predecessor, JESD8-12 (May 2001). If the change to a concept involves any words added or deleted (excluding deletion of accidentally repeated words), it is included. Some punctuation changes are not included. Page Description of change 3 Added subclauses 2.4 and 2.4.1 4 Added subclause 2.4

    33、.2 4 Added Clause 3 and its subclauses 5 Added Figure 1 Standard Improvement Form JEDEC JESD8-12A.01 The purpose of this form is to provide the Technical Committees of JEDEC with input from the industry regarding usage of the subject standard. Individuals or companies are invited to submit comments

    34、to JEDEC. All comments will be collected and dispersed to the appropriate committee(s). If you can provide input, please complete this form and return to: JEDEC Attn: Publications Department 2500 Wilson Blvd. Suite 220 Arlington, VA 22201-3834 Fax: 703.907.7583 1. I recommend changes to the following: Requirement, clause number Test method number Clause number The referenced clause number has proven to be: Unclear Too Rigid In Error Other 2. Recommendations for correction: 3. Other suggestions for document improvement: Submitted by Name: Phone: Company: E-mail: Address: City/State/Zip: Date:


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