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    DLA SMD-5962-99521 REV C-2012 MICROCIRCUIT MEMORY DIGITAL CMOS ELECTRICALLY ALTERABLE (IN-SYS REPROGRAMMABLE) 128 MACROCELL PROGRAMMABLE LOGIC DEVICE MONOLITHIC SILICON.pdf

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    DLA SMD-5962-99521 REV C-2012 MICROCIRCUIT MEMORY DIGITAL CMOS ELECTRICALLY ALTERABLE (IN-SYS REPROGRAMMABLE) 128 MACROCELL PROGRAMMABLE LOGIC DEVICE MONOLITHIC SILICON.pdf

    1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A IOZBHparameter removed from Table I, CDP added to Tavle I. Other typos corrected in Table I. ksr 00-12-01 Raymond Monnin B Boilerplate update and part of five year review. tcr 06-01-05 Raymond Monnin C Boilerplate update for five year review. lhl

    2、 12-02-06 Charles F. Saffle REV SHEET REV C C C C C C C C C SHEET 15 16 17 18 19 20 21 22 23 REV STATUS REV C C C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Kenneth Rice DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil

    3、 STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY Jeff Bowling APPROVED BY Raymond Monnin MICROCIRCUIT, MEMORY, DIGITAL, CMOS, ELECTRICALLY ALTERABLE (IN-SYS REPROGRAMMABLE), 128 MACROCELL, PROGRAMMABLE LOGIC DEVI

    4、CE, MONOLITHIC SILICON AMSC N/A DRAWING APPROVAL DATE 00 02 29 REVISION LEVEL C SIZE A CAGE CODE 67268 5962-99521 SHEET 1 OF 23 DSCC FORM 2233 APR 97 5962-E125-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 59

    5、62-99521 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outli

    6、nes and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 99521 01 Q Y A Federal RHA Device Device Case Le

    7、ad stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA

    8、 designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic num

    9、ber Circuit function Toggle Speed (MHz) 01 CY37128 128 Macrocell CPLD 100 02 CY37128 128 Macrocell CPLD 125 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-c

    10、ertification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline le

    11、tter Descriptive designator Terminals Package style Y GQCC1-J44 84 J-leaded chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitte

    12、d without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-99521 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) - -0.5 V dc to +7.0 V dc Programming supply voltage range (VPP) -

    13、4.5 V dc to 5.5 V dc DC input voltage range - -0.5 V dc to +7.0 V dc Maximum power dissipation - 1.0 W 2/ Lead temperature (soldering, 10 seconds) - +260C Thermal resistance, junction-to-case (JC): Case outline Y - See MIL-STD-1835 Junction temperature (TJ) - +150C 3/ Storage temperature range - -65

    14、C to +150C Endurance - 25 erase/write cycles (minimum) Data retention - 10 years (minimum) 1.4 Recommended operating conditions. 4/ Case operating temperature Range (TC) - -55C to +125C Supply voltage relative to ground (VCC) - +4.5V dc minimum to +5.5 V dc maximum Ground voltage (GND) - 0 V dc Inpu

    15、t high voltage (VIH) - 2.0 V dc minimum Input low voltage (VIL) - 0.8 V dc maximum 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specif

    16、ied, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Inte

    17、rface Standard For Microcircuit Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings (SMDs). MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardi

    18、zation Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Must withstand the added PD

    19、due to short circuit test (e.g., IOS). 3/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. 4/ All voltage values in this drawing are with respect to VSSProvided by IHSNot for ResaleNo re

    20、production or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-99521 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 2.2 Non-Government publications. The following document(s) form a part of this document to th

    21、e extent specified herein. Unless otherwise specified, the issues of the documents are the issues of the documents cited in the solicitation. JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JEDEC Standard No. 78 - IC Latch-Up Test. (Copies of this document are available online at www.jedec.org/ or

    22、from JEDEC Solid State Technology Association, 3103 North 10thStreet, Suite 240-S, Arlington, VA 22201). (Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These documents also may be available in or through librar

    23、ies or other informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemp

    24、tion has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall

    25、not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction,

    26、 and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections

    27、shall be as specified on figure 1. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operat

    28、ing temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufactur

    29、ers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device clas

    30、ses Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark fo

    31、r device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For devic

    32、e class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing

    33、 shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q

    34、and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DLA Land and Maritime-VA of change of product (see 6.2 herein) invo

    35、lving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and

    36、applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-99521 DLA LAND AND MARITIME COLUMBUS, O

    37、HIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 42 (see MIL-PRF-38535, appendix A). 3.11 Processing CPLDs. All testing requirements and quality as

    38、surance provisions herein shall be satisfied by the manufacturer prior to delivery. 3.11.1 Erasure of CPLDs. When specified, devices shall be erased in accordance with the procedures and characteristics specified in 4.6 herein. 3.11.2 Programmability of CPLDs. When specified, devices shall be progra

    39、mmed to the specified pattern using the procedures and characteristics specified in 4.7 herein. 3.11.3 Verification of erasure or programmed CPLDs. When specified, devices shall be verified as either programmed (see 4.7 herein) to the specified pattern or erased (see 4.6 herein). As a minimum, verif

    40、ication shall consist of performing a functional test (subgroup 7) to verify that all bits are in the proper state. Any bit that does not verify to be in the proper state shall constitute a device failure, and shall be removed from the lot. 3.12 Endurance. A reprogrammability test shall be completed

    41、 as part of the vendors reliability monitor. This reprogrammability test shall be done only for initial characterization and after any design or process changes which may affect the reprogrammability of the device. The methods and procedures may be vendor specific, but shall be under document contro

    42、l and shall be made available upon request. 3.13 Data Retention. A data retention stress test shall be completed as part of the vendors reliability monitors. This test shall be done for initial characterization and after any design or process changes which may affect data retention. The methods and

    43、procedures may be vendor specific, but shall guarantee the number of years listed in section 1.3 herein over the full military temperature range. The vendors procedure shall be kept under document control and shall be made available upon request of the acquiring or preparing activity, along with the

    44、 test data. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-99521 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics

    45、. Test Symbol Conditions 4.5 V VCC 5.5 V -55oC TC +125oC unless otherwise specified Group A Subgroups Device type Limits Unit Min Max High Level output voltage VOHVCC= 4.5 V, VIL= 0.8V IOH= -2.0 mA, VIH= 2.0 V 1/ 1, 2, 3 All 2.4 V High Level output voltage with Output Disabled 2/ VOHZVCC= 5.5 V, VIL

    46、 = 0.8 V IOH = 0 A, VIH= 2.0 V 3/ 4.5 V VCC= 5.5 V, VIL = 0.8 V IOH = -150 A, VIH= 2.0 V 3/ 3.6 V Low level output voltage VOLVCC= 4.5 V, IOL= 12.0 mA VIL= 0.8 V, VIH= 2.0 V 1/ 0.5 V High level input voltage 4/ VIH2 VCC+ 0.5 V V Low level input voltage 4/ VIL-0.5 0.8 V Input load current IIXVIN= 0 V or VCC, with Busshold off -10 +10 A Output leakage current IOZVO= GND or VCC= 5.5 V, Output disabled, Busshold off -50 +50 A Output short circuit current 2/ 5/ IOSVCC= 5.5 V, VOUT= 0.5 V -30 -160 mA Power supply current 6/ ICCVCC= 5.5


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