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    DLA SMD-5962-96577 REV C-2013 MICROCIRCUIT DIGITAL ADVANCED CMOS RADIATION HARDENED LOOK-AHEAD CARRY GENERATOR FOR COUNTERS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

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    DLA SMD-5962-96577 REV C-2013 MICROCIRCUIT DIGITAL ADVANCED CMOS RADIATION HARDENED LOOK-AHEAD CARRY GENERATOR FOR COUNTERS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

    1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add limit for linear energy threshold (LET) with no latch-up in section 1.5. Update the boilerplate to the requirements of MIL-PRF-38535. Editorial changes throughout. - TVN 05-12-06 Thomas M. Hess B Update radiation features in sections 1.5 and

    2、SEP table IB. Change the title. Update the boilerplate to the requirements of MIL-PRF-38535. Editorial changes throughout. - jak 12-05-02 Thomas M. Hess C To correct switching waveforms input/output test limits to figure 4. Add test equivalent circuits and footnote 5 to figure 4. Delete class M requ

    3、irements throughout.MAA 13-01-25 Thomas M. Hess REV SHEET REV C C C SHEET 15 16 17 REV STATUS OF SHEETS REV C C C C C C C C C C C C C C SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Joseph A. Kerby DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDA

    4、RD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY Charles F. Saffle, Jr. APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, ADVANCED CMOS, RADIATION HARDENED, LOOK-AHEAD CARRY GENERATOR FOR COUNTERS, TTL COMP

    5、ATIBLE INPUTS, MONOLITHIC SILICON DRAWING APPROVAL DATE 96-12-20 REVISION LEVEL C SIZE A CAGE CODE 67268 5962-96577 SHEET 1 OF 17 DSCC FORM 2233 APR 97 5962-E188-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAN

    6、D AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-96577 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q) and space application (device class V). A choice of case outlines an

    7、d lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 H 96577 01 V X A Federal RHA Device Device Case Lead sto

    8、ck class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA desig

    9、nator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ACTS264 Radiation hardened, look-ahead carry generator for counters, TTL compatible inputs 1.2.3 Device class designator.

    10、The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outli

    11、ne letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line X CDFP4-F16 16 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V. Provided by IHSNot for ResaleNo reproduction or networking permitted without lice

    12、nse from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-96577 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VDD) -0.3 V dc to +7.0 V dc DC input voltage range (VIN) -0.3 V dc to VDD + 0.3

    13、 V dc DC output voltage range (VOUT) . -0.3 V dc to VDD+ 0.3 V dc DC input current, any one input (IIN). 10 mA Latch-up immunity current (ILU) 150 mA Storage temperature range (TSTG) . -65C to +150C Lead temperature (soldering, 5 seconds) +300C Thermal resistance, junction-to-case (JC) . See MIL-STD

    14、-1835 Junction temperature (TJ) +175C Maximum power dissipation (PD) . 1.0 W 1.4 Recommended operating conditions. 2/ 3/ Supply voltage range (VDD) +4.5 V dc to +5.5 V dc Input voltage range (VIN) 0.0 V dc to VDDOutput voltage range (VOUT). 0.0 V dc to VDDMaximum input rise or fall time at VDD= 4.5

    15、V (tr, tf) 1 ns/V 4/ Case operating temperature range (TC) . -55C to +125C 1.5 Radiation features. 5/ Maximum total dose available (dose rate = 50 300 rads (Si)/s) . 1 x 106Rads (Si) Single event phenomenon (SEP) : No SEU occurs at effective LET (see 4.4.4.4) . 80 MeV-cm2/mg 6/ No SEL occurs at effe

    16、ctive LET (see 4.4.4.4) . 120 MeV-cm2/mg 6/ Dose rate induced upset (20 ns pulse) 1 x 109Rads (Si)/s 6/ Latch-up . None 6/ Dose rate survivability 1 x 1012Rads (Si)/s 6/ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels m

    17、ay degrade performance and affect reliability. 2/ Unless otherwise specified, all voltages are referenced to VSS. 3/ The limits for the parameters specified herein shall apply over the full specified VDDrange and case temperature range of -55C to +125C unless otherwise specified. 4/ Derate system pr

    18、opagation delays by difference in rise time to switch point for tror tf 1 ns/V. 5/ Radiation testing is performed on the standard evaluation circuit SEC). 6/ Limits are guaranteed by design or process, but not production tested unless specified by the customer through the purchase order or contract.

    19、 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-96577 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, stan

    20、dards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integ

    21、rated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL

    22、-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s)

    23、 form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. ASTM INTERNATIONAL (ASTM) ASTM F1192 - Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irra

    24、diation of semiconductor Devices. (Copies of these documents are available online at http:/www.astm.org/ or from ASTM International, 100 Barr Harbor Drive, P.O. Box C700, West Conshohocken, PA, 19428-2959). 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the

    25、references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be

    26、 in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordan

    27、ce with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A

    28、and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth tables. The truth tables shall be as specified on figure 2. 3.2.4 Logic diagram. The log

    29、ic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LA

    30、ND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-96577 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and post irradiation parameter lim

    31、its are as specified in table IA and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table IA. 3.5 Marking. The part sha

    32、ll be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using thi

    33、s option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. 3.6 Certificate of compliance

    34、. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of s

    35、upply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein . 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 shall be provided with each lot of

    36、 microcircuits delivered to this drawing. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-96577 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE IA. Electri

    37、cal performance characteristics. Test Symbol Test conditions 1/ -55C TC +125C unless otherwise specified Device type VDDGroup A subgroups Limits 2/ Unit Min Max High level input voltage VIH All 4.5 V 1, 2, 3 2.25 V M, D, P, L, R, F, G, H 3/ All 1 2.25 All 5.5 V 1, 2, 3 2.75 M, D, P, L, R, F, G, H 3/

    38、 All 1 2.75 Low level input voltage VIL All 4.5 V 1, 2, 3 0.8 V M, D, P, L, R, F, G, H 3/ All 1 0.8 All 5.5 V 1, 2, 3 0.8 M, D, P, L, R, F, G, H 3/ All 1 0.8 High level output voltage VOH For all inputs affecting output under test, VIN= VDDor VSSIOH= -8.0 mA All 4.5 V 1, 2, 3 3.15 V M, D, P, L, R, F

    39、, G, H 3/ All 1 3.15 Low level output voltage VOL For all inputs affecting output under test, VIN= VDDor VSSIOL= 8.0 mA All 4.5 V 1, 2, 3 0.4 V M, D, P, L, R, F, G, H 3/ All 1 0.4 Input current high IIH For input under test, VIN= VDDFor all other inputs, VIN= VDDor VSSAll 5.5 V 1, 2, 3 +1.0 A M, D,

    40、P, L, R, F, G, H 3/ All 1 +1.0 Input current low IIL For input under test, VIN= VSSFor all other inputs, VIN= VDDor VSSAll 5.5 V 1, 2, 3 -1.0 A M, D, P, L, R, F, G, H 3/ All 1 -1.0 Output current (source) IOH4/ For output under test, VOUT= VDD - 0.4 V VIN= VDDor VSSAll 4.5 V and 5.5 V 1, 2, 3 -8.0 m

    41、A M, D, P, L, R, F, G, H 3/ All 1 -8.0 Output current (sink) IOL4/ For output under test, VOUT= 0.4 V VIN= VDDor VSSAll 4.5 V and 5.5 V 1, 2, 3 8.0 mA M, D, P, L, R, F, G, H 3/ All 1 8.0 Quiescent supply current IDDQVIN= VDDor VSSAll 5.5 V 1, 2, 3 10.0 A M, D, P, L, R, F, G, H 3/ All 1 10.0 Quiescen

    42、t supply current delta, TTL input levels IDDQ5/ For input under test, VIN= VDD- 2.1 V For all other inputs, VIN= VDDor VSSAll 5.5 V 1, 2, 3 1.6 mA M, D, P, L, R, F, G, H 3/ All 1 1.6 Short circuit output current IOS6/ 7/ VOUT= VDDand VSSAll 5.5 V 1, 2, 3 200 mA See footnotes at end of table. Provide

    43、d by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-96577 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics Continued. Test S

    44、ymbol Test conditions 1/ -55C TC +125C unless otherwise specified Device type VDDGroup A subgroups Limits 2/ Unit Min Max Input capacitance CINf = 1 MHz See 4.4.1c All 0.0 V 4 15.0 pF Output capacitance COUTf = 1 MHz See 4.4.1c All 0.0 V 4 15.0 pF Switching power dissipation PSW8/ CL= 50 pF, per swi

    45、tching output All 4.5 V and 5.5 V 4, 5, 6 2.2 mW/ MHz M, D, P, L, R, F, G, H 3/ All 4 2.2 Functional test 9/ VIH= 0.5 VDD, VIL= 0.8 VSee 4.4.1b All 4.5 V and 5.5 V 7, 8 L H M, D, P, L, R, F, G, H 3/ All 7 L H Propagation delay time, CE to Cn tPLH110/ CL= 50 pF minimum See figure 4 All 4.5 V and 5.5

    46、V 9, 10, 11 1.0 17.0 ns M, D, P, L, R, F, G, H 3/ All 9 1.0 17.0 tPHL110/ CL= 50 pF minimum See figure 4 All 4.5 V and 5.5 V 9, 10, 11 1.0 16.0 M, D, P, L, R, F, G, H 3/ All 9 1.0 16.0 Propagation delay time, An or Bn to Cn tPLH210/ CL= 50 pF minimum See figure 4 All 4.5 V and 5.5 V 9, 10, 11 1.0 15

    47、.0 ns M, D, P, L, R, F, G, H 3/ All 9 1.0 15.0 tPHL210/ CL= 50 pF minimum See figure 4 All 4.5 V and 5.5 V 9, 10, 11 1.0 17.0 M, D, P, L, R, F, G, H 3/ All 9 1.0 17.0 Propagation delay time, An, Bn, or CE to RCOA tPLH310/ CL= 50 pF minimum See figure 4 All 4.5 V and 5.5 V 9, 10, 11 1.0 15.0 ns M, D,

    48、 P, L, R, F, G, H 3/ All 9 1.0 15.0 tPHL310/ CL= 50 pF minimum See figure 4 All 4.5 V and 5.5 V 9, 10, 11 1.0 15.0 M, D, P, L, R, F, G, H 3/ All 9 1.0 15.0 Propagation delay time, Bn or CE to RCOB tPLH410/ CL= 50 pF minimum See figure 4 All 4.5 V and 5.5 V 9, 10, 11 1.0 12.0 ns M, D, P, L, R, F, G, H 3/ All 9 1.0 12.0 tPHL410/ CL= 50 pF minimum See figure 4 All 4.5 V and 5.5 V 9, 10, 11 1.0 15.0 M, D, P, L, R, F, G, H 3/ All 9 1.0 15.0 1/ Each input/output, as applicable, shall be tested at the specified temperature, for the specified li


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