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    DLA SMD-5962-96530 REV D-2013 MICROCIRCUIT DIGITAL ADVANCED CMOS RADIATION HARDENED HEX NONINVERTING BUFFER MONOLITHIC SILICON.pdf

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    DLA SMD-5962-96530 REV D-2013 MICROCIRCUIT DIGITAL ADVANCED CMOS RADIATION HARDENED HEX NONINVERTING BUFFER MONOLITHIC SILICON.pdf

    1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R112-97. - TVN 96-12-12 Monica L. Poelking B Add limit for linear energy threshold (LET) with no latch-up in section 1.5. Update the boilerplate to the requirements of MIL-PRF-38535. Editorial changes throughou

    2、t. - TVN 05-10-21 Thomas M. Hess C Change the title. Update the boilerplate to the requirements of MIL-PRF-38535. Editorial changes throughout. - jak 12-04-04 Thomas M. Hess D Add die appendix A for device type 01. Update boilerplate paragraphs as required by the current MIL-PRF-38535. Delete class

    3、M requirements throughout.- MAA 13-07-09 Thomas M. Hess REV SHEET REV D D D D D D SHEET 15 16 17 18 19 20 REV STATUS OF SHEETS REV D D D D D D D D D D D D D D SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Larry T. Gauder DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landand

    4、maritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY Thanh V. Nguyen APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, ADVANCED CMOS, RADIATION HARDENED, HEX NONINVERTING BUFFER, MONOLITH

    5、IC SILICON DRAWING APPROVAL DATE 96-04-03 REVISION LEVEL D SIZE A CAGE CODE 67268 5962-96530 SHEET 1 OF 20 DSCC FORM 2233 APR 97 5962-E479-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS

    6、, OHIO 43218-3990 SIZE A 5962-96530 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q) and space application (device class V). A choice of case outlines and lead finishes are ava

    7、ilable and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 H 96530 01 V X A Federal RHA Device Device Case Lead stock class designator typ

    8、e class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indic

    9、ates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ACS34 Radiation hardened, hex noninverting buffer 1.2.3 Device class designator. The device class designator is a single letter identifying the p

    10、roduct assurance level as follows: Device class Device requirements documentation Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style C GDIP1

    11、-T14 or CDIP2-T14 14 Dual-in-line X CDFP3-F14 14 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARI

    12、TIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-96530 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VDD) -0.3 V dc to +7.0 V dc DC input voltage range (VIN) -0.3 V dc to VDD + 0.3 V dc DC output voltage range (VOUT) . -0.3 V dc to VDD+ 0.3 V d

    13、c DC input current, any one input (IIN). 10 mA Latch-up immunity current (ILU) 150 mA Storage temperature range (TSTG) . -65C to +150C Lead temperature (soldering, 5 seconds) +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C Maximum power dissipation

    14、(PD) . 1.0 W 1.4 Recommended operating conditions. 2/ 3/ Supply voltage range (VDD) +4.5 V dc to +5.5 V dc Input voltage range (VIN) 0.0 V dc to VDDOutput voltage range (VOUT). 0.0 V dc to VDDMaximum input rise or fall time at VDD= 4.5 V (tr, tf) 1 ns/V 4/ Case operating temperature range (TC) . -55

    15、C to +125C 1.5 Radiation features. 5/ Maximum total dose available (dose rate = 50 300 rads (Si)/s) 1 x 106Rads (Si) Single event phenomenon (SEP) effective: No SEU occurs at effective LET (see 4.4.4.4) . 80 MeV-cm2/mg 6/ No SEL occurs at effective LET (see 4.4.4.4) . 120 MeV-cm2/mg 6/ Dose rate ups

    16、et (20 ns pulse) 1 x 109Rads (Si)/s 6/ Latch-up . None 6/ Dose rate survivability 1 x 1012Rads (Si)/s 6/ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwis

    17、e specified, all voltages are referenced to VSS. 3/ The limits for the parameters specified herein shall apply over the full specified VDDrange and case temperature range of -55C to +125C unless otherwise specified. 4/ Derate system propagation delays by difference in rise time to switch point for t

    18、ror tf 1 ns/V. 5/ Radiation testing is performed on the standard evaluation circuit (SEC). 6/ Limits are guaranteed by design or process, but not production tested unless specified by the customer through the purchase order or contract. Provided by IHSNot for ResaleNo reproduction or networking perm

    19、itted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-96530 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, an

    20、d handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPART

    21、MENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these doc

    22、uments are available online at http:/quicksearch.dla.mil/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless oth

    23、erwise specified, the issues of these documents are those cited in the solicitation or contract. ASTM INTERNATIONAL (ASTM) ASTM F1192 - Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of semiconductor Devices. (Copies of these documents are availab

    24、le online at http:/www.astm.org/ or from ASTM International, 100 Barr Harbor Drive, P.O. Box C700, West Conshohocken, PA, 19428-2959). 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Noth

    25、ing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified

    26、 in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and

    27、herein for device classes Q and V. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The l

    28、ogic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA

    29、LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-96530 REVISION LEVEL D SHEET 5 DSCC FORM 2234 APR 97 3.2.6 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing and

    30、 acquiring activity upon request. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table IA and shall apply over the full case operat

    31、ing temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table IA. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufactu

    32、rers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device cla

    33、sses Q and V shall be in accordance with MIL-PRF-38535. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be require

    34、d from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets,

    35、for device classes Q and V, the requirements of MIL-PRF-38535 and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered

    36、 to this drawing. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-96530 REVISION LEVEL D SHEET 6 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characte

    37、ristics. Test Symbol Test conditions 1/ -55C TC +125C unless otherwise specified Device type VDDGroup A subgroups Limits 2/ Unit Min Max High level input voltage VIH All 4.5 V 1, 2, 3 3.15 V M, D, P, L, R, F, G, H 3/ All 1 3.15 All 5.5 V 1, 2, 3 3.85 M, D, P, L, R, F, G, H 3/ All 1 3.85 Low level in

    38、put voltage VIL All 4.5 V 1, 2, 3 1.35 V M, D, P, L, R, F, G, H 3/ All 1 1.35 All 5.5 V 1, 2, 3 1.65 M, D, P, L, R, F, G, H 3/ All 1 1.65 High level output voltage VOH For all inputs affecting output under test, VIN= VDDor VSS- IOH= -100 A All 4.5 V 1, 2, 3 4.25 V M, D, P, L, R, F, G, H 3/ All 1 4.2

    39、5 Low level output voltage VOL For all inputs affecting output under test, VIN= VDDor VSSIOL= 100 A All 4.5 V 1, 2, 3 0.25 V M, D, P, L, R, F, G, H 3/ All 1 0.25 Input current high IIH For input under test, VIN= VDDFor all other inputs, VIN= VDDor VSSAll 5.5 V 1, 2, 3 +1.0 A M, D, P, L, R, F, G, H 3

    40、/ All 1 +1.0 Input current low IIL For input under test, VIN= VSSFor all other inputs, VIN= VDDor VSSAll 5.5 V 1, 2, 3 -1.0 A M, D, P, L, R, F, G, H 3/ All 1 -1.0 Output current (source) IOH4/ For output under test, VOUT= VDD - 0.4 V VIN= VDDor VSSAll 4.5 V and 5.5 V 1, 2, 3 -8.0 mA M, D, P, L, R, F

    41、, G, H 3/ All 1 -8.0 Output current (sink) IOL4/ For output under test, VOUT= 0.4 V VIN= VDDor VSSAll 4.5 V and 5.5 V 1, 2, 3 8.0 mA M, D, P, L, R, F, G, H 3/ All 1 8.0 Quiescent supply current IDDQVIN= VDDor VSSAll 5.5 V 1, 2, 3 10.0 A M, D, P, L, R, F, G, H 3/ All 1 10.0 Short circuit output curre

    42、nt IOS5/ 6/ VOUT= VDDand VSSAll 5.5 V 1, 2, 3 200 mA See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-96530 REVISION LEVEL D SHEET

    43、 7 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics Continued. Test Symbol Test conditions 1/ -55C TC +125C unless otherwise specified Device type VDDGroup A subgroups Limits 2/ Unit Min Max Input capacitance CINf = 1 MHz See 4.4.1c All 0.0 V 4 15.0 pF Output capacitance COUTf

    44、= 1 MHz See 4.4.1c All 0.0 V 4 15.0 pF Switching power dissipation PSW7/ CL= 50 pF, per switching output All 4.5 V and 5.5 V 4, 5, 6 1.8 mW/ MHz M, D, P, L, R, F, G, H 3/ All 4 1.8 Functional test 8/ VIH= 0.7 VDD, VIL= 0.3 VDD See 4.4.1b All 4.5 V and 5.5 V 7, 8 L H M, D, P, L, R, F, G, H 3/ All 7 L

    45、 H Propagation delay time, An to Yn tPLH9/ CL= 50 pF minimum See figure 4 All 4.5 V and 5.5 V 9, 10, 11 1.0 11.0 ns M, D, P, L, R, F, G, H 3/ All 9 1.0 11.0 tPHL9/ CL= 50 pF minimum See figure 4 All 4.5 V and 5.5 V 9, 10, 11 1.0 11.0 M, D, P, L, R, F, G, H 3/ All 9 1.0 11.0 1/ Each input/output, as

    46、applicable, shall be tested at the specified temperature, for the specified limits, to the tests in table IA herein. Output terminals not designated shall be high level logic, low level logic, or open, except for the IDDQtest, the output terminals shall be open. When performing the IDDQtest, the cur

    47、rent meter shall be placed in the circuit such that all current flows through the meter. 2/ For negative and positive voltage and current values, the sign designates the potential difference in reference to VSSand the direction of current flow, respectively; and the absolute value of the magnitude,

    48、not the sign, is relative to the minimum and maximum limits, as applicable, listed herein. 3/ RHA devices supplied to this drawing have been characterized through all levels M, D, P, L, R, F, G, and H of irradiation. However, these devices are only tested in accordance with MIL-STD-883, method 1019, condition A for RHA level “H“. Pre and post irradiation values are identical unless otherwise specified in table IA. When performing post irradiation electrical measurements for any RHA level, TA= +25C. 4/ This test is guaranteed based on chara


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