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    DLA SMD-5962-95618 REV B-2013 MICROCIRCUIT DIGITAL ADVANCED CMOS 16-BIT TRANSPARENT LATCH WITH THREESTATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

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    DLA SMD-5962-95618 REV B-2013 MICROCIRCUIT DIGITAL ADVANCED CMOS 16-BIT TRANSPARENT LATCH WITH THREESTATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

    1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update the boilerplate to current requirements as specified in MIL-PRF-38535. jak 07-08-23 Thomas M. Hess B Update boilerplate paragraphs to the current MIL-PRF-38535 requirements. Delete class M requirement throughout.- LTG 13-12-17 Thomas M. He

    2、ss REV SHEET REV B B B SHEET 15 16 17 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Joseph. A. Kerby DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAI

    3、LABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY Thanh V. Nguyen APPROVED BY Thomas M. Hess MICROCIRCUIT, DIGITAL, ADVANCED CMOS, 16-BIT TRANSPARENT LATCH WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON DRAWING APPROVAL DATE 95-05-11

    4、REVISION LEVEL B SIZE A CAGE CODE 67268 5962-95618 SHEET 1 OF 17 DSCC FORM 2233 APR 97 5962-E084-14 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95618 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISI

    5、ON LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Id

    6、entifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 95618 01 Q X A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designato

    7、r Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s

    8、). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ACTQ16373 16-bit transparent latch with three-state outputs, TTL compatible inputs 1.2.3 Device class designator. The device class designator is a single letter identifying the product as

    9、surance level as follows: Device class Device requirements documentation Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X GDFP1-F48 48 F

    10、lat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95618 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 R

    11、EVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC+ 0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc DC input clamp current (IIK): VIN= -0.5 V 20 mA V

    12、IN= VCC+0.5 . +20 mA DC output clamp diode current (IOK): VOUT= -0.5 V 20 mA VOUT= VCC+0.5 +20 mA DC output current (IOUT) per output pin 50 mA DC VCCor GND current (ICC, IGND) per pin 400 mA Storage temperature range (TSTG) . -65C to +150C Lead temperature (soldering, 10 seconds) +300C Thermal resi

    13、stance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ). +175C Maximum power dissipation (PD) . 750 mW 1.4 Recommended operating conditions. 2/ 3/ Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Input voltage range (VIN) +0.0 V dc to VCCOutput voltage range (VOUT) . +0.0 V dc to

    14、 VCCMaximum low level input voltage (VIL) 0.8 V Minimum high level input voltage (VIH) . 2.0 V Case operating temperature range (TC) . -55C to +125C Minimum input edge rate (V/t): (VINfrom 0.8 V to 2.0 V or VINfrom 2.0 V to 0.8 V) . 125 mV/ns Maximum high level output current (IOH) -24 mA Maximum lo

    15、w level output current (IOL) +24 mA 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise noted, all voltages are referenced to GND. 3/ The limits for the pa

    16、rameters specified herein shall apply over the full specified VCCrange and case temperature range of -55C to +125C. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95618 DLA LAND AND MARITIME COLUMBUS, OHIO 4

    17、3218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these d

    18、ocuments are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic

    19、Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/quicksearch.dla.mil or from the Standardization Document Order Desk, 700 Robbins Ave

    20、nue, Building 4D, Philadelphia, PA 19111-5094). 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents cited in the solicitation or contract. JEDEC SOLID STATE TECHNOLOGY ASSOCI

    21、ATION (JEDEC) JESD20 - Standard for Description of 54/74ACXXXXX and 54/74ACTXXXXX Advanced High-Speed CMOS Devices. (Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10thStreet, Suite 240-S Arlington, VA 22201-2107). A

    22、STM INTERNATIONAL (ASTM) ASTM F1192 - Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of Semiconductor Devices. (Copies of this document is available online at http:/www.astm.org/ or from ASTM International, 100 Barr Harbor Drive, P. O. Box C700, W

    23、est Conshohocken, PA 19428-2959). 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption

    24、 has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 as specified herein, or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not aff

    25、ect the form, fit, or function as described herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V. Provided by IHSNot for ResaleNo reproduction or networking permitted

    26、without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95618 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connec

    27、tions shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Ground bounce waveforms and test circuit. The ground bounce waveforms and test circuit shall be as specified

    28、on figure 4. 3.2.6 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 5. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and post

    29、irradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5

    30、 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For

    31、 RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. 3.6 Cer

    32、tificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an

    33、 approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 shall be provi

    34、ded with each lot of microcircuits delivered to this drawing. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95618 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR

    35、97 TABLE I. Electrical performance characteristics. Test and MIL-STD-883 test method 1/ Symbol Test conditions 2/ -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified VCCGroup A subgroups Limits 3/ Unit Min Max High level output voltage 3006 VOHFor all inputs affecting output under test VIN= VIH

    36、= 2.0 V or VIL= 0.8 V For all other inputs VIN= VCCor GND IOH= -50 A 4.5 V 1, 2, 3 4.40 V 5.5 V 1, 2, 3 5.40 IOH= -24 mA 4.5 V 1 3.86 2, 3 3.70 5.5 V 1 4.86 2, 3 4.70 IOH= -50 mA 4/ 5.5 V 1, 2, 3 3.85 Low level output voltage 3007 VOLFor all inputs affecting output under test VIN= VIH= 2.0 V or VIL=

    37、 0.8 V For all other inputs VIN= VCCor GND IOL= 50 A 4.5 V 1, 2, 3 0.10 V 5.5 V 1, 2, 3 0.10 IOL= 24 mA 4.5 V 1 0.36 2, 3 0.50 5.5 V 1 0.36 2, 3 0.50 IOL= 50 mA 4/ 5.5 V 1, 2, 3 1.65 Positive input clamp voltage 3022 VIC+For input under test IIN= 18 mA 4.5 V 1, 2, 3 5.7 V Negative input clamp voltag

    38、e 3022 VIC-For input under test IIN= -18 mA 4.5 V 1, 2, 3 -1.2 V Input current high 3010 IIHFor input under test, VIN= 5.5 V For all other inputs, VIN= VCCor GND 5.5 V 1 0.1 A 2, 3 1.0 Input current low 3009 IILFor input under test, VIN= 0.0 V For all other inputs, VIN= VCCor GND 5.5 V 1 -0.1 A 2, 3

    39、 -1.0 Three-state output leakage current, high 3021 IOZH5/ OEm = 2.0 V For all other inputs, VIN= VCCor GND VOUT= 5.5 V 5.5 V 1 0.5 A 2, 3 10.0 Three-state output leakage current, low 3020 IOZL5/ OEm = 2.0 V For all other inputs, VIN= VCCor GND VOUT= 0.0 V 5.5 V 1 -0.5 A 2, 3 -10.0 Quiescent supply

    40、current, output high 3005 ICCHOEm = GND For all other inputs, VIN= VCCor GND 5.5 V 1 8.0 A 2, 3 160.0 Quiescent supply current, output low 3005 ICCL5.5 V 1 8.0 A 2, 3 160.0 Quiescent supply current, output three-state 3005 ICCZ5/ OEm = VCCFor all other inputs, VIN= VCCor GND 5.5 V 1 8.0 A 2, 3 160.0

    41、 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95618 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical perform

    42、ance characteristics - Continued. Test and MIL-STD-883 test method 1/ Symbol Test conditions 2/ -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified VCCGroup A subgroups Limits 3/ Unit Min Max Quiescent supply current delta, TTL input levels 3005 ICC6/ For input under test, VIN= VCC- 2.1 V For a

    43、ll other inputs, VIN= VCCor GND 5.5 V 1 1.0 mA 2, 3 1.6 Input capacitance 3012 CINTC= +25C See 4.4.1c GND 4 10.0 pF Output capacitance 3012 COUT5/ 5.5 V 4 15.0 pF Power dissipation capacitance CPD7/ 5.0 V 4 100.0 pF Low level ground bounce noise VOLP8/ VIH= 3.0 V VIL= 0.0 V TA= +25C See 4.4.1d See f

    44、igure 4 5.0 V 4 800 mV VOLV8/ 5.0 V 4 -800 mV High level VCC bounce noise VOHP8/ 5.0 V 4 VOH+800 mV VOHV8/ 5.0 V 4 VOH-1200 mV Functional tests 3014 9/ VIH= 2.0 V, VIL= 0.8 V Verify output VOSee 4.4.1b 4.5 V 7, 8 L H 5.5 V 7, 8 L H Propagation delay time, Dn to On 3003 tPLH110/ CL= 50 pF minimum RL=

    45、 500 See figure 5 4.5 V 9 3.0 9.0 ns 10, 11 3.0 10.5 tPHL110/ 4.5 V 9 3.0 8.5 10, 11 3.0 10.0 Propagation delay time, output enable, LEm to On 3003 tPLH210/ 4.5 V 9 3.0 9.5 ns 10, 11 3.0 11.0 tPHL210/ 4.5 V 9 3.0 8.5 10, 11 3.0 10.0 Propagation delay time, output enable, OEm to On 3003 tPZL10/ 4.5 V

    46、 9 2.5 9.5 ns 10, 11 2.5 11.0 tPZH10/ 4.5 V 9 2.5 8.5 10, 11 2.5 10.0 Propagation delay time, output disable, OEm to On 3003 tPLZ10/ 4.5 V 9 2.0 8.0 ns 10, 11 2.0 9.0 tPHZ10/ 4.5 V 9 2.0 8.0 10, 11 2.0 9.0 Setup time, high or low, Dn to LEm ts11/ 4.5 V 9, 10, 11 3.0 ns Hold time, high or low, Dn fro

    47、m LEm th11/ 4.5 V 9, 10, 11 1.5 ns Minimum latch enable, high pulse width tw11/ 4.5 V 9, 10, 11 4.0 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95618 DLA LAND AND MARITIM

    48、E COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test and MIL-STD-883 test method 1/ Symbol Test conditions 2/ -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified VCCGroup A subgroups Limits 3/ Unit Min Max Pin to pin skew, high to low, data to output tOSHL11/ 12/ CL= 50 pF minimum RL= 500 4.5 V 9, 10, 11 1.3 ns Pin to pin skew, low to high, data to output tOSLH11/ 12/ 4.5 V 9, 10, 11 2.1 ns Pin to pin skew, high to low or low to high, data to


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