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    DLA SMD-5962-93186 REV C-2013 MICROCIRCUIT DIGITAL ADVANCED BIPOLAR CMOS SCAN TEST DEVICE WITH OCTAL BUS TRANSCEIVER WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILIC.pdf

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    DLA SMD-5962-93186 REV C-2013 MICROCIRCUIT DIGITAL ADVANCED BIPOLAR CMOS SCAN TEST DEVICE WITH OCTAL BUS TRANSCEIVER WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILIC.pdf

    1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with the notice of revision (NOR) 5962-R123-94. jak 94-03-11 Monica L. Poelking B Update the boilerplate to current requirements as specified in MIL-PRF-38535. jak 07-05-30 Thomas M. Hess C Update the boilerplate paragraphs

    2、to current requirements as specified in MIL-PRF-38535. jwc 13-09-09 Thomas M. Hess REV SHEET REV C C C C C C C C C SHEET 15 16 17 18 19 20 21 22 23 REV STATUS REV C C C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Joseph A. Kerby DLA LAND AND MARITIME C

    3、OLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Thanh V. Nguyen THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, ADVANCED BIPOLAR CMOS, SCAN TEST DEVICE WITH OCTAL BUS TRANSCEIVER WITH THREE

    4、-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 94-01-24 AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 5962-93186 SHEET 1 OF 23 DSCC FORM 2233 APR 97 5962-E385-13 Provided by IHSNot for ResaleNo reproduction or networking p

    5、ermitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93186 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device cl

    6、asses Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in t

    7、he following example: 5962 - 93186 01 M L A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet t

    8、he MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The dev

    9、ice type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ABT8245 Scan test device with octal bus transceiver with three-state outputs, TTL compatible inputs 1.2.3 Device class designator. The device class designator is a single letter identifying the pro

    10、duct assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Ca

    11、se outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style L GDIP3-T24 or CDIP4-T24 24 Dual-in-line 3 CQCC1-N28 28 Square leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535

    12、for device classes Q, and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93186 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC

    13、 FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) . -0.5 V dc to +7.0 V dc DC input voltage range (I/O ports) (VIN) -0.5 V dc to +5.5 V dc 4/ DC input voltage range (except I/O ports) (VIN) -0.5 V dc to +7.0 V dc 4/ DC output voltage range (VOUT) -0.5 V dc to +5.5 V

    14、 dc 4/ DC output current (IOL) (per output) +96 mA DC input clamp current (IIK) (VIN= 0.0 V) . -18 mA DC output clamp current (IOK) (VOUT= 0.0 V) . -50 mA Storage temperature range (TSTG) -65C to +150C Lead temperature (soldering, 10 seconds) . +300C Thermal resistance, junction-to-case (JC) See MIL

    15、-STD-1835 Junction temperature (TJ) . +175C Maximum power dissipation (PD) . 420 mW 5/ 1.4 Recommended operating conditions. 2/ 3/ Supply voltage range (VCC) . +4.5 V dc to +5.5 V dc Input voltage range (VIN) . +0.0 V dc to VCC Output voltage range (VOUT) +0.0 V dc to VCCMaximum low level input volt

    16、age (VIL ) 0.8 V Minimum high level input voltage (VIH ) . 2.0 V Maximum high level output current (IOH) -24 mA Maximum low level output current (IOL) . +48 mA Maximum input rise or fall rate (t/V) 10 ns/V Minimum setup time (ts): An, Bn, DIR, or OE before TCK 7.0 ns TDI, or TMS before TCK . 6.0 ns

    17、Minimum hold time (th): An, Bn, DIR, or OE before TCK 0.0 ns TDI, or TMS before TCK . 0.0 ns Minimum pulse width, TCK high or low (tw) . 5.0 ns Minimum delay time, power-up to TCK (td) . 50.0 ns 6/ Minimum rise time, VCCpower-up (tr) 1.0 s 6/ Maximum TCK frequency (fCLK) 50 MHz Case operating temper

    18、ature range (TC) -55C to +125C 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise noted, all voltages are referenced to GND. 3/ The limits for the paramet

    19、ers specified herein shall apply over the full specified VCCrange and case temperature range of -55C to +125C. 4/ The input and output negative voltage ratings may be exceeded provided that the input and output clamp current ratings are observed. 5/ Power dissipation values are derived using the for

    20、mula PD= VCCICC+ nVOLIOL, where VCCand IOLare as specified in 1.4 herein, ICCand VOLare as specified in table I herein, and n represents the total number of outputs. 6/ These parameters are not production tested. Provided by IHSNot for ResaleNo reproduction or networking permitted without license fr

    21、om IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93186 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part

    22、of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARD

    23、S MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available onl

    24、ine at http:/quicksearch.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the iss

    25、ues of these documents are those cited in the solicitation or contract. INSTITUTE OF ELECTRICAL AND ELECTRONIC ENGINEERS (IEEE) IEEE Standard 1149.1 - IEEE Standard Test Access Port and Boundary Scan Architecture. (Copies of these documents are available online at http:/www.ieee.org or from the IEEE

    26、 Service Center, 445 Hoes Lane, P.O. Box 1331, Piscataway, NJ 088551331.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and

    27、 regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. Th

    28、e modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical d

    29、imensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connec

    30、tions. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Block diagram. The block diagram shall be as specified on figure 3. 3.2.5 Test access port controller and scan test registers. The test access port controlle

    31、r and scan test registers shall be as specified on figure 4. 3.2.6 Ground bounce waveforms and test circuit. The ground bounce waveforms and test circuit shall be as specified on figure 5. 3.2.7 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on f

    32、igure 6. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93186 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics and pos

    33、tirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirem

    34、ents shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is

    35、 not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shal

    36、l be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certific

    37、ate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order

    38、to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the re

    39、quirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be pro

    40、vided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DLA Land and Maritime-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this dr

    41、awing. 3.9 Verification and review for device class M. For device class M, DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onsh

    42、ore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 126 (see MIL-PRF-38535, appendix A). 3.11 IEEE 1149.1 compliance. The device shall be compliant with IEEE 1149.1. Provided by

    43、 IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93186 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test and MIL-STD-883

    44、test method 1/ Symbol Test conditions 2/ -55C TC +125C +4.5 V VCC +5.5 V unless otherwise specified VCCGroup A subgroups Limits 3/ Unit Min Max High level output voltage 3006 VOHFor all inputs affecting output under test, VIH= 2.0 V or VIL=0.8 V IOH= -3 mA 4.5 V 1, 2, 3 2.5 V 5.0 V 1, 2, 3 3.0 V For

    45、 all inputs affecting output under test, VIH= 2.0 V or VIL=0.8 V IOH= -24 mA 4.5 V 1, 2, 3 2.0 V Low level output voltage 3007 VOLFor all inputs affecting output under test, VIH= 2.0 V or VIL=0.8 V IOL= 48 mA 4.5 V 1, 2, 3 0.55 V Negative input clamp voltage 3022 VIC-For input under test, IIN= -18 m

    46、A 4.5 V 1, 2, 3 -1.2 V Input current high 3010 IIH4/ For input under test, VIN= 5.5 V DIR, OE TCK 4.5 V 1, 2, 3 +1.0 A A or B ports 4.5 V 1, 2, 3 +100 TDI, TMS 4.5 V 1, 2, 3 10.0 Input current low 3009 IIL4/ For input under test, VIN= 0.0 V DIR, OE TCK 4.5 V 1, 2, 3 -1.0 A A or B ports 4.5 V 1, 2, 3

    47、 -100 TDI, TMS 4.5 V 1, 2, 3 -160 Three-state output leakage current high 3021 IOZH5/ For control inputs affecting output under test, VIN= 2.0 V VOUT= 2.7 V 5.5 V 1, 2, 3 50.0 A Three-state output leakage current low 3020 IOZL5/ For control inputs affecting output under test, VIN2.0 V VOUT= 0.5 V 5.

    48、5 V 1, 2, 3 -50.0 A Off-state leakage current IOFFFor input or output under test, VINor VOUT= 5.5 V All other pins at 0.0 V 0.0 V 1 100 A High-state leakage current ICEXFor output under test, VOUT= 5.5 V Outputs at high logic state 5.5 V 1, 2, 3 50 A Output current 3011 IO6/ VOUT= 2.5 V 5.5 V 1, 2, 3 -50 -180 mA See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93186 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DS


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