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    DLA SMD-5962-92156 REV K-2012 MICROCIRCUIT MEMORY DIGITAL CMOS FIELD PROGRAMMABLE GATE ARRAY 8000 GATES MONOLITHIC SILICON.pdf

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    DLA SMD-5962-92156 REV K-2012 MICROCIRCUIT MEMORY DIGITAL CMOS FIELD PROGRAMMABLE GATE ARRAY 8000 GATES MONOLITHIC SILICON.pdf

    1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Added changes in accordance with NOR 5962-R116-94. 94-03-03 M. A. Frye B Added 03 device, removed CAGE number 01295, and made editorial changes throughout. 96-07-09 M. A. Frye C Added changes in accordance with NOR 5962-R059-97. 96-11-12 Raymond

    2、Monnin D Added changes in accordance with NOR 5962-R193-97. 97-03-03 Raymond Monnin E Corrected radiation circuit. Updated boilerplate. ksr 98-03-31 Raymond Monnin F Add 04 and 05 devices, change case outlines from CQCC2-F172 to figure 4. Page 3, section 1.3 changed TJfrom 175C to 150C. Added append

    3、ix A for die. Added CQFP package option case U, and binning circuitry delay for 04 and 05 in Table IA. ksr 98-09-18 Raymond Monnin G Change the generic number for the 01 and 02 devices as well as the bin speed. Update the binning circuit delay on table IA. Update the bin speed for the 01 device in s

    4、ection 10.2.2. ksr 98-11-15 Raymond Monnin H Replaced figure 1, case outline Y with new graphic art work. ksr 00-04-28 Raymond Monnin J Boilerplate update, part of 5 year review. ksr 07-05-28 Robert M. Heber K Add device types 06 and 07. Add CAGE Code 1RU44. Updated boilerplate. lhl 12-04-10 Charles

    5、 F. Saffle REV SHEET REV K K K K K K K K K K K K K K K K K K K SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 REV STATUS REV K K K K K K K K K K K K K K OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Rajesh Pithadia DLA LAND AND MARITIME COLUMBUS, OHIO 43218-39

    6、90 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Jeff Bowling THIS DRAWING IS AVAILABLE FOR USE BY ALL APPROVED BY Michael A. Frye MICROCIRCUIT, MEMORY, DIGITAL, CMOS, FIELD PROGRAMMABLE GATE ARRAY, 8000 GATES, MONOLITHIC SILICON DEPARTMENTS AND AGENCIES OF THE DEPARTMEN

    7、T OF DEFENSE DRAWING APPROVAL DATE 93-04-07 AMSC N/A REVISION LEVEL K SIZE A CAGE CODE 67268 5962-92156 SHEET 1 OF 33 DSCC FORM 2233 APR 97 5962-E071-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92156 D

    8、LA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and le

    9、ad finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 92156 01 Q Y C Federal RHA Device Device Case Lead stock c

    10、lass designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designato

    11、r. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circui

    12、t function Bin speed 01 1280A 8000 gate field programmable gate array 200 ns 02 1280A-1 8000 gate field programmable gate array 170 ns 03 RH1280 8000 gate field programmable gate array (radiation hardened) 160 ns 04 1280XL 8000 gate field programmable gate array 120 ns 05 1280XL-1 8000 gate field pr

    13、ogrammable gate array 102 ns 06 RH1280B 8000 gate field programmable gate array (radiation hardened) 160 ns 07 RH1280B 8000 gate field programmable gate array (radiation hardened) 160 ns 1/ 1.2.3 Device class designator. The device class designator is a single letter identifying the product assuranc

    14、e level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s)

    15、. The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X CMGA7 - P176 176 Pin grid array Y See figure 1 172 Quad flat pack Z CMGA7 - P176 177 Pin grid array with orientation pin U See figure 1 172 Quad flat pack 1.2.5 Lea

    16、d finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. _ 1/ Additional screening for device type 07 to be performed according to 4.2.2d. Provided by IHSNot for ResaleNo reproduction or networking permitted without licens

    17、e from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92156 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 2/ DC supply voltage range (VCC) . -0.5 V dc to +7.0 V dc Input voltage range (VI) -0.5 V dc to VCC+ 0.5 V dc Ou

    18、tput voltage range (VO) -0.5 V dc to VCC+ 0.5 V dc Input clamp current (IIC) 20 mA Output clamp current (IOC) 20 mA Continuous output current (IO) 25 mA Storage temperature range (TSTG) -65C to +150C Lead temperature (soldering, 10 seconds) . 300C Thermal resistance, junction-to-case (JC) : Case X a

    19、nd Z See MIL-STD-1835 Case Y and U . 10C/W 3/ Maximum junction temperature (TJ) +150C 1.4 Recommended operating conditions. Supply voltage (VCC) . +4.5 V dc to +5.5 V dc Case operating temperature range (TC) -55C to +125C 1.5 Digital logic testing for device classes Q and V. Fault coverage measureme

    20、nt of manufacturing logic tests (MIL-STD-883, test method 5012) . 100 percent 4/ 1.6 Radiation features Maximum total dose available (dose rate = 50 - 300 rad(Si)/s) For device type 03 300 krads(Si) 5/ Maximum total dose available (dose rate 20 microns in silicon. e. The upset test temperature shall

    21、 be +25C. The latchup test temperature shall be at the maximum rated operating temperature 10C. f. Bias conditions shall be defined by the manufacturer for latchup measurements. g. For SEP test limits, see table IB herein. h. Supply current and voltage(s) as well as SEU, SEL and faults are monitored

    22、 and recorded in-situ. . 4.5 Delta measurements for device class V. Delta measurements, as specified in table IIA, shall be made and recorded before and after the required burn-in screens and steady-state life tests to determine delta compliance. The electrical parameters to be measured, with associ

    23、ated delta limits are listed in table IIB. The device manufacturer may, at his option, either perform delta measurements or within 24 hours after burn-in perform final electrical parameter tests, subgroups 1, 7, and 9. 4.6 Programming procedures. The programming procedures shall be as specified by t

    24、he device manufacturer and shall be made available upon request. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92156 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 19 DSCC FORM 2234

    25、APR 97 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government

    26、 microcircuit applications (original equipment), design applications, and logistics purposes. 6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor prepared specification or drawing. 6.1.2 Substitutability. Device class Q devices wil

    27、l replace device class M devices. 6.2 Configuration control of SMDs. All proposed changes to existing SMDs will be coordinated with the users of record for the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal. 6.3 Record of users. Military

    28、and industrial users should inform DLA Land and Maritime when a system application requires configuration control and which SMDs are applicable to that system. DLA Land and Maritime will maintain a record of users and this list will be used for coordination and distribution of changes to the drawing

    29、s. Users of drawings covering microelectronic devices (FSC 5962) should contact DLA Land and Maritime-VA, telephone (614) 692-0544. 6.4 Comments. Comments on this drawing should be directed to DLA Land and Maritime-VA, Columbus, Ohio 43218-3990, or telephone (614) 692-0547. 6.5 Abbreviations, symbol

    30、s, and definitions. The abbreviations, symbols, and definitions used herein are defined in MIL-PRF-38535 and MIL-HDBK-1331. 6.5.1 Timing limits. The table of timing values shows either a minimum or a maximum limit for each parameter. Input requirements are specified from the external system point of

    31、 view. Thus, address setup time is shown as a minimum since the system must supply at least that much time (even though most devices do not require it). On the other hand, responses from the memory are specified from the device point of view. Thus, the access time is shown as a maximum since the dev

    32、ice never provides data later than that time. 6.5.2 Waveforms. Waveform symbol Input Output MUST BE VALID WILL BE VALID CHANGE FROM H TO L WILL CHANGE FROM H TO L CHANGE FROM L TO H WILL CHANGE FROM L TO H DONT CARE ANY CHANGE PERMITTED CHANGING STATE UNKNOWN HIGH IMPEDANCE Provided by IHSNot for Re

    33、saleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92156 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 20 DSCC FORM 2234 APR 97 6.6 Sources of supply. 6.6.1 Sources of supply for device classes Q and V. Sources

    34、of supply for device classes Q and V are listed in QML-38535. The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DLA Land and Maritime-VA and have agreed to this drawing. 6.6.2 Approved sources of supply for device class M. Approved sources of supply for c

    35、lass M are listed in MIL-HDBK-103. The vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and accepted by DLA Land and Maritime-VA. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from

    36、 IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92156 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 21 DSCC FORM 2234 APR 97 APPENDIX A APPENDIX A FORMS A PART OF SMD 5962-92156 A.1 Scope A.1.1 Scope. This appendix establishes minimum requirements for microcircuit die to

    37、be supplied under the Qualified Manufacturers List (QML) Program. QML microcircuit die meeting the requirements of MIL-PRF-38535 and the manufacturers approved QML plan for use in monolithic microcircuits, multichip modules (MCMs), hybrids, electronic modules, or devices using chip and wire designs

    38、in accordance with MIL-PRF-38534 are specified herein. Two product assurance classes consisting of military high reliability (device class Q) and space application (device Class V) are reflected in the Part or Identification Number (PIN). When available a choice of Radiation Hardiness Assurance (RHA

    39、) levels are reflected in the PIN. A.1.2 PIN. The PIN is as shown in the following example: 5962 F 92156 01 Q 9 X Federal stock class designator RHA designator (see A.1.2.1) Device type (see A.1.2.2) Device class designator Die code Die details (see A.1.2.4) / (see A.1.2.3) / Drawing number A.1.2.1

    40、RHA designator. Device classes Q and V RHA identified die meet the MIL-PRF-38535 specified RHA levels. A dash (-) indicates a non-RHA die. A.1.2.2 Device type(s). The device type(s) shall identify the circuit function as follows: Device type Generic number Circuit function Bin speed 01 1280A 8000 ga

    41、te, field programmable gate array 200 ns 03 RH1280 8000 gate, field programmable gate array 160 ns 04 1280XL 8000 gate, field programmable gate array 120 ns A.1.2.3 Device class designator. Device class Device requirements documentation Q or V Certification and qualification to the die requirements

    42、of MIL-PRF-38535 A.1.2.4 Die code. The die code designator shall be a number 9 for all devices supplied as die only with no case outline. A.1.2.5 Die details. The die details designation shall be a unique letter which designates the dies physical dimensions, bonding pad location(s) and related elect

    43、rical function(s), interface materials, and other assembly related information, for each product and variant supplied to this appendix. A.1.2.5.1 Die physical dimensions. Device type Die size Die thickness Die Detail Figure Number 01 421mils X 437mils 151 mils A A-1 01 421mils X 437mils 161 mils B A

    44、-2 03 365 mils X 385 mils 251 mils C A-3 04 286 mils X 299 mils 191 mils D A-4 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92156 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 22 D

    45、SCC FORM 2234 APR 97 APPENDIX A APPENDIX A FORMS A PART OF SMD 5962-92156 A.1.2.5.2 Die bonding pad locations and electrical functions. Device type Die Detail Figure Number 01 A A-1 01 B A-2 03 C A-3 04 D A-4 A.1.2.5.3 Interface materials. Device type Top metalization Backside metalization Die Detai

    46、l Figure Number 01 Ti-cap+Al/Cu/Si,9-12k None (backgrind) A A-1 01 TiW+Al/Cu,9-12k None (backgrind) B A-2 03 Ti-cap+Al/Cu/Si,9-12k None (backgrind) C A-3 04 Ti-cap+Al/Cu/Si,9-12k None (backgrind) D A-4 A.1.2.5.4 Assembly related information. Device type Glassivation Die Detail Figure Number 01 Ox/Ni

    47、tride A A-1 01 Ox/Nitride B A-2 03 Ox/Nitride C A-3 04 Ox/Nitride D A-4 A.1.2.5.5 Wafer fabrication source. Device type Source Die Detail Figure Number 01 Matsushita Electronics Corp. Japan A A-1 01 Texas Instrument, Texas B A-2 03 BAE Systems, Manassas, VA C A-3 04 Chartered Semiconductor, Singapore D A-4 A.1.3 Absolute maximum ratings. See paragraph 1.3 within the body of this drawing for details. A.1.4 Recommended operating conditions. See paragraph 1.4 within the body of this drawing for details. A.2 APPLICABLE DOCUMENTS. A.2.1 Government specification, standards, and handbooks. The follo


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