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    DLA SMD-5962-90772 REV D-2011 MICROCIRCUIT DIGITAL ADVANCED CMOS TRIPLE THREE-INPUT POSITIVE-AND GATE TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

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    DLA SMD-5962-90772 REV D-2011 MICROCIRCUIT DIGITAL ADVANCED CMOS TRIPLE THREE-INPUT POSITIVE-AND GATE TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

    1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Make corrections to waveforms. Update boilerplate. - CFS 00-05-24 Monica L. Poelking B Make change to footnote 9/ in table I. Add vendor CAGE F8859. Add case outline X. Add device type 02. Add table III, delta limits. Update drawing to MIL-PRF-38

    2、535 requirements. jak 03-02-19 Thomas M. Hess C Add section 1.5, radiation features. Update the boilerplate to include radiation hardness assured requirements. Editorial changes throughout. jak 04-05-06 Thomas M. Hess D Update boilerplate paragraphs to the current MIL-PRF-38535 requirements. - LTG 1

    3、1-11-17 Thomas M. Hess REV SHET REV SHET REV STATUS REV D D D D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Joseph A. Kerby DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AV

    4、AILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY Thanh V. Nguyen APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, ADVANCED CMOS, TRIPLE THREE-INPUT POSITIVE-AND GATE, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON DRAWING APPROVAL DATE 96-02-28 REVISIO

    5、N LEVEL D SIZE A CAGE CODE 67268 5962-90772 SHEET 1 OF 14 DSCC FORM 2233 APR 97 5962-E006-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90772 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVE

    6、L D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or I

    7、dentifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 F 90772 01 Q C A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designato

    8、rCase outline (see 1.2.4) Leadfinish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, ap

    9、pendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ACT11 Triple three-input positive-AND gate, TTL

    10、 compatible inputs 02 54ACT11 Triple three-input positive-AND gate, TTL compatible inputs 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to th

    11、e requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive d

    12、esignator Terminals Package style C GDIP1-T14 or CDIP2-T14 14 Dual-in-line D GDFP1-F14 or CDFP2-F14 14 Flat pack X CDFP3-F14 14 Flat pack 2 CQCC1-N20 20 Square leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appen

    13、dix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90772 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/

    14、2/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC+ 0.5 V dc 3/ DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc 3/ DC input clamp current (IIK) (VINVCC) . 20 mA DC output clamp current (IOK) (VOUTVCC) 20 mA Continuous output current (IO) (V

    15、OUT= 0.0 V to VCC) . 50 mA Continuous current through VCCor GND . 200 mA Maximum power dissipation (PD) . 500 mW Storage temperature range (TSTG) . -65C to +150C Lead temperature (soldering, 10 seconds): Case outline X . +260C All other case outlines except case X +300C Thermal resistance, junction-

    16、to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. 2/ 4/ 5/ Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Minimum high level input voltage (VIH) . +2.0 V Maximum low level input voltage (VIL) +0.8 V Input voltage range (VIN) +0.0 V dc to VCCOutp

    17、ut voltage range (VOUT) . +0.0 V dc to VCCMaximum high level output current (IOH) -24.0 mA Maximum low level output current (IOL) +24.0 mA Input transition rise or fall rate (t/V) 0 to 8 ns/V Case operating temperature range (TC) -55C to +125C 1.5 Radiation features. Device type 02: Maximum total do

    18、se available (dose rate = 50 300 rads (Si)/s) 300 krads (Si) Single Event Latchup (SEL) occurs at LET (see 4.4.4.2) . 93 MeV-cm2/mg 6/ Single Event Upset (SEU) occurs at LET (see 4.4.4.2) 93 MeV-cm2/mg 6/ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extende

    19、d operation at the maximum levels may degrade performance and affect reliability. The maximum junction temperature may be exceeded for allowable short duration burn-in screening conditions in accordance with 5004 of MIL-STD-883. 2/ Unless otherwise noted, all voltages are referenced to GND. 3/ The i

    20、nput and output negative voltage ratings may be exceeded provided that the input and output clamp current ratings are observed. 4/ Unless otherwise specified, the limits for parameters listed herein shall apply over the full VCCand TCrecommended operating range. 5/ Unused or floating inputs should b

    21、e held high or low. 6/ Limits obtained during technology characterization/qualification, guaranteed by design or process, but not production tested unless specified by the customer through the purchase order or contract. Provided by IHSNot for ResaleNo reproduction or networking permitted without li

    22、cense from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90772 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form

    23、 a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE

    24、STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are avail

    25、able online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherw

    26、ise specified, the issues of these documents cited in the solicitation or contract. JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JEDEC Standard No. 20 - Standard for Description of 54/74ACXXXXX and 54/74ACTXXXXX Advanced High-Speed CMOS Devices. (Copies of these documents are available online at

    27、 http:/www.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10thStreet, Suite 240-S Arlington, VA 22201). 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in

    28、this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 as specified herein, or as modified in the de

    29、vice manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specifi

    30、ed herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in

    31、accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. Provided by IHSNot for ResaleNo reprod

    32、uction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90772 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 5 DSCC FORM 2234 APR 97 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as

    33、specified on figure 4. 3.2.6 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing and acquiring activity upon request. 3.3 Electrical performance characteristics and posti

    34、rradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table IA and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requireme

    35、nts shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table IA. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number i

    36、s not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M sha

    37、ll be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certifi

    38、cate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order

    39、 to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the r

    40、equirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be pr

    41、ovided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DLA Land and Maritime -VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this

    42、drawing. 3.9 Verification and review for device class M. For device class M, DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available on

    43、shore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 36 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license fr

    44、om IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90772 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 6 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics. Test and MIL-STD-883 test method 1/ Symbol Test conditions 2/ 3/ -55C TC +125C +4.5 V VCC +5.5 V

    45、 unless otherwise specified Device type and 4/ device class VCCGroup A subgroups Limits 5/ Unit Min Max Positive input clamp voltage 3022 VIC+For input under test, IIN= 1.0 mA All V 0.0 V 1 0.4 1.5 V Negative input clamp voltage 3022 VIC-For input under test, IIN= -1.0 mA All V Open 1 -0.4 -1.5 V Hi

    46、gh level output voltage 3006 VOH1For all inputs affecting output under test VIH= 2.0 V or 0.8 V For all other inputs VIN= VCCor GND IOH= -50 A All All 4.5 V 1, 2, 3 4.4 V 5.5 V 1, 2, 3 5.4 VOH2IOH= -24 mA 4.5 V 1 3.86 2, 3 3.7 5.5 V 1 4.86 2, 3 4.7 VOH3 6/ IOH= -50 mA 5.5 V 1, 2, 3 3.85 Low level ou

    47、tput voltage 3007 VOL1For all inputs affecting output under test VIH= 2.0 V or 0.8 V For all other inputs VIN= VCCor GND IOL= 50 A All All 4.5 V 1, 2, 3 0.1 V 5.5 V 1, 2, 3 0.1 VOL2IOL= 24 mA 4.5 V 1 0.36 2, 3 0.5 5.5 V 1 0.36 2, 3 0.5 VOL3 6/ IOL= 50 mA 5.5 V 1, 2, 3 1.65 Input current high 3010 II

    48、HFor input under test, VIN= VCCFor all other inputs, VIN= VCCor GND All All 5.5 V 1 +0.1 A 2, 3 +1.0 Input current low 3009 IILFor input under test, VIN= GND For all other inputs, VIN= VCCor GND All All 5.5 V 1 -0.1 A 2, 3 -1.0 Quiescent supply current 3005 ICCFor all inputs, VIN= VCCor GND IOUT= 0.

    49、0 A All All 5.5 V 1 2.0 A 2, 3 40.0 M, D, P, L, R, F 7/ 02 Q, V 1 50 Quiescent supply current delta, TTL input levels 3005 ICC8/ For input under test, VIN= 3.4 V For all other inputs, VIN= VCCor GND All All 5.5 V 1, 2, 3 1.6 mA Input capacitance 3012 CINTC= +25C, VIN= VCCor GND See 4.4.1c All All 5.0 V 4 6.5 pF Pow


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