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    DLA SMD-5962-89466 REV A-2010 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED SCHOTTKY TTL OCTAL BUS TRANSCEIVER WITH THREE-STATE OUTPUT MONOLITHIC SILICON.pdf

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    DLA SMD-5962-89466 REV A-2010 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED SCHOTTKY TTL OCTAL BUS TRANSCEIVER WITH THREE-STATE OUTPUT MONOLITHIC SILICON.pdf

    1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update drawing to current requirements. Editorial changes throughout. - gap 10-02-04 Charles F. Saffle The original first sheet of this drawing has been replaced. REV SHET REV SHET REV STATUS REV A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6

    2、7 8 9 10 11 PMIC N/A PREPARED BY Larry T.Gauder DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY Tim H. Noh APPROVED BY William K. He

    3、ckman MICROCIRCUIT, DIGITAL, BIPOLAR, ADVANCED SCHOTTKY TTL, OCTAL BUS TRANSCEIVER WITH THREE-STATE OUTPUT, MONOLITHIC SILICON DRAWING APPROVAL DATE 91-02-26 AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-89466 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E485-09 Provided by IHSNot for ResaleNo r

    4、eproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89466 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 comp

    5、liant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-89466 01 R X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device ty

    6、pe(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54F620 Octal bus transceiver with three-state inverting outputs 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive d

    7、esignator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line package S GDFP2-F20 or CDFP3-F20 20 Flat package 2 CQCC1-N20 20 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ Supply voltage ran

    8、ge (VCC) -0.5 V dc to +7.0 V dc DC input voltage -1.2 V dc at -18 mA to +7.0 V dc Voltage applied to a disabled three-state output -0.5 V dc to +5.5 V dc Voltage applied to any output in the high state -0.5 V dc to VCCInput current range -30 mA to +5.0 mA Current into any output in the low state: (A

    9、ny A) 40 mA (Any B) 96 mA Storage temperature range -65C to +150C Maximum power dissipation (PD) 2/ . 605 mW Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) See MIL-M-38510, appendix C Junction temperature (TJ) +175C _ 1/ Stresses above the absolute maximum r

    10、ating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Maximum power dissipation is defined as VCCx ICC, and must withstand the added PDdue to short-circuit output test, e.g., IOS. Provided by IHSNot for ResaleNo re

    11、production or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89466 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc to +5.5 V

    12、 dc Minimum high level input voltage (VIH) 2.0 V dc Maximum low level input voltage (VIL) . 0.8 V dc Maximum input clamp current (IIC) . -18 mA Case operating temperature range (TC) . -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specific

    13、ation, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Speci

    14、fication for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings.

    15、(Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the refe

    16、rences cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-385

    17、35, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed

    18、as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, f

    19、it, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, a

    20、nd physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be a

    21、s specified on figure 2. 3.2.4 Test circuit and switching waveforms. The test circuit and switching waveforms shall be as specified on figure 3. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89466 DEFENSE S

    22、UPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperatur

    23、e range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN

    24、 listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance

    25、indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A

    26、 certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product mee

    27、ts the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of

    28、change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshor

    29、e at the option of the reviewer. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to qual

    30、ity conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring

    31、activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II he

    32、rein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89466 DEFENSE SUPPLY CENTER COLUMBUS COLUMB

    33、US, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C unless otherwise specified Group A subgroups Limits Unit Min Max High level output voltage (any A) VOHVCC= 4.5 V, VIH= 2.0 V, VIL= 0.8 V IOH= -1 mA

    34、 1, 2, 3 2.5 V IOH= -3 mA 2.4 High level output voltage (any B) OH= -3 mA 2.4 IOH= -12 mA 2.0 Low level output voltage (any A) VOLVCC= 4.5 V, VIH= 2.0 V, VIL= 0.8 V IOL= 20 mA 1, 2, 3 0.5 V Low level output voltage (any B) IOL= 48 mA 0.55 Input clamp voltage VICVCC= 4.5 V, IIN= -18 mA 1, 2, 3 -1.2 V

    35、 High level input current IIH1VCC= 5.5 V VIN= 5.5 V 1, 2, 3 1.0 mA A and B IN= 7.0 V 0.1 GAB and G%BA IIH2VCC= 5.5 V VIN= 2.7 V 70 A A and B 1/ IN= 2.7 V 20 GAB and G%BA Low level input 1/ current (A and B) IILVCC= 5.5 V, VIN= 0.5 V 1, 2, 3 -70 A Low level input current (GAB and G%BA) -0.60 mA Outpu

    36、t current IOSVCC= 5.5 V, 1, 2, 3 -60 -150 mA (any A) VOUT= 0.0 V Output current 2/ -100 -225(any B) Supply current ICCHVCC= 5.5 V G%BA = GAB = 4.5 V 1, 2, 3 92 mA A1-A8 = GND ICCLG%BA = GAB = 4.5 V 110A1-A8 = 4.5 V CCZGAB = GND 92 G%BA = A1-A8 = 4.5 V Functional tests See 4.3.1c, VCC= 4.5 V, 5.5 V 7

    37、, 8 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89466 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electr

    38、ical performance characteristics - Continued. Test Symbol Conditions -55C TC +125C unless otherwise specified Group A subgroups Limits Unit Min Max Propagation delay time, A to B tPLH1CL= 50 pF VCC= 5.0 V 9 1.7 6.5 ns R1= R2= 500 VCC= 4.5 and 5.5 V 10, 11 1.2 8.5 tPHL1VCC= 5.0 V 9 1.0 4.5 See figure

    39、 3 VCC= 4.5 and 5.5 V 10, 11 1.0 5.5 Propagation delay time, B to A tPLH2VCC= 5.0 V 9 1.7 6.5 ns VCC= 4.5 and 5.5 V 10, 11 1.2 8.5 tPHL2VCC= 5.0 V 9 1.0 4.5 VCC= 4.5 and 5.5 V 10, 11 1.0 5.5 Output enable time, G%BA to A tPZH1VCC= 5.0 V 9 2.2 10.5 ns VCC= 4.5 and 5.5 V 10, 11 1.7 12.5 tPZL1VCC= 5.0

    40、V 9 3.2 10.5 VCC= 4.5 and 5.5 V 10, 11 2.7 12.5 Output disable time, G%BA to A tPHZ1VCC= 5.0 V 9 1.7 7.5 ns VCC= 4.5 and 5.5 V 10, 11 1.2 9.0 tPLZ1VCC= 5.0 V 9 1.2 7.0 VCC= 4.5 and 5.5 V 10, 11 1.0 8.5 Output enable time, tPZH2VCC= 5.0 V 9 3.7 10.5 ns GAB to B VCC= 4.5 and 5.5 V 10, 11 2.5 12.5 tPZL

    41、2VCC= 5.0 V 9 3.7 10.0 CC= 4.5 and 5.5 V 10, 11 3.2 12.0 Output disable time, tPHZ2VCC= 5.0 V 9 2.2 9.5 ns GAB to B VCC= 4.5 and 5.5 V 10, 11 1.7 12.0 tPLZ2VCC= 5.0 V 9 3.2 9.5 CC= 4.5 and 5.5 V 10, 11 2.7 11.5 1/ For I/O ports, the parameters IIH2and IILinclude the off-state output current (IOZHand

    42、 IOZL). 2/ Not more than one output will be tested at one time and duration of the test condition shall not exceed one second. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89466 DEFENSE SUPPLY CENTER COLUM

    43、BUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 Case outlines R, S, and 2 Terminal number Terminal connections 1 GAB 2 A1 3 A2 4 A3 5 A4 6 A5 7 A6 8 A7 9 A8 10 GND 11 B8 12 B7 13 B6 14 B5 15 B4 16 B3 17 B2 18 B1 19 G%BA 20 VCCFIGURE 1. Terminal connections. Enable inputs

    44、 Operation G%BA GAB L L Bdata to A bus H H Adata to B bus H L Isolation L H B data to A bus, Adata to B bus H = High voltage level. L = Low voltage level. FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DR

    45、AWING SIZE A 5962-89466 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 8 DSCC FORM 2234 APR 97 FIGURE 3. Test circuit and switching waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAW

    46、ING SIZE A 5962-89466 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 9 DSCC FORM 2234 APR 97 NOTES: 1. CLincludes probe and jig capacitance. 2. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control

    47、. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. 3. All input pulses have the following characteristics: PRR = 1 MHz, tr= tf= 2.5 ns, duty cycle = 50 percent. 4. When measuring propagation delay times of three-state outpu

    48、ts, switch S1 is open. 5. The outputs are measured one at a time with one input transition per measurement. FIGURE 3. Test circuit and switching waveforms - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89466 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 10 DSCC FORM 2234 APR 97 TABLE II. Electrical test requirements. MIL-STD-883 tes


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