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    DLA SMD-5962-89462 REV B-2005 MICROCIRCUIT DIGITAL HIGH SPEED CMOS 16-BIT AND 8 16-BIT MICROPROCESSOR MONOLITHIC SILICON《硅单片16位和8 16位微处理器高速互补型金属氧化物半导体数字微电路》.pdf

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    DLA SMD-5962-89462 REV B-2005 MICROCIRCUIT DIGITAL HIGH SPEED CMOS 16-BIT AND 8 16-BIT MICROPROCESSOR MONOLITHIC SILICON《硅单片16位和8 16位微处理器高速互补型金属氧化物半导体数字微电路》.pdf

    1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R016-94. 93-11-19 Monica L. Poelking B Update title to accurately describe device function. Update boilerplate to MIL-PRF-38535 requirements. - CFS 05-10-17 Thomas M. Hess REV SHET REV B B B B B B B B B B B B B

    2、 B B B B B B B SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Wanda L. Meadows DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Thomas M. Hess CO

    3、LUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, HIGH SPEED CMOS, 16-BIT AND 8/16-BIT MICROPROCESSOR AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 92-12-01 MONOLITHIC SILICON AM

    4、SC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-89462 SHEET 1 OF 34 DSCC FORM 2233 APR 97 5962-E504-05 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89462 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 4

    5、3218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are ref

    6、lected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 89462 01 M U X Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2

    7、)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices me

    8、et the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function Speed 01 68HC000-8 16-bit fi

    9、xed instruction microprocessor 8 MHz 02 68HC000-10 16-bit fixed instruction microprocessor 10 MHz 03 68HC000-12 16-bit fixed instruction microprocessor 12.5 MHz 04 68HC001-8 8/16-bit fixed instruction microprocessor 8 MHz 05 68HC001-10 8/16-bit fixed instruction microprocessor 10 MHz 06 68HC001-12 8

    10、/16-bit fixed instruction microprocessor 12.5 MHz 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant

    11、, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style U CMGA

    12、2-P68 68 Pin grid array X CQCC1-N68 68 Square leadless chip carrier Y CDIP1-T64 64 Dual-in-line Z See figure 1. 68 Leaded chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot fo

    13、r ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89462 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) . -0.3 V dc

    14、 to +6.5 V dc Case operating temperature range (TC) -55C to +125C Storage temperature range (Tstg) -65C to +150C Maximum power dissipation (PD). 0.28 W Junction temperature (TJ) +150C Thermal resistance, junction-to-case (JC): Case Z . 10C/W Cases U, X, and Y . See MIL-STD-1835 1.4 Recommended opera

    15、ting conditions. Supply voltage range (VCC) . 4.5 V dc to 5.5 V dc High level input voltage range (logic inputs) (VIH) 2.0 V dc to VCCLow level input voltage range (logic inputs) (VIL). GND -0.3 V dc to 0.8 V dc Minimum high level output voltage (VOH). VCC 0.75 V dc Maximum low level output voltage

    16、(VOL) 0.55 V dc Frequency of operation: Device types 01 and 04. 4.0 to 8.0 MHz Device types 02 and 05. 4.0 to 10.0 MHz Device types 03 and 06. 4.0 to 12.5 MHz Case operating temperature range (TC) -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The follo

    17、wing specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing,

    18、General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircu

    19、it Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict betw

    20、een the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. _ 1/ Stresses above the absolute maximum rating may cause permanent da

    21、mage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89462 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO

    22、 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The

    23、 modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical di

    24、mensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Ter

    25、minal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Block diagram. The block diagram shall be as specified on figure 3. 3.2.4 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. 3.3 Electrical performance

    26、characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The e

    27、lectrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the e

    28、ntire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking

    29、for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, a

    30、ppendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a

    31、 manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V,

    32、the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall

    33、be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9

    34、Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Micro

    35、circuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 105 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE

    36、A 5962-89462 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified Group A subgroupsDevice type Limits Unit Min Max Input

    37、 high voltage VIH2.0 VCCV Input low voltage VILAll inputs GND 0.3 0.8 V Output high voltage, A1-A23, AS, BG, D0-15, E, FC0-FC2, LDS, R/W, UDS, VMA VOHVCC= 4.5 V VIN= 0.8 V, 2.0 V IOH= -400 A VCC 0.75 V Output low voltage, HALT IOL= 1.6 mA 0.55 Output low voltage, A1-A23, BG, FC0-FC2 IOL= 3.2 mA 0.55

    38、 Output low voltage, RESET IOL= 5.0 mA 0.55 Output low voltage, E, AS, D0-D15, LDS, R/W, UDS, VMA VOLVCC= 4.5 V VIN= 0.8 V, 2.0 V IOL= 5.3 mA 0.55 V Three-state (off-state) input current, AS, A1-A23, D0-D15, FC0-FC2, LDS, R/W, UDS, VMA ITSIVIN= 0.5 V, 2.4 V 20 A Input leakage current, BERR, BGACK, B

    39、R, DTACK, CLK, IPL0-IPL2 VPA 2.5 Input leakage current, HALT, RESET IINVIN= 5.5 V 20 A f = 6 MHz 40 f = 8 MHz All 42 f = 10 MHz 02, 03 05, 06 45 Current dissipation IDVCC= 5.5 V 1/ f = 12.5 MHz 1, 2, 3 05, 06 50 mA Input capacitance CINVIN= 0 V, frequency = 1 MHz, TC= +25C, See 4.4.1c 4 All 20 pF Fu

    40、nctional tests See 4.4.1b 7, 8 All See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89462 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC F

    41、ORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Group A sub- groups Device type 01, 04 8 MHZ Device type 02, 05 10 MHZ Device type 03, 06 12.5 MHZ Unit Conditions -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified Wave-form number (see figure 4)Min Max

    42、Min Max Min Max Frequency of operation f 4.0 8.0 4.0 10.0 4.0 12.5 MHz Cycle time tcyc1 125 250 100 250 80 250 ns tCL2 55 125 45 125 35 125 ns Clock pulse width (measured from 1.5 V to 1.5 V for 12 MHz) tCH3 55 125 45 125 35 125 ns Clock fall time tcf4 10 10 5 ns Clock rise time tcr5 10 10 5 ns Cloc

    43、k low to address valid tCLAV6 70 60 55 ns Clock high to FC valid tCHFCV6A 70 60 55 ns Clock high to address, data bus high impedance (maximum) tCHADZ7 2/ 80 70 60 ns Clock high to address/FC invalid (minimum) tCHAFI8 3/ 0 0 0 ns Clock high to AS, DS asserted tCHSL9 4/ 0 5/ 60 0 5/ 55 0 5/ 55 ns Cloc

    44、k high to AS, DS negated tCHSLn6/ ns Address valid to AS, DS asserted (read) / AS asserted (write) tAVSL11 7/ 30 20 0 ns FC valid to AS, DS asserted (read) / AS asserted (write) tFCVSL11A 7/ 8/ 60 50 40 ns Clock low to AS, DS negated tCLSH12 4/ 70 55 50 ns AS, DS negated to address/FC invalid tSHAFI

    45、VCC= 4.5 V CL= 70 pF for HALT, 130 pF for all others See figure 4. 13 7/ 8/ 9, 10, 1130 20 10 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89462 DEFENSE SUPPLY CENTER COLU

    46、MBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Group A sub- groups Device type 01, 04 8 MHZ Device type 02, 05 10 MHZ Device type 03, 06 12.5 MHZ Unit Conditions -55C TC +125C 4.5 V VCC 5.5 V unle

    47、ss otherwise specified Wave-form number (see figure 4)Min Max Min Max Min Max AS, (and DS read) width asserted tSL14 7/ 8/ 240 195 160 ns DS width asserted (write) tDSL14A 7/ 8/ 115 95 80 ns AS, DS width negated tSH15 7/ 8/ 150 105 65 ns Clock high to control bus high impedance tCHCZ16 2/ 80 70 60 n

    48、s AS, DS negated to R/W invalid tSHRN17 7/ 8/ 40 20 10 ns Clock high to R/W high (read) tCHRH18 4/ 0 70 0 60 0 60 ns Clock high to R/W high (read) (minimum) tCHRHn6/ ns Clock high to R/W low (write) tCHRL20 4/ 70 60 60 ns AS asserted to R/W valid (write) tASRV20A 7/ 8/ 9/ 20 20 20 ns Address valid t

    49、o R/W low (write) tAVRL21 7/ 8/ 20 0 0 ns FC valid to R/W low (write) tFCVRL21A 7/ 8/ 60 50 30 ns R/W low to DS asserted (write) tRLSL22 7/ 8/ 80 50 30 ns Clock low to data out valid (write) tCLDO23 70 55 55 ns Clock high to R/W, VMA high impedance tCHRZ10/ ns AS, DS negated to data-out invalid (write) t


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