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    DLA SMD-5962-88769 REV K-2012 MICROCIRCUIT HYBRID DIGITAL DUAL AND QUAD CHANNEL HIGH SPEED LOGIC GATE OPTOCOUPLER.pdf

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    DLA SMD-5962-88769 REV K-2012 MICROCIRCUIT HYBRID DIGITAL DUAL AND QUAD CHANNEL HIGH SPEED LOGIC GATE OPTOCOUPLER.pdf

    1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED G Added device types 04, 05, and 06 as class K. Redrew entire document. -sld 98-05-10 K.A. Cottongim H Updated drawing to the latest requirements. -sld 05-04-25 Raymond Monnin J Updated drawing paragraphs. -sld 11-11-08 Charles F. Saffle K Table I;

    2、 corrected the max limits for device types 02 and 05 for the supply current tests ICCLand ICCH. -sld 12-04-25 Charles F. Saffle REV SHEET REV K SHEET 15 REV STATUS REV K K K K K K K K K K K K K K OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Steve Duncan DLA LAND AND MARITIME

    3、 COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil/ STANDARD MICROCIRCUIT DRAWING CHECKED BY Robert M. Heber THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE APPROVED BY William K. Heckman MICROCIRCUIT, HYBRID, DIGITAL, DUAL AND QUAD CHANNEL, H

    4、IGH SPEED LOGIC GATE OPTOCOUPLER DRAWING APPROVAL DATE 89-04-10 AMSC N/A REVISION LEVEL K SIZE A CAGE CODE 67268 5962-88769 SHEET 1 OF 15 DSCC FORM 2233 APR 97 5962-E329-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING

    5、 SIZE A 5962-88769 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for hybrid microcircuits to be processed in accordance with MIL-PRF-38534. A choice of case outlines and lead finishes whic

    6、h are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of radiation hardness assurance levels are reflected in the PIN. 1.2 PIN. The PIN shall be as shown in the following example: For class H devices: 5962-88769 01 P X Drawing number Device type Case out

    7、line Lead finish (see 1.2.2) (see 1.2.4) (see 1.2.5) For class K devices: 5962 - 88769 04 K P X Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 Radiation ha

    8、rdness assurance (RHA) designator. RHA marked devices shall meet the MIL-PRF-38534 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Gener

    9、ic number Circuit function 01 HCPL-5231 Dual channel, optocoupler with common supply voltage and ground connections 02 HCPL-6231 Dual channel, optocoupler with seperate supply voltage and ground connections 03 HCPL-6251 Quad channel, optocoupler with common supply voltage and ground connections 04 H

    10、CPL-523K Dual channel, optocoupler with common supply voltage and ground connections 05 HCPL-623K Dual channel, optocoupler with seperate supply voltage and ground connections 06 HCPL-625K Quad channel, optocoupler with common supply voltage and ground connections 1.2.3 Device class designator. This

    11、 device class designator shall be a single letter identifying the product assurance level. All levels are defined by the requirements of MIL-PRF-38534 and require QML Certification as well as qualification (Class H, K, and E) or QML Listing (Class G and D). The product assurance levels are as follow

    12、s: Device class Device performance documentation K Highest reliability class available. This level is intended for use in space applications. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88769 DLA LAND AND

    13、 MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 3 DSCC FORM 2234 APR 97 H Standard military quality class level. This level is intended for use in applications where non-space high reliability devices are required. G Reduced testing version of the standard military quality class. This lev

    14、el uses the Class H screening and In-Process Inspections with a possible limited temperature range, manufacturer specified incoming flow, and the manufacturer guarantees (but may not test) periodic and conformance inspections (Group A, B, C and D). E Designates devices which are based upon one of th

    15、e other classes (K, H, or G) with exception(s) taken to the requirements of that class. These exception(s) must be specified in the device acquisition document; therefore the acquisition document should be reviewed to ensure that the exception(s) taken will not adversely affect system performance. D

    16、 Manufacturer specified quality class. Quality level is defined by the manufacturers internal, QML certified flow. This product may have a limited temperature range. 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Ter

    17、minals Package style P CDIP2-T8 8 Dual-in-line X See figure 1 8 Dual-in-line Y See figure 1 8 Dual-in-line 2 CQCC1-N20 20 Square leadless chip carrier F CDFP4-F16 16 Flat package 1.2.5 Lead finish. The lead finish shall be as specified in MIL-PRF-38534. 1.3 Absolute maximum ratings. 1/ Supply voltag

    18、e range (VCC) 0.0 V dc to 20 V dc Average forward current (IFAVG) . 8.0 mA Peak forward current (IFPK) 20 mA 2/ Reverse input voltage (VR) 3.0 V dc Average output current, per channel (IO) . 15 mA Output voltage range (VO) -0.3 V dc to +20 V dc Power dissipation, per channel (PD). 200 mW Storage tem

    19、perature range -65 C to +150 C Lead temperature (soldering, 10 seconds) +260 C Junction temperature +175 C Thermal resistance, junction-to-case (JC): Case outlines F, P, and 2 . See MIL-STD-1835 Case outlines X and Y 28 C/W Case temperature (TC) +170 C 1.4 Recommended operating conditions. Supply vo

    20、ltage range (VCC) 4.5 V dc to 20 V dc High level input current range (IF(ON) 2.0 mA to 8.0 mA Low level input voltage range (VF(OFF) 0 V dc to 0.8 V dc Fan out (N) . 4 TTL loads maximum Ambient operating temperature range (TA) -55 C to +125 C 1/ Stresses above the absolute maximum rating may cause p

    21、ermanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Peak forward input current pulse width VCC1,2,3 All 100 mA VO= 20 V, IF= 8.0 mA, VCC= 4.5 V, VOUT VCC500 Supply current 3/ ICCLVF1= VF2= VF3= VF4= 0.0 V, VCC= 5.5 V 1,2,3 01,04

    22、02,05 03,06 12 12 24 mA VF1= VF2= VF3= VF4= 0.0 V, VCC= 20 V 1,2,3 01,04 02,05 03,06 15 15 30 ICCHIF1= IF2= IF3= IF4= 8.0 mA, VCC= 5.5 V 1,2,3 01,04 02,05 03,06 9.0 9.0 18 mA IF1= IF2= IF3= IF4= 8.0 mA, VCC= 20 V 1,2,3 01,04 02,05 03,06 12 12 24 Output short circuit current 2/ 4/ IOSLVF= 0.0 V, VO=

    23、VCC= 5.5 V 1,2,3 All 20 mA VF= 0.0 V, VO= VCC= 20 V 35 IOSHIF= 8.0 mA, VCC= 5.5 V, VO= GND 1,2,3 All -10 mA IF= 8.0 mA, VCC= 20 V, VO= GND -25 Input forward voltage 2/ VFIF= 8.0 mA 1,2,3 All 1.0 1.8 V See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted

    24、 without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88769 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions 1/ -55 C TA+125 C unless otherwise specifie

    25、d Group A subgroups Device type Limits Unit Min Max Input reverse breakdown voltage 2/ VRIR= 10 A 1,2,3 All 3.0 V Input to output insulation leakage current 5/ II-OVI-O= 1500 V dc, t = 5.0 seconds, 45% RH, TA= +25 C 6/ 1 All 1.0 mA Logic high common mode transient immunity 2/ 7/ 8/ CMH VCM= 50 Vp-p,

    26、 IF= 2.0 mA 9,10,11 All 1000 V/ms Logic low common mode transient immunity 2/ 7/ 8/ CML VCM= 50 Vp-p, IF= 0.0 mA 9,10,11 All 1000 V/ms Propagation delay time high to low level output 2/ tPHLSee figure 2 9,10,11 All 350 ns Propagation delay time low to high level output 2/ tPLHSee figure 2 9,10,11 Al

    27、l 350 ns 1/ Unless otherwise specified, 0.0 V dc VF(OFF) 0.8 V dc, 4.5 V dc VCC 20 V dc, and 2.0 mA IF(ON) 8.0 mA. 2/ Applies to each channel. 3/ VF3, VF4, IF3, and IF4apply to device types 03 and 06 only. 4/ Not more than one output should be shorted at a time and duration of short circuit conditio

    28、n shall not exceed 10 ms. 5/ This is a momentary withstand test, not an operating condition. 6/ All devices are considered two terminal devices: measured between all input leads or terminals shorted together and all output leads or terminals shorted together. 7/ CML is the maximum rate of rise of th

    29、e common mode voltage that can be sustained with the output voltage in the logic low state (VO 0.8 V dc). CMH is the maximum rate of fall of the common mode voltage that can be sustained with the output voltage in the logic high state (VO 2.0 V dc). 8/ Parameters shall be tested as part of device in

    30、itial characterization and after design and process changes. Parameters shall be guaranteed to the limits specified in table I for all lots not specifically tested. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A

    31、5962-88769 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 8 DSCC FORM 2234 APR 97 Case outline X. Symbol Millimeters Inches Min Max Min Max A 4.57 .180 A1 1.40 1.65 .055 .065 b 0.41 0.51 .016 .020 c 0.18 0.33 .007 .013 D 9.40 9.91 .370 .390 e 2.29 2.79 .090 .110 E 9.65 9.91 .

    32、380 .390 E1 8.13 .320 L 1.07 1.32 .042 .052 S 0.89 1.27 .035 .050 Case outline Y. Symbol Millimeters Inches Min Max Min Max A 4.32 .170 A1 1.14 1.40 .045 .055 b 0.41 0.51 .016 .020 c 0.18 0.33 .007 .013 D 9.40 9.91 .370 .390 e 2.29 2.79 .090 .110 E 8.13 .320 eA 7.37 7.87 .290 .310 Q 0.51 .020 S 0.89

    33、 1.27 .035 .050 NOTES: 1. The U.S. government preferred system of measurement is the metric SI. This item was designed using inch-pound units of measurement. In case of problems involving conflicts between the metric and inch-pound units, the inch-pound units shall rule. 2. Pin 1 is indicated by the

    34、 ESD triangle(s) marked on top of the package. FIGURE 1. Case outline(s). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88769 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 9 DSCC FO

    35、RM 2234 APR 97 Device types 01 and 04 02 and 05 03 and 06 Case outlines P, X, and Y 2 F Terminal number Terminal symbol 1 +VF1(anode) NC -VF1(cathode) 2 -VF1(cathode) -VF1(cathode) +VF1(anode) 3 -VF2(cathode) +VF1(anode) +VF2(anode) 4 +VF2(anode) NC -VF2(cathode) 5 GND NC -VF3(cathode) 6 VO2 NC +VF3

    36、(anode) 7 VO1 GND +VF4(anode) 8 VCC VO1-VF4(cathode) 9 - NC NC 10 - VCC1GND 11 - NC VO4 12 - GND VO313 - VO2VO214 - NC VO115 - VCC2VCC16 - NC NC 17 - NC - 18 - NC - 19 - +VF2(anode) - 20 - -VF2(cathode) - NOTE: NC is no connection. FIGURE 2. Terminal connections. Provided by IHSNot for ResaleNo repr

    37、oduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88769 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 10 DSCC FORM 2234 APR 97 Device types 01 and 04 (Each channel) FIGURE 3. Propagation delay times test circuit and wavef

    38、orm. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88769 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 11 DSCC FORM 2234 APR 97 Device types 02 and 05 (Each channel) FIGURE 3. Propa

    39、gation delay times test circuit and waveform - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88769 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 12 DSCC FORM 2234 APR 97

    40、Device types 03 and 06 (Each channel) FIGURE 3. Propagation delay times test circuit and waveform - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88769 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-

    41、3990 REVISION LEVEL K SHEET 13 DSCC FORM 2234 APR 97 NOTES: 1. Pulse generator having the following characteristics: tr= tf= 5.0 ns f = 100 kHz 10% duty cycle 2. Load capacitance (CL) includes probe and jig capacitance. 3. All diodes (D1through D4) are 1N916 or 1N3064. FIGURE 3. Propagation delay ti

    42、mes test circuit and waveform - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88769 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 14 DSCC FORM 2234 APR 97 TABLE II. Elect

    43、rical test requirements. MIL-PRF-38534 test requirements Subgroups (in accordance with MIL-PRF-38534, group A test table) Interim electrical parameters 1 Final electrical parameters 1*, 2, 3, 9 Group A test requirements 1, 2, 3, 9, 10, 11 Group C end-point electrical parameters 1, 2, 3 End-point ele

    44、ctrical parameters for Radiation Hardness Assurance (RHA) devices Not applicable * PDA applies to subgroup 1. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38534 or as modified in the device manufacturers Quality Management (QM) p

    45、lan. The modification in the QM plan shall not affect the form, fit, or function as described herein. 4.2 Screening. Screening shall be in accordance with MIL-PRF-38534. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The

    46、test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to eithe DLA Land and Maritime -VA) or the acquiring activity upon request. Also, the test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, i

    47、n accordance with the intent specified in method 1015 of MIL-STD-883. (2) TAas specified in accordance with table I of method 1015 of MIL-STD-883. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. 4.3 Conformance and periodic inspections. Conformance inspection (CI) and periodic inspection (PI) shall be in accordance with MIL-PRF-38534 and as specified herein. 4.3.1 Group A inspection (CI). Group A in


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