1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Removed vendor CAGE 34371 as source of supply for device 01LA. Drawing updated to reflect current requirements. Editorial changes throughout. - gap 00-10-05 Ray Monnin B Boilerplate update and part of five year review. tcr 07-12-13 Robert M. Hebe
2、r THE FRONT PAGE OF THIS DRAWING HAS BEEN REPLACED REV SHET REV SHET REV STATUS REV B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 PMIC N/A PREPARED BY Kenneth S. Rice DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Ray Monnin COLUMBUS, OHIO 43218-399
3、0 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 512 X 8 PROM, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 89-01-20 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 59
4、62-88690 SHEET 1 OF 13 DSCC FORM 2233 APR 97 5962-E024-08 Trial VProvided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88690 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FO
5、RM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-88690 01 J A Dr
6、awing number Device type Case outline Lead finish (see 1.2.1) (see 1.2.2) (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function Access time 01 6642 512 x 8 CMOS PROM 220 ns 02 6642B 512 x 8 CMOS PROM 140 ns 1.2.2 Ca
7、se outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style J GDIP1-T24 or CDIP2-T24 24 Dual-in-line package L GDIP3-T24 or CDIP4-T24 24 Dual-in-line package 3 CQCC1-N28 28 Square leadless chip carrier 1.2.3 Lead
8、finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage to ground potential . -0.3 V dc to +7.0 V dc DC voltage applied to outputs -0.3 V dc to VCC+0.3 V dc DC input voltage range. -0.3 V dc to VCC+0.3 V dc Storage temperature range -65C to
9、+150C Maximum power dissipation (PD) 1.0 W Lead temperature (soldering, 10 seconds) +275C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ). +150C 1/ 1.4 Recommended operating conditions. Supply voltage range (VCC) . 4.5 V dc to 5.5 V dc High level input voltage
10、range (VIH) +2.4 V dc to VCC+0.3 V dc Low level input voltage range (VIL) . -0.3 V dc to +0.8 V dc Case operating temperature range (TC) . -55C to +125C 1/ Maximum junction temperature may be increased to +175C during burn-in and steady-state life. Trial VProvided by IHSNot for ResaleNo reproduction
11、 or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88690 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following spe
12、cification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General
13、Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawi
14、ngs. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the
15、text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall
16、be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification t
17、o MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modif
18、ications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimens
19、ions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.2 Truth table. The truth table shall be as specified on figure 2. 3.2.2.1 Unprogrammed de
20、vices. The truth table for unprogrammed devices for contracts involving no altered item drawing shall be as specified on figure 2. When required in groups A, B, or C inspection (see 4.3), the devices shall be programmed by the manufacturer prior to test in a checkerboard pattern (a minimum of 50 per
21、cent of the total number of bits programmed) or to any altered item drawing pattern which includes at least 25 percent of the total number of bits programmed. 3.2.2.2 Programmed devices. The requirements for supplying programmed devices are not part of this drawing. 3.2.3 Case outline(s). The case o
22、utline(s) shall be in accordance with 1.2.2 herein. Trial VProvided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88690 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 223
23、4 APR 97 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be t
24、he subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For pack
25、ages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38
26、535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Processing options. Since the PROM is an unprogrammed memory capable of being programmed by either the manufacture
27、r or the user to result in a wide variety of PROM configurations, two processing options are provided for selection in the contract using an altered item drawing. 3.6.1 Unprogrammed PROM delivered to the user. All testing shall be verified through group A testing as defined in 4.3.1. It is recommend
28、ed that users perform subgroups 7 and 9 after programming to verify the specific program configuration. 3.6.2 Manufacturer-programmed PROM delivered to the user. All testing requirements and quality assurance provisions herein, including the requirements of the altered item drawing shall be satisfie
29、d by the manufacturer prior to delivery. 3.7 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an
30、approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.8 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuit
31、s delivered to this drawing. 3.9 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.10 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable req
32、uired documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Trial VProvided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88690 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS,
33、 OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC+125C VCC= 4.5 V to 5.5 V Group A subgroups Device types Limits Unit unless otherwise specified 1/ Min Max Output high voltage VOHVCC= 4.5 V, IOH= -1.0 mA 1,
34、 2, 3 All 2.4 V Output low voltage VOLVCC= 4.5 V, IOL= 3.2 mA 1, 2, 3 All 0.4 V Input leakage current (except P input) IIVCC= 5.5 V, 0 V VIN 5.5 V 1, 2, 3 All -1.0 1.0 A Output leakage current, high impedance IOZVCC= 5.5 V, G = 5.5 V GND VI/O VCC1, 2, 3 All -1.0 1.0 A Operating supply current ICCVCC
35、= 5.5 V, G = VCCIOUT= 0 mA, f = 1.0 MHz 0 V VIN 5.5 V 1, 2, 3 All 20 mA Standby supply current ISBVCC= 5.5 V, IOUT= 0 mA, 0 V VIN 5.5 V 1, 2, 3 All 100 A Input capacitance CINVCC= open, f = 1.0 MHz, Case J 4 All 10 pF TC= 25C, See 4.3.1c Case L 13 All measurements are referenced to device ground Cas
36、e 3 8.0 Output capacitance COUTVCC= open, f = 1.0 MHz, Case J 4 All 12 pF TC= 25C, See 4.3.1c Case L 15 All measurements are referenced to device ground Case 3 10 See footnotes at end of table. Trial VProvided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-S
37、TANDARD MICROCIRCUIT DRAWING SIZE A 5962-88690 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions -55C TC+125C VCC= 4.5 V to 5.5 V Group A subgroups Device types Lim
38、its Unit unless otherwise specified 1/ Min Max Address access time tAVQVSee figures 3 and 4 2/ 9, 10, 11 01 220 ns 02 140 Output enable access tGVQV9, 10, 11 01 150 ns time 02 50 Chip enable access tELQV9, 10, 11 01 200 ns time 02 120 Address setup time tAVEL9, 10, 11 01 20 ns 02 20 Address hold tim
39、e tELAX9, 10, 11 01 60 ns 02 25 Chip enable low pulse tELEH9, 10, 11 01 200 ns width 02 120 Chip enable high pulse tEHEL9, 10, 11 01 150 ns width 02 40 Read cycle time tELEL9, 10, 11 01 350 ns 02 160 Output enable time tGVQX9, 10, 11 01 5.0 150 ns 3/ 02 5.0 50 Output disable time tGXQZ9, 10, 11 01 1
40、50 ns / 02 50 1/ All measurements are performed with P hardwired to GND. 2/ Test conditions assume signal transition times of 5.0 ns or less. Timing is referenced at input and output levels of 1.5 V and input pulse levels of 0 to 3.0 V. Output loading is IOL = +1.0 mA and IOHwith a load capacitance
41、of 50 pF. 3/ If not tested, shall be guaranteed to limits specified in table I. Trial VProvided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88690 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION L
42、EVEL B SHEET 7 DSCC FORM 2234 APR 97 Device types All Case outlines J and L 3 Terminal number Terminal symbol 1 A7NC 2 A6A73 A5 64 A4A55 A3 46 A2A37 A1 28 A0A19 Q0 010 Q1NC 11 Q2Q012 GND Q113 Q3Q214 Q4GND 15 Q5NC 16 Q6Q317 Q7 418 P Q519 E Q620 G3 Q721 G2 NC 22 G1 P 23 A8E 24 VCCG3 25 - G2 26 - G1 27
43、 - A828 - VCCProgram pin P is required to be hardwired to GND except for programming. FIGURE 1. Terminal connections. Trial VProvided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88690 DEFENSE SUPPLY CENTER COLUMBU
44、S COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 Time reference Inputs Outputs (See figure 4) E G A Q Function -1 H H X Z Memory disabled 0 _ H V Z Cycle begins-addresses are latched 1 L L X X Output enabled 2 L L X V Output valid 3 _/ L X V Output latched 4 H H X Z Read ac
45、complished and output disabled 5 H H X Z Prepare for next cycle (same as 1) 6 _ H X Z Cycle ends, next cycle begins (same as 0) Program pin P is required to be hardwired to GND except for programming. H = Logic high voltage level L = Logic low voltage level Z = High impedance state X = Dont care _ =
46、 High-to-low transition _/ = Low-to-high transition V = Valid FIGURE 2. Truth table (unprogrammed). Trial VProvided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88690 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 4
47、3218-3990 REVISION LEVEL B SHEET 9 DSCC FORM 2234 APR 97 NOTE: CL= Load capacitance includes scope and jig capacitance. FIGURE 3. Output load circuit or equivalent. Trial VProvided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88690 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 10 DSCC FORM 2234 APR 97 READ CYCLE NOTE: G has the same timing as G exce
