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    DLA SMD-5962-88654 REV A-2008 MICROCIRCUIT DIGITAL FAST CMOS OCTAL BIDIRECTIONAL TRANSCEIVERS MONOLITHIC SILICON.pdf

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    DLA SMD-5962-88654 REV A-2008 MICROCIRCUIT DIGITAL FAST CMOS OCTAL BIDIRECTIONAL TRANSCEIVERS MONOLITHIC SILICON.pdf

    1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add device type 03 and vendor CAGE 0DKS7. Update the boilerplate to the current requirements of MIL-PRF-38535. Editor changes throughout. - phn 08-05-14 Thomas M. Hess REV SHET REV SHET REV STATUS REV A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4

    2、 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Monica L. Poelking STANDARD MICROCIRCUIT DRAWING CHECKED BY Ray Monnin DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye AND AGENCIES OF THE DEPARTMENT

    3、 OF DEFENSE DRAWING APPROVAL DATE 89-05-31 MICROCIRCUIT, DIGITAL, FAST CMOS, OCTAL, BIDIRECTIONAL TRANSCEIVERS, MONOLITHIC SILICON AMSC N/A SIZE A CAGE CODE 67268 5962-88654 REVISION LEVEL A SHEET 1 OF 11 DSCC FORM 2233 Provided by IHSNot for ResaleNo reproduction or networking permitted without lic

    4、ense from IHS-,-,-APR 97 5962-E374-08 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88654 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1

    5、 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-88654 01 R A Drawing number Device type (s

    6、ee 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54FCT640 Inverting, octal, bidirectional transceiver, TTL compatible. 02 54FCT640 Inverting, octal, bidirectional

    7、transceiver, TTL compatible. 03 54FCT640 Inverting, octal, bidirectional transceiver, TTL compatible. 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line S

    8、GDFP2-F20 or CDFP3-F20 20 Flat pack 2 CQCC1-N20 20 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC): All inputs . -0.5 V dc to +7.0 V dc I/O ports -0.5 V dc to +VCCInput voltage r

    9、ange (VIN) . -0.5 V dc to VCC+ 0.5 V dc Output voltage range (VOUT) -0.5 V dc to VCC+ 0.5 V dc DC input diode current (IIK) . 20 mA DC output diode current (IOK) 50 mA DC output current . 100 mA Maximum power dissipation (PD) 500 mW 2/ Storage temperature range (TSTG) -65C to +150C Lead temperature

    10、(soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ) . +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) . +4.5 V dc to +5.5 V dc Maximum low level input voltage (VIL). 0.8 V dc Minimum high level input voltage (VIH)

    11、2.0 V dc Case operating temperature range (TC) -55C to +125C _ 1/ All voltages are referenced to ground. 2/ Must withstand the added PDdue to short circuit test, e. g. IOS. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING

    12、 SIZE A 5962-88654 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent s

    13、pecified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Sta

    14、ndard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mi

    15、l/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing t

    16、akes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B device

    17、s and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufactu

    18、rers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modificati

    19、ons shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in

    20、 MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Test circuit

    21、 and switching waveforms. The test circuit and switching waveforms shall be as specified on figure 3. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating tem

    22、perature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD

    23、 MICROCIRCUIT DRAWING SIZE A 5962-88654 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the man

    24、ufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JA

    25、N devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be require

    26、d from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appen

    27、dix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any

    28、 change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided b

    29、y IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88654 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Limits Unit

    30、 Test Symbol Conditions -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified Group A subgroupsDevice types Min Max IO= -300 A 4.3 High level output voltage VOHVCC= 4.5 V VIL= 0.8 V VIH= 2.0 V IO= -12 mA 1, 2, 3 All 2.4 V IO= 300 A 0.2 Low level output voltage VOLVCC= 4.5 V VIL= 0.8 V VIH= 2.0 V

    31、IO= 32 mA 1, 2, 3 All 0.55 V Input clamp voltage VIKVCC= 4.5 V, IIN= -18 mA 1 All -1.2 V except I/O pins 1, 2, 3 All 5.0 A High level input current IIH1VCC= 5.5 V VIN= 5.5 V I/O pins only 1, 2, 3 All 15 A except I/O pins 1, 2, 3 All -5.0 A Low level input current IIL1VCC= 5.5 V VIN= GND I/O pins onl

    32、y 1, 2, 3 All -15 A Short circuit output current IOSVCC= 5.5 V VOUT= GND 1/ 1, 2, 3 All -60 mA Quiescent power supply current (CMOS inputs) ICCQVIN 0.2 V or VIN 5.3 V VCC= 5.5 V fi= fCP= 0 MHz 1, 2, 3 All 1.5 mA Quiescent power supply current (TTL inputs) ICC2/ VCC= 5.5 V VIN= 3.4 V 2/ 1, 2, 3 All 2

    33、.0 mA Dynamic power supply current ICCDVCC= 5.5 V, OE = GND, VIN 5.3 V or VIN 0.2 V Outputs open, T/ R = GND or VCCOne bit toggling - 50% duty cycle 1, 2, 3 All 0.25 mA/ MHz VIN 5.3 V or VIN 0.2 V VCC= 5.5 V, fI= 10 MHz Outputs open, T/ R = OE = GND One bit toggling - 50% duty cycle 1, 2, 3 All 4.0

    34、mA Total power supply current ICCVIN= 3.4 V or VIN= GND VCC= 5.5 V, fI= 10 MHz Outputs open, T/ R = OE = GND One bit toggling - 50% duty cycle 1, 2, 3 All 6.0 mA Functional test See 4.3.1d 7, 8 All Input capacitance CINSee 4.3.1c 4 All 10 pF 01,02 12 Output capacitance COUTSee 4.3.1c 4 03 15 pF See

    35、footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88654 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical per

    36、formance characteristics - Continued. Limits Unit Test Symbol Conditions -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified Group A subgroupsDevice types Min Max 01 1.5 8.0 02 1.5 5.3 Propagation delay A to B, B to A tPLH, tPHL03 1.5 9.5 01,03 1.5 16 Output enable time, for OE or T/ R tPZH, tP

    37、ZL02 1.5 6.5 01,03 1.5 12 Output disable time, for OE or T/ R tPHZ, tPLZRL= 500 , CL= 50 pF See figure 3 9, 10, 11 02 1.5 6.0 ns 1/ Not more than one output should be shorted at one time and the duration of the short circuit condition shall not exceed one second. 2/ TTL driven input, VIN= 3.4 V, all

    38、 other inputs at VCCor GND. 3/ This parameter is not directly testable, but is derived for use in total power supply calculations. 4/ ICC= ICCQ+ (ICCx DH x NT) + (ICCD x fi x Ni) Where: DH= Duty cycle for TTL inputs high NT= Number of TTL inputs at DHfi= Input frequency in MHz Ni= Number of inputs a

    39、t fi5/ The minimum limits for the propagation delay times are guaranteed, if not tested, to the limits specified in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88654 DEFENSE SUPPLY CENTER COLUMBU

    40、S COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 Case outline: R, S, and 2 Terminal number Terminal symbol Terminal number Terminal symbol 1 T/ R 11 B72 A012 B63 A113 B54 A214 B45 A315 B36 A416 B27 A517 B18 A618 B09 A719 OE 10 GND 20 VCCFIGURE 1. Terminal connections. Input

    41、s OE T/ R Operation L L Bus B data to bus A L H Bus A data to bus B H X Isolation H = High voltage level L = Low voltage level X = Irrelevant FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A

    42、5962-88654 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 8 DSCC FORM 2234 APR 97 NOTES: 1. CLincludes probe and jig capacitance. 2. RT= terminal resistance and should be equal to ZOUTof the pulse generator. 3. Input characteristics: tr= tf= 2.5 ns (10% to 90%). FIGU

    43、RE 3. Test circuit and switching waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88654 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 9 DSCC FORM 2234 APR 97 FIGURE

    44、 3. Test circuit and switching waveforms - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88654 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 10 DSCC FORM 2234 AP

    45、R 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection.

    46、The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request

    47、. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim

    48、electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. TABLE II. Electrical test requirements. MIL-STD-883 test requirements Subgroups (in accordance with MIL-STD-883, method 5005, table I) Interim electrical parameters (method 5004) - - - Final electrical test parameters (method 5004) 1*, 2, 3, 7, 8, 9, 10, 11 Group A test requirements (method 5005) 1, 2, 3, 7, 8, 9, 10, 11 Groups C and D end-point


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