欢迎来到麦多课文档分享! | 帮助中心 海量文档,免费浏览,给你所需,享你所想!
麦多课文档分享
全部分类
  • 标准规范>
  • 教学课件>
  • 考试资料>
  • 办公文档>
  • 学术论文>
  • 行业资料>
  • 易语言源码>
  • ImageVerifierCode 换一换
    首页 麦多课文档分享 > 资源分类 > PDF文档下载
    分享到微信 分享到微博 分享到QQ空间

    DLA SMD-5962-88611 REV B-2008 MICROCIRCUIT MEMORY DIGITAL CMOS 4K x 4 STATIC RAM WITH SEPARATE I O MONOLITHIC SILICON.pdf

    • 资源ID:699275       资源大小:119.39KB        全文页数:16页
    • 资源格式: PDF        下载积分:10000积分
    快捷下载 游客一键下载
    账号登录下载
    微信登录下载
    二维码
    微信扫一扫登录
    下载资源需要10000积分(如需开发票,请勿充值!)
    邮箱/手机:
    温馨提示:
    如需开发票,请勿充值!快捷下载时,用户名和密码都是您填写的邮箱或者手机号,方便查询和重复下载(系统自动生成)。
    如需开发票,请勿充值!如填写123,账号就是123,密码也是123。
    支付方式: 支付宝扫码支付    微信扫码支付   
    验证码:   换一换

    加入VIP,交流精品资源
     
    账号:
    密码:
    验证码:   换一换
      忘记密码?
        
    友情提示
    2、PDF文件下载后,可能会被浏览器默认打开,此种情况可以点击浏览器菜单,保存网页到桌面,就可以正常下载了。
    3、本站不支持迅雷下载,请使用电脑自带的IE浏览器,或者360浏览器、谷歌浏览器下载即可。
    4、本站资源下载后的文档和图纸-无水印,预览文档经过压缩,下载后原文更清晰。
    5、试题试卷类文档,如果标题没有明确说明有答案则都视为没有答案,请知晓。

    DLA SMD-5962-88611 REV B-2008 MICROCIRCUIT MEMORY DIGITAL CMOS 4K x 4 STATIC RAM WITH SEPARATE I O MONOLITHIC SILICON.pdf

    1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R084-92. 91-12-09 M. A. Frye B Updated boilerplate as part of 5 year review. ksr 08-10-30 Robert M. Heber THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED. REV SHET REV B SHET 15 REV STATUS REV B B B B

    2、 B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Rick C. Officer DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Wm J Johnson COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL APPROVED BY Michae

    3、l A. Frye DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 88-12-07 MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 4K x 4 STATIC RAM WITH SEPARATE I/O, MONOLITHIC SILICON AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-88611 SHEET 1 OF 15 DSCC FORM 2233 APR 97 5962-E022-09 Pro

    4、vided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88611 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device req

    5、uirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN shall be as shown in the following example: 5962- 88611 01 K A | | | | | | | | | | | | Drawing number Device type Case outline

    6、 Lead finish (see 1.2.1) (see 1.2.2) (see 1.2.3) 1.2.1 Device type(s). The device type(s) shall identify the circuit function as follows: Device type Generic number Circuit function Access time 01 1/ 4K X 4 CMOS SRAM with separate I/O 70 ns 02 1/ 4K X 4 CMOS SRAM with separate I/O 55 ns 03 1/ 4K X 4

    7、 CMOS SRAM with separate I/O 45 ns 04 1/ 4K X 4 CMOS SRAM with separate I/O 35 ns 05 1/ 4K X 4 CMOS SRAM with separate I/O 25 ns 1.2.2 Case outline(s). The case outline(s) shall be as designated in MIL-STD-1835, and as follows: Outline letter Descriptive designator Terminals Package style K GDFP2-F2

    8、4 or CDFP3-F24 24 flat package L GDIP3-T24 or CDIP4-T24 24 dual-in-line package 3 CQCC1-N28 28 square chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Terminal voltage range with respect to ground. -0.5 V dc to +7.0 V dc DC o

    9、utput current . 50 mA Storage temperature range -65C to +150C Maximum power dissipation (PD):. 1.0 W Lead temperature (soldering, 10 seconds) +260C Thermal resistance, junction-to-case (JC) . Case K, L, and 3 See MIL-STD-1835 Junction Temperature (TJ) +150C 2/ 1.4 Recommended operating conditions. S

    10、upply voltage range (VCC) . 4.5 V dc to 5.5 V dc High level input voltage range (VIH) 2.2 V dc to 6.0 V dc Maximum low level input low voltage (VIL) 0.5 V dc to +0.8 V dc 3/ Case operating temperature range (TC) -55C to +125C 1/ Generic numbers are listed on the Standard Microcircuit Drawing Source

    11、Approval Bulletin at the end of this document and will also be listed in MIL-HDBK-103. 2/ Maximum junction temperature may be increased to +175C during burn-in and steady state life. 3/ Symbol VIL(minimum) = -3.0 V dc for pulse width less than 20 ns. Provided by IHSNot for ResaleNo reproduction or n

    12、etworking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88611 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following speci

    13、fication, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Sp

    14、ecification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawing

    15、s. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the re

    16、ferences cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements The individual item requirements shall be in accordance with MIL-PRF-38

    17、535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed

    18、 as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect the PI

    19、N as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A

    20、and herein. 3.2.1 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.2 Truth table. The truth table shall be as specified on figure 2. 3.2.3 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.4 Die overcoat. Polyimide and silicone coatin

    21、gs are allowable as an overcoat on the die for alpha particle protection only. Each coated microcircuit inspection lot (see inspection lot as defined in MIL-PRF-38535) shall be subjected to and pass the internal moisture content test at 5000 ppm (see method 1018 of MIL-STD-883). The frequency of the

    22、 internal water vapor testing shall not be decreased unless approved by the preparing activity for class M. The TRB will ascertain the requirements as provided by MIL-PRF-38535 for classes Q and V. Samples may be pulled any time after seal. 3.3 Electrical performance characteristics. Unless otherwis

    23、e specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each su

    24、bgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88611 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 TABLE I. Electric

    25、al performance characteristics. Test Device type Limits Symbol Conditions 4.5 V VCC 5.5 V -55C TC +125C unless otherwise specified Group A subgroupsMin Max Unit Output high voltage VOHVCC= 4.5 V, VIL= 0.8 V, IOH= -4.0 mA, VIH= 2.2 V 1, 2, 3 All 2.4 V Output low voltage IOL= 10 mA All 0.5 VOLVCC= 4.5

    26、 V VIL= 0.8 V VIH= 2.2 V IOL= 8.0 mA 1, 2, 3 All 0.4 V Input leakage current ILIVCC= 5.5 V, GND VIN VCC1, 2, 3 All 5.0 A Output leakage current ILOVCC= 5.5 V, CS = VIHGND VOUT VCC1, 2, 3 All 5.0 A Operating power supply current ICC1VCC= 5.5 V, CS = VILf = 0 1/, outputs open, WE , An, and Dn = 2.2 V

    27、1, 2, 3 All 80 mA 01, 02, 03 80 04 90 Dynamic operating current ICC2VCC= 5.5 V, CS = 3.0 V, f = f MAX1/, WE = 3.0 V, outputs open, An, and Dn toggling between 0 V and 3.0 V 1, 2, 3 05 100 mA 01, 02 20 03, 04 25 Standby power supply current (TTL) ISB1VCC= 5.5 V, CS 0 V, f = f MAX1/, WE = 3.0 V, outpu

    28、ts open, An, and Dn toggling between 0 V and 3.0 V 1, 2, 3 05 30 mA Full standby power supply current (CMOS levels) ISB2VCC= 5.5 V, CS 5.3 V, f = 0 1/, VIN 5.3 V or 0.2 V 1, 2, 3 All 0.3 A VCCfor data retention VDR1, 2, 3 All 2.0 V Data retention current: at VCC= 2.0 V at VCC= 3.0 V ICCDR1ICCDR2CS V

    29、CC-0.2 V, VIN VCC-0.2 V or 0.2 V 1, 2, 3 All 100 150 A Input capacitance CINVCC= 5.0 V, VIN =0 V, f = 1.0 MHz, TA= +25C, See 4.3.1c 4 All 8 pF Output capacitance COUTVCC = 5.0 V, VI/O = 0 V, f = 1.0 MHz, TA= +25C See 4.3.1c 4 All 8 pF See notes at end of table. Provided by IHSNot for ResaleNo reprod

    30、uction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88611 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions 4.5

    31、V VCC 5.5 V -55C TC +125C Group A subgroups Device types Limits Unit unless otherwise specified Min Max 01 70 02 55 03 45 04 35 Read cycle time tRCSee figures 3 and 4. 2/ 9, 10, 11 05 25 ns 01 70 02 55 03 45 04 35 Address access time tAASee figures 3 and 4. 2/ 9, 10, 11 05 25 ns Output hold from add

    32、ress change tOHSee figures 3 and 4. 2/ 9, 10, 11 All 3.0 ns 01 70 02 55 03 45 04 35 Chip select access time tACSSee figures 3 and 4. 2/ 9, 10, 11 05 25 ns Chip select to output in low Z tLZSee figures 3 and 4. 3/ 4/ 9, 10, 11 All 5.0 ns 01 30 02 25 03 20 04 15 Chip deselect to output in high Z tHZSe

    33、e figures 3 and 4. 3/ 4/ 9, 10, 11 05 10 ns Chip select to power-up time tPUSee figures 3 and 4. 2/ 3/ 9, 10, 11 All 0 ns 01 60 02 50 03 40 04 35 Chip deselect to power-down time tPDSee figures 3 and 4. 2/ 3/ 9, 10, 11 05 25 ns See notes at end of table. Provided by IHSNot for ResaleNo reproduction

    34、or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88611 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions 4.5 V VCC 5

    35、.5 V -55C TC +125C Group A subgroups Device types Limits Unit unless otherwise specified Min Max 0160 02 50 03 40 04 30 Write cycle time tWCSee figures 3 and 5. 2/ 9, 10, 11 05 20 ns 01 60 02 50 03 40 04 30 Chip select to end of write tCWSee figures 3 and 5. 2/ 9, 10, 11 05 20 ns 01 60 02 50 03 40 0

    36、4 30 Address valid to end of write tAWSee figures 3 and 5. 2/ 9, 10, 11 05 20 ns Address setup time tASSee figures 3 and 5. 2/ 9, 10, 11 All 0 ns 01 40 02 35 03 30 04 25 Write pulse width tWPSee figures 3 and 5. 2/ 9, 10, 11 05 20 ns Write recovery time tWRSee figures 3 and 5. 2/ 9, 10, 11 All 0 ns

    37、01 25 02, 03 20 04 17 Data valid to end of write tDWSee figures 3 and 5. 2/ 9, 10, 11 05 13 ns Data hold time tDHSee figures 3 and 5. 2/ 9, 10, 11 All 3.0 ns See notes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIR

    38、CUIT DRAWING SIZE A 5962-88611 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC+125C VCC= 4.5 V to 5.5 V Group A subgroups Device types Limits Unit unles

    39、s otherwise specified Min Max 01 30 02 25 03 20 04 13 Write enable to output valid tWZSee figures 3 and 5. 3/ 4/ 9, 10, 11 05 7.0 ns Output active from end of write tOWSee figures 3 and 5. 3/ 4/ 9, 10, 11 All 0 ns Chip deselect to data retention time tCDRCS VCC-0.2 V, VIN VCC-0.2 V or 0.2 V See figu

    40、re 6. 3/ 9, 10, 11 All 0 ns Operation recovery time tR9, 10, 11 All tRCns 1/ At f = fMAXaddress and data inputs are cycling at the maximum frequency of read cycles of 1/tRC. f = 0 means no input lines change. 2/ Test conditions assume signal transition times of 5.0 ns or less. Timing is referenced a

    41、t input and output levels of 1.5 V and input pulse levels of 0 to 3.0 V. Output loading is equivalent to the specified IOL/IOHwith a load capacitance of 30 pF. 3/ If not tested, shall be guaranteed to the limits specified in Table I. 4/ Test conditions assume signal transition times of 5.0 ns or les

    42、s. Transition is measured at steady-state high level of -200 mV or steady-state low level of +200 mV on the output from 1.5 V level on the input with a load capacitance of 5.0 pF. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed

    43、 in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator

    44、“C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certifica

    45、te of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the req

    46、uirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to

    47、DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the op

    48、tion of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88611 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 Terminal symbol Device 01-05 Case outlines K and L 3 Terminal numbe


    注意事项

    本文(DLA SMD-5962-88611 REV B-2008 MICROCIRCUIT MEMORY DIGITAL CMOS 4K x 4 STATIC RAM WITH SEPARATE I O MONOLITHIC SILICON.pdf)为本站会员(figureissue185)主动上传,麦多课文档分享仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文档分享(点击联系客服),我们立即给予删除!




    关于我们 - 网站声明 - 网站地图 - 资源地图 - 友情链接 - 网站客服 - 联系我们

    copyright@ 2008-2019 麦多课文库(www.mydoc123.com)网站版权所有
    备案/许可证编号:苏ICP备17064731号-1 

    收起
    展开