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    DLA SMD-5962-88525 REV E-2011 MICROCIRCUIT MEMORY DIGITAL CMOS 32K X 8 EEPROM MONOLITHIC SILICON.pdf

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    DLA SMD-5962-88525 REV E-2011 MICROCIRCUIT MEMORY DIGITAL CMOS 32K X 8 EEPROM MONOLITHIC SILICON.pdf

    1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add “Changes in accordance with NOR 5962-R115-92.“ 92-01-27 M. A. Frye B Add software data protection. Increase data retention to 20 years, minimum. Add device types 08 through 16. Remove tests tDHWL, tWHDX, and ESDS requirements from drawing. 93

    2、-07-21 M. A. Frye C Add “Changes in accordance with NOR 5962-R071-95.“ 95-02-14 M. A. Frye D Updated boilerplate paragraphs. ksr 05-04-15 Raymond Monnin E Updated body of drawing to reflect current requirements. glg 11-12-16 Charles Saffle The original first page has been replaced. REV SHEET REV E E

    3、 E E E E E E E SHEET 15 16 17 18 19 20 21 22 23 REV STATUS REV E E E E E E E E E E E E E E OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Kenneth Rice DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Ray

    4、mond Monnin THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE APPROVED BY Michael A. Frye MICROCIRCUIT, MEMORY, DIGITAL, CMOS 32K X 8 EEPROM, MONOLITHIC SILICON DRAWING APPROVAL DATE 88-08-29 AMSC N/A REVISION LEVEL SIZE A CAGE CODE 67268 5962-88525 E SHE

    5、ET 1 OF 23 DSCC FORM 2233 APR 97 5962-E119-12 .Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88525 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1

    6、 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-88525 01 X A Drawing number Device type Ca

    7、se outline Lead finish (see 1.2.1) (see 1.2.2) (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Access Write Write End of Write Software data Device type Generic number Circuit function time speed mode Indicator Endurance protect 01 See 6.6 (32K X 8 EEPR

    8、OM) 350 ns 10 ms byte/page DATA polling 10,000 cycles No 02 300 ns 10 ms byte/page DATApolling 10,000 cycles No 03 250 ns 10 ms byte/page DATApolling 10,000 cycles No 04 200 ns 10 ms byte/page DATApolling 10,000 cycles No 05 250 ns 10 ms byte/page DATApolling 100,000 cycles No 06 150 ns 10 ms byte/p

    9、age DATApolling 10,000 cycles No 07 150 ns 3 ms byte/page DATApolling 10,000 cycles No 08 150 ns 10 ms byte/page DATApolling 100,000 cycles No 09 350 ns 10 ms byte/page DATApolling 10,000 cycles Yes 10 300 ns 10 ms byte/page DATApolling 10,000 cycles Yes 11 250 ns 10 ms byte/page DATApolling 10,000

    10、cycles Yes 12 200 ns 10 ms byte/page DATApolling 10,000 cycles Yes 13 250 ns 10 ms byte/page DATApolling 100,000 cycles Yes 14 150 ns 10 ms byte/page DATApolling 10,000 cycles Yes 15 150 ns 3 ms byte/page DATApolling 10,000 cycles Yes 16 150 ns 10 ms byte/page DATApolling 100,000 cycles Yes 1.2.2 Ca

    11、se outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style U See figure 1 128 Grid array X GDIPI-T28 or CDIP2-T28 28 Dual-in-line Y CQCC1-N32 32 Rectangular leadless chip carrier Z CDFP4-F28 28 Flat package 1.2.3

    12、 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88525 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 3 DSCC

    13、FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) -0.3 V dc to +6.25 V dc Storage temperature range -65C to +150C Maximum power dissipation (PD) 1.0 W Lead temperature (soldering, 10 seconds) . +300C Junction temperature (TJ) 2/ . +175C Thermal resistance, junction-to-case

    14、 (JC) See MIL-STD-1835 Input voltage range (VIL, VIH) -0.3 V dc to +6.25 V dc Data retention . 10 years (minimum) Endurance: Types 01-04, 06, 07, 09-12, 14, 15 10,000 cycles/byte (minimum) Types 05, 08, 13 ,16 . 100,000 cycles/byte (minimum) Chip clear voltage (VH) . 15.0 V dc 1.4 Recommended operat

    15、ing conditions. 1/ Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Case operating temperature range (TC) . -55C to +125C Input voltage, low range (VIL) . -0.1 V dc to +0.8 V dc Input voltage, high range (VIH) +2.0 V dc to VCC+0.3 V dc 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards

    16、, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated

    17、 Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK

    18、-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict betwee

    19、n the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements

    20、shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certifica

    21、tion to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These

    22、 modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 1/ All voltages are referenced to VSS(g

    23、round). 2/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWIN

    24、G SIZE A 5962-88525 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 4 DSCC FORM 2234 APR 97 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline(s)

    25、. The case outline(s) shall be in accordance with 1.2.2 herein and on figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Truth table(s). See 3.2.3.1 and 3.2.3.2 3.2.3.1 Unprogrammed or erased devices. The truth table for unprogrammed devices shall

    26、 be as specified on figure 3. 3.2.3.2 Programmed devices. The requirements for supplying programmed devices are not part of this drawing. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall ap

    27、ply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, append

    28、ix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 C

    29、ertification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow optio

    30、n is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved sour

    31、ce of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered t

    32、o this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manu

    33、facturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Processing EEPROMS. All testing requirements and quality assurance provisions herein shall be satisfied by the manufacturer prior to delivery. 3.10.1 E

    34、rasure of EEPROMS. When specified, devices shall be erased in accordance with the procedures and characteristics specified in 4.4.3. 3.10.2 Programmability of EEPROMS. When specified, devices shall be programmed to the specified pattern using the procedures and characteristics specified in 4.4.2. So

    35、ftware data protect procedures shall be as specified in 4.4.5. 3.10.3 Verification of erasure or programmability of EPROMS. When specified, devices shall be verified as either programmed to the specified pattern or erased. As a minimum, verification shall consist of reading the device per the proced

    36、ures and characteristics specified in 4.4.4. Any bit that does not verify to be in the proper state shall constitute a device failure, and shall be removed from the lot. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SI

    37、ZE A 5962-88525 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions Group A Device Limits Unit -55C TC+125C subgroups types VSS= 0 V, 4.5 V VCC 5.5 V Min Max unless otherwise specified

    38、1/ Supply current ICC1 CE = OE = VIL, WE = VIH 1,2,3 All 80 mA (active) all I/Os = 0 mA, Inputs = VCC= 5.5 V, f = 1/tAVAV (minimum) Supply current ICC2CE = VIH, OE = VIL 1,2,3 All 3 mA (TTL standby) all I/Os = 0 mA Inputs = VCC-0.3 V Supply current ICC3CE = VCC-0.3 V 1,2,3 All 350 A (CMOS standby) a

    39、ll I/Os = 0 mA, Inputs = VILto VCC-0.3 V Input leakage (high) IIHVIN= 5.5 V 1,2,3 All -10 10 A Input leakage (low) IILVIN= 0.1 V 1,2,3 All -10 10 A Output leakage (high) IOHZ2/ VOUT= 5.5 V, CE = VIH 1,2,3 All -10 10 A Output leakage (low) IOLZ2/ VOUT= 0.1 V, CE = VIH 1,2,3 All -10 10 A Input voltage

    40、 low VIL 1,2,3 All -0.1 0.8 V Input voltage high VIH 1,2,3 All 2.0 VCC V + 0.3V Output voltage low VOLIOL= 2.1 mA, VIH= 2.0 V 1,2,3 All 0.45 V VCC= 4.5 V, VIL= 0.8 V Output voltage high VOHIOH= -400 A, VIH= 2.0 V 1,2,3 All 2.4 V VCC= 4.5 V, VIL= 0.8 V OE high leakage IOEVH= 13 V 1,2,3 All -10 100 A

    41、(chip erase) See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-88525 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electr

    42、ical performance characteristics - Continued. Test Symbol Conditions Group A Device Limits Unit -55C TC+125C subgroups types VSS= 0 V, 4.5 V VCC 5.5 V Min Max unless otherwise specified 1/ Input capacitance CI3/ 4/ VIN= 0 V, VCC= 5.0 V 4 All 10 pF TA= +25C, f = 1 MHz See 4.3.1c Output capacitance CO

    43、3/ 4/ VOUT= 0 V, VCC= 5.0 V 4 All 10 pF TA= +25C, f = 1 MHz See 4.3.1c 01,09 350 Read cycle time tAVAV5/ See figure 4 9,10,11 02,10 300 ns 03,05,11,13 250 04,12 200 06-08,14-16 150 01,09 350 Address access time tAVQV5/ 9,10,11 02,10 300 ns 03,05,11,13 250 04,12 200 06-08,14-16 150 01,09 350 Chip ena

    44、ble access tELQV5/ 9,10,11 02,10 300 ns time 03,05,11,13 250 04,12 200 06-08,14-16 150 01-03,05 Output enable access tOLQV5/ 9,10,11 09-11,13 100 ns time 04,06,07,08 12,14,15,16 80 Chip enable to output tELQX4/ 9,10,11 All 10 ns in low Z 5/ Chip disable to tEHQZ4/ 9,10,11 01,02,09,10 80 ns output in high Z 5/


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