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    DLA SMD-5962-87717 REV B-2002 MICROCIRCUIT LINEAR 16-CHANNEL JFET ANALOG MULTIPLEXER MONOLITHIC SILICON《硅单块 结型场效应晶体管模拟多路复用器 16沟道直线型微型电路》.pdf

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    DLA SMD-5962-87717 REV B-2002 MICROCIRCUIT LINEAR 16-CHANNEL JFET ANALOG MULTIPLEXER MONOLITHIC SILICON《硅单块 结型场效应晶体管模拟多路复用器 16沟道直线型微型电路》.pdf

    1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Drawing updated to reflect current requirements. Editorial changes throughout. drw 00-12-13 Raymond Monnin B Corrected paragraph 1.2.1. Editorial changes throughout. drw 02-12-11 Raymond Monnin The original first page of this drawing has been rep

    2、laced. REV SHET REV SHET REV STATUS REV B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Marcia B. Kelleher DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Wm. J. Johnson COLUMBUS, OHIO 43216 http:/www.dscc.dla.mil THIS DRAWING IS AVAILA

    3、BLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, LINEAR, 16-CHANNEL JFET ANALOG MULTIPLEXER, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 88-12-08 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-87717 SHEET 1 OF 12 DSCC FORM 2233 AP

    4、R 97 5962-E119-03 DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87717 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-500

    5、0 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the follo

    6、wing example: 5962-87717 01 X A Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type. The device type identify the circuit function as follows: Device type Generic number Circuit function 01 MUX-16A 16-channel JFET analog multiplexer (overvoltage

    7、protected)02 MUX-16B 16-channel JFET analog multiplexer (overvoltage protected)1.2.2 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X GDIP1-T28 or CDIP2-T28 28 Dual-in-line 3 CQCC1-N28 28 Square leadles

    8、s chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Positive supply voltage (VCC). +18 V dc Negative supply voltage (VEE). -18 V dc Logic input voltage (-4 V or VEE) to VCCAnalog input voltage VEE- 20 V to VCC+ 20 V Maximum cu

    9、rrent through any pin 25 mA Storage temperature range. -65C to +150C Power dissipation (PD) 1/ 1.2 mW Lead temperature (soldering, 60 seconds). 300C Junction temperature (TJ). 150C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Thermal resistance, junction-to-case (JA): Case X. 55C/W C

    10、ase 2 . 108C/W 1.4 Recommended operating conditions. Positive supply voltage (VCC). +15 V dc Negative supply voltage (VEE). -15 V dc Ambient operating temperature range (TA) -55C to +125C Digital “1” input voltage (VIH) . 2.0 V min Digital “0” input voltage (VIL) 0.8 V max Analog voltage range (VA).

    11、 10 V max 1/ Derate above +75C, 16 mW/C. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87717 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 2. APPLIC

    12、ABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the issue of the Department of Defens

    13、e Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the solicitation. SPECIFICATION DEPARTMENT OF DEFENSE MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. STANDARDS DEPARTMENT OF DEFENSE MIL-STD-883 - Test Method Standard Microcircuits. MIL

    14、-STD-1835 - Interface Standard Electronic Component Case Outlines. HANDBOOKS DEPARTMENT OF DEFENSE MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Unless otherwise indicated, copies of the specification, standards, and handbooks are available fr

    15、om the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, howeve

    16、r, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this

    17、drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activit

    18、y approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein.

    19、 A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case

    20、 outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure

    21、3. 3.2.5 Switching time waveforms. The switching time waveforms shall be as specified on figure 7. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87717 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-500

    22、0 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TA +125C VCC= +15 V, VEE= -15 V Group A subgroups Device type Limits Unit unless otherwise specified Min Max Positive supply current ICC1 All 19 mA 2, 3 24 Negative supply cu

    23、rrent IEE1 All -7.0 mA 2, 3 -8.2 “ON” resistance RON-10 V VSOURCE +10 V, 1 01 380 ISOURCE 200 A 2,3 500 1 02 580 2, 3 800 “ON” resistance change with RON/ -10 V VSOURCE +10 V, 1, 2 All 5 % change in source voltage VSOURCEISOURCE= 200 A 1/ 3 7 RONMATCH RONVSOURCE= 0 V, 1, 2 01 15 % between switches M

    24、ATCH ISOURCE= 200 A 1/, 2/ 3 18 1, 2 02 20 3 23 Digital input current IINVIN= 0.4 V to 15 V 1 All 10 A 2, 3 20 Digital “0” enable current IIN(EN)VIN(EN)= 0.4 V 1 All 10 A 2, 3 20 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from

    25、IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87717 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - continued. Test Symbol Conditions -55C TA +125C VCC= +15 V, VEE= -15 V Group A subgroups D

    26、evice type Limits Unit unless otherwise specified Min Max Source current ISOURCE VSOURCE= 10 V VIL= 0.8 V 1, 3 01 1 nA (Switch “OFF”) (OFF) VDRAIN= -10 V VIL= 0.7 V 2 25 3/ VIL= 0.8V 1, 3 02 2 VIL= 0.7 V 2 50 Drain current IDRAIN VSOURCE= 10 V VIL= 0.8V 1, 3 01 1 nA (Switch “OFF”) (OFF) VDRAIN= -10

    27、V VIL= 0.7 V 2 75 3/ VIL= 0.8 V 1, 3 02 2 VIL= 0.7 V 2 250 Leakage current IDRAIN(ON)+ VIH= 2 V, 1, 3 01 1 nA (Switch “ON”) ISOURCE(ON) VSOURCE= VDRAIN= +10 V 2 75 3/ 1, 3 02 2 2 250 Analog voltage range VA 1/ 1, 2, 3 All 10 V Digital “0” input voltage VIL1/ 1, 3 All 0.8 V 2 0.7 Digital “1” input vo

    28、ltage VIH1/ 1, 2, 3 All 2.0 V Functional tests 4/ See 4.3.1c 1, 2, 3 All Switching time tPHL, tPLH VS1= +10 V, VS16= -10 V, RL= 10 M, CL= 10 pF 9 All 2.0 s See figures 4 and 7 10, 11 1/ 3.5 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without li

    29、cense from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87717 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - continued. Test Symbol Conditions -55C TA +125C VCC= +15 V, VEE= -15 V Group A

    30、subgroups Device type Limits Unit unless otherwise specified Min Max Enable delay “ON” tON(EN) VS1= -1.0 V, CL= 10 pF, 9 All 2.0 s RL= 1 k, 10, 11 1/ 3.0 Enable delay “OFF” tOFF(EN) See figures 5 and 7 9 All 0.5 10, 11 1/ 1.0 Break-before-make delay tOPENVS1= VS16= -1V, TA= 25C See figures 6 and 7 9

    31、 All 2.0 s 1/ Guaranteed, if not tested, to the specified limits. 2/ RONmatch specified as a percentage of RAVERAGEwhere: 1 N RAVERAGE= N Riwith N = number of channels, Ri= each channels “ON” resistance. i = 1 3/ Conditions applied to leakage tests insure worst case leakages. 4/ Verified by leakage

    32、tests. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be

    33、the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked as liste

    34、d in MIL-HDBK-103 (see 6.6 herein). For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-J

    35、AN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be requir

    36、ed from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appe

    37、ndix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required in acc

    38、ordance with MIL-PRF-38535, appendix A. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provi

    39、ded by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87717 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 Device type 01 and 03 Case outline X and 3 Terminal num

    40、ber Terminal symbol 1 VCC 2 NC 3 NC 4 S16 5 S15 6 S14 7 S13 8 S12 9 S11 10 S10 11 S9 12 GND 13 NC 14 A315 A216 A117 A0 18 ENABLE 19 S1 20 S2 21 S3 22 S4 23 S5 24 S6 25 S7 26 S8 27 VEE28 DRAINFIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without

    41、license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87717 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 A3A2A1A0ENABLE “ON” Channel X X X X L NONE L L L L H 1 L L L H H 2 L L H L H 3 L L H H H 4 L H L L H 5 L H L H H 6 L H H L H 7

    42、L H H H H 8 H L L L H 9 H L L H H 10 H L H L H 11 H L H H H 12 H H L L H 13 H H L H H 14 H H H L H 15 H H H H H 16 FIGURE 2. Truth table. FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 59

    43、62-87717 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 9 DSCC FORM 2234 APR 97 FIGURE 4. Switching time test circuit. FIGURE 5. Enable delay time test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD

    44、 MICROCIRCUIT DRAWING SIZE A 5962-87717 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 10 DSCC FORM 2234 APR 97 FIGURE 6. Break-before-make test circuit. FIGURE 7. Switching time waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without

    45、license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87717 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 11 DSCC FORM 2234 APR 97 4. QUALITY ASSURANCE PROVISIONS 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MI

    46、L-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B

    47、, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance w

    48、ith the intent specified in test method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. TABLE II. Electrical test requirements. MIL-STD-883 test requirements Subgroups (in accordance with MIL-STD-883, method 5005, table I) Interim electrical parameters (method 5004) 1 Final electrical te


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