1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add vendor CAGE 92527. Page 5: Changes to electrical in table I. Editorial changes throughout. 88-03-28 Michael A. Frye B Add vendor CAGE 75569 for device type 01. Add device type 02. Delete vendor CAGE 92527. Add case outline S for device types
2、01 and 02. Editorial changes throughout. Technical changes in figure 2. 89-01-03 Michael A. Frye C Technical changes in table I. Add vendor CAGE 27014 and 9Z527 for device type 01. Add vendor CAGE 75569 for device type 02 and 01SX. Editorial changes throughout. - mbk 89-11-29 Michael A. Frye D Updat
3、e the boilerplate to current requirements as specified in MIL-PRF-38535. Editorial changes throughout. jak 06-07-11 Thomas M. Hess E Correct test condition for total supply current (ICCT) and add footnote 5/ in table I. Update boilerplate paragraphs as specified in current requirements of MIL-PRF-38
4、535. MAA. 09-12-24 Thomas M. Hess REV SHET REV SHET REV STATUS REV E E E E E E E E E E E OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Marcia B. Kelleher DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Raymond Mo
5、nnin THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, FAST CMOS, OCTAL NONINVERTING D-TYPE FLIP-FLOP WITH THREE-STATE OUTPUTS AND TTL COMPATIBLE INPUTS, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 87-11-30
6、AMSC N/A REVISION LEVEL E SIZE A CAGE CODE 67268 5962-87628 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E128-10 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87628 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO
7、 43218-3990 REVISION LEVEL E SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in
8、 the following example: 5962-87628 01 R ADrawing number Device type (see 1.2.1) Case outline(see 1.2.2)Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54FCT374 Octal non-inverting D-type flip-flop
9、 with three-state outputs, TTL compatible inputs 02 54FCT374A Octal non-inverting D-type flip-flop with three-state outputs, TTL compatible inputs 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package styl
10、e R GDIP1-T20 or CDIP2-T20 20 Dual-in-line S GDFP2-F20 or CDFP3-F20 20 Flat pack 2 CQCC1-N20 20 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) . -0.5 V dc to +6.0 V dc DC input
11、voltage range (VIN) . -0.5 V dc to VCC + 0.5 V dc DC output voltage range (VOUT) -0.5 V dc to VCC+ 0.5 V dc DC input diode current (IIK) . -20 mA DC output diode current (IOK) -50 mA DC output current (IOUT) 100 mA Maximum power dissipation (PD) 2/ 500 mW Thermal resistance, junction-to-case (JC) Se
12、e MIL-STD-1835 Storage temperature range (TSTG) -65C to +150C Junction temperature (TJ) . +175C Lead temperature (soldering, 10 seconds) . +300C 1.4 Recommended operating conditions. 1/ Supply voltage range (VCC) . +4.5 V dc to +5.5 V dc Maximum low level input voltage (VIL). 0.8 V Minimum high leve
13、l input voltage (VIH) 2.0 V Case operating temperature range (TC) -55C to +125C Minimum setup time, Dn to CP (ts) 2.5 ns Minimum hold time, Dn to CP (th) 2.5 ns Minimum clock pulse width (tw) . 7.0 ns 1/ Unless other wise specified, all voltages are referenced to ground. 2/ Must withstand the added
14、PDdue to short circuit test; e.g., IOS. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87628 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 3 DSCC FORM 2234 APR 97 2. APPLICA
15、BLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMEN
16、T OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-10
17、3 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Or
18、der of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1
19、Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manu
20、facturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may
21、make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow opt
22、ion is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal c
23、onnections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on
24、figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87628 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 4 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristi
25、cs. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrica
26、l tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number i
27、s not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” sha
28、ll be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103
29、(see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conforma
30、nce as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the a
31、cquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STAN
32、DARD MICROCIRCUIT DRAWING SIZE A 5962-87628 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC+125C VCC= 5.0 V dc 10%VCCDevicetype Group A subgroups Limits Unit unless
33、 otherwise specified Min Max High level output voltage VOHVIL= 0.8 V VIH= 2.0 V IOH= -300 A 4.5 V All 1, 2, 3 4.3 V IOH= -12 mA 2.4 Low level output voltage VOLVIL= 0.8 V VIH= 2.0 V IOL= +300 A 4.5 V All 1, 2, 3 0.2 V IOL= +32 mA 0.5 Input clamp voltage VIKIIN= -18 mA 4.5 V All 1, 2, 3 -1.2 V High l
34、evel input current IIHVIN= 5.5 V 5.5 V All 1, 2, 3 5.0 A Low level input current IILVIN= GND 5.5 V All 1, 2, 3 -5.0 A High impedance output current IOZHVIN= 5.5 V 5.5 V All 1, 2, 3 10.0 A IOZLVIN= GND 5.5 V All 1, 2, 3 -10.0 A Short circuit output current IOS1/ VOUT= GND 5.5 V All 1, 2, 3 -60 mA Qui
35、escent power supply current (CMOS inputs) ICCQVIN 0.2 V or VIN 5.3 V fi= 0 MHz 5.5 V All 1, 2, 3 1.5 mA Quiescent power supply current (TTL inputs) ICC2/ VIN= 3.4 V 5.5 V All 1, 2, 3 2.0 mA Dynamic power supply current ICCDOutputs open, OEnullnullnullnull= GND One bit toggling, 50% duty cycle VIN 0.
36、2 V or VIN 5.3 V 5.5 V All 3/ 0.4 mA/ MHz Total power supply current ICC4/ 5/ VIN 0.2 V or VIN 5.3 V fCP= 10 MHz Outputs open, OEnullnullnullnull= GND One bit toggling at fi= 5 MHz 50% duty cycle 5.5 V All 1, 2, 3 5.5 mA VIN= 3.4 V or VIN= GND fCP= 10 MHz Outputs open,OEnullnullnullnull= GND Eight b
37、its toggling at fi= 2.5 MHz 50% duty cycle 5.5 V All 1, 2, 3 6.0 mA See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87628 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-399
38、0 REVISION LEVEL E SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions -55C TC+125C VCC= 5.0 V dc 10%VCCDevicetype Group A subgroups Limits Unit unless otherwise specified Min Max Input capacitance CINSee 4.3.1c All 4 10 pF Input capacitanc
39、e COUTSee 4.3.1c All 4 12 pF Functional tests See 4.3.1d 4.5 V All 7, 8 Propagation delay time, CP to Qn tPHL, tPLH6/ CL= 50 pF RL= 500 See figure 4 4.5 V 01 9, 10, 11 2.0 11.0 ns 02 9, 10, 11 2.0 7.2 Propagation delay time, output enable, OEnullnullnullnullto Qn tPZH, tPZL6/ 4.5 V 01 9, 10, 11 1.5
40、14.0 ns 02 9, 10, 11 1.5 7.5 Propagation delay time, output disable, OEnullnullnullnullto Qn tPHZ, tPLZ6/ 4.5 V 01 9, 10, 11 1.5 8.0 ns 02 9, 10, 11 1.5 6.5 1/ Not more than one output should be shorted at one time, and the duration of the short circuit condition should not exceed 1 second. 2/ For T
41、TL driven inputs, VIN= 3.4 V; all other inputs are equal to VCCor GND. 3/ This parameter is not directly testable, but is derived for use in total power supply calculations. 4/ ICC= ICCQ + (ICC DHNT) + ICCD(fCP/2 + fiNi), where: DH= duty cycle for TTL input high; NT= number of TTL inputs at DH; fi=
42、input frequency in MHz; Ni= number of inputs at fi; fCP= clock frequency in MHz. 5/ For total current supply (ICCT) test in an ATE environment, the effect of parasitic output capacitive loading from the test environment must be taken into account, as its effect is not intended to be included in the
43、test results. The impact must be characterized and appropriate offset factors must be applied to the test result. 6/ The minimum limits are guaranteed; if not tested, to the specified limits in table I . Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-
44、,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87628 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 7 DSCC FORM 2234 APR 97 Device types 01 and 02 Case outlines R, S, and 2 Terminal number Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 OEnullnullnull
45、nullQ0D0D1Q1Q2D2D3Q3GND CP Q4D4D5Q5Q6D6D7Q7VCCFIGURE 1. Terminal connections. Function Inputs Outputs High-Z OEnullnullnullnullCP Dn Qn H L X Z H H X Z Load register L L L L H H H L Z H H Z L = Low voltage level H = High voltage level Z = High impedance X = Dont care = Low-to-high transition of the
46、clock FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87628 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 8 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagr
47、am. FIGURE 4. Switching waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87628 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 9 DSCC FORM 2234 APR 9
48、7 NOTES: 1. When measuring tPLH, tPHL, tPZH, and tPHZ: S1 = Open. When measuring tPLZand tPZL: S1 = Closed. 2. RL= 500 or equivalent. 3. RT= 50 or equivalent, terminal resistance which should be equal to ZOUTof the pulse generator. 4. CL= 50 pF or equivalent (includes test jig and probe capacitance). 5. Diagram shown for input control enable-low and input control disable-high. 6. Pulse generator for all pulses: tr 2.5 ns; tf 2.5 ns. FIGURE 4. Switching waveforms and test circuit Continu
