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    DLA SMD-5962-87596 REV C-2005 MICROCIRCUIT LINEAR QUAD DIFFERENTIAL LINE RECEIVER MONOLITHIC SILICON《硅单块 四列差异线接收器 直线型微型电路》.pdf

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    DLA SMD-5962-87596 REV C-2005 MICROCIRCUIT LINEAR QUAD DIFFERENTIAL LINE RECEIVER MONOLITHIC SILICON《硅单块 四列差异线接收器 直线型微型电路》.pdf

    1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Change VOHand VOLtest conditions. Change IILtest limit. Change figure 1. Change tSKEWtest condition. Change CAGE code to 67268. Delete footnotes 4/ and 5/ from table I and apply the information to the applicable test conditions. Delete the block

    2、diagram from figure 2 and 3.2.2. Editorial changes throughout. 89-09-12 M. Frye B Changes in accordance with NOR 5962-R214-92. 92-05-15 M. Frye C Update drawing to current requirements. Editorial changes throughout. drw 05-03-10 Raymond Monnin CURRENT CAGE CODE 67268 THE FIRST SHEET OF THIS DRAWING

    3、HAS BEEN REPLACED REV SHET REV SHET REV STATUS REV C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Joseph A. Kerby DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Charles E. Besore COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWIN

    4、G IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY M. Frye MICROCIRCUIT, LINEAR, QUAD DIFFERENTIAL AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 87-06-01 LINE RECEIVER, MONOLITHIC SILICON AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 14933 5962-87596 SHEET 1 OF 11 DSCC FORM 2233 AP

    5、R 97 5962-E218-05 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87596 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing

    6、 describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-87596 01 E A Drawing number Device type (see 1.2.1) Case outli

    7、ne(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type. The device type identifies the circuit function as follows: Device type Generic number Circuit function 01 26LS34 Quad differential line receiver 1.2.2 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline le

    8、tter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 dual-in-line F GDFP2-F16 or CDFP3-F16 16 flat pack 2 CQCC1-N20 20 square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage

    9、 range. -0.5 V to +7.0 V Enable voltage range -1.5 V to +7.0 V Common mode voltage (VCM) 25 V Differential input voltage (VID) 30 V Output sink current (IO) 50 mA Storage temperature range . -65C to +165C Maximum power dissipation (PD) 1/. 400 mW Lead temperature (soldering, 10 seconds) +300C Therma

    10、l resistance, junction-to-case (JC) See MIL-STD-1835 Thermal resistance, junction-to-ambient (JA): Case E. 80C/W Case F. 65C/W Case 2 . 70C/W Junction temperature (TJ) . +150C 1.4 Recommended operating conditions. Supply voltage (VCC) . 4.5 V to 5.5 V ENABLE high level input voltage (VIH). 2.0 V ENA

    11、BLE low level input voltage (VIL) 0.8 V Ambient temperature range (TA) . -55C to +125C 1/ Must withstand the added PDdue to short circuit test; e.g., IOS. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87596

    12、 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. U

    13、nless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuit

    14、s. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or

    15、http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. N

    16、othing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified

    17、 herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved prog

    18、ram plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affe

    19、ct the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, ap

    20、pendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Switching test circuit. The switching test circuit shall be as specified on figure 2. 3.2.4 Switching wa

    21、veforms. The switching waveforms shall be as specified on figure 3. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical

    22、test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 59

    23、62-87596 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max Differential input volta

    24、ge VTHVOUT= VOLor VOH0 V VCM +5 V 1, 2, 3 01 100 mV 1/ -7 V VCM +12 V 200 -15 V VCM +15 V 400 Input resistance RIN-15 V VCM +15 V 2/ (one input ac GND) 1, 2, 3 01 12 40 k Input current IINVIN= +12 V 1, 2, 3 01 +1.0 mA VIN= -7 V -0.8 High level output voltage VOHVCC= 4.5 V, VIN= +1.0 V IOH= -12 mA 1,

    25、 2, 3 01 +2.0 V V ENABLE = 0.8 V IOH= -1 mA +2.4 Low level output voltage VOLVCC= 4.5 V, VIN= -1.0 V IOL= 16 mA 1, 2, 3 01 +0.4 V V ENABLE = 0.8 V IOL= 24 mA +0.5 Enable clamp voltage VICIIN= -18 mA, VCC= 4.5 V 1, 2, 3 01 -1.5 V Off-state (high impedance) IOVCC= 5.5 V VOUT= 2.4 V 1, 2, 3 01 +50 A ou

    26、tput current VOUT= 0.4 V -50 ENABLE level input current IIH1VCC= 5.5 V, VIN= 2.7 V 1, 2, 3 01 +20 A ENABLE level input current IILVCC= 5.5 V, VIN= 0.4 V 1, 2, 3 01 -0.20 mA ENABLE level input current IIH2VCC= 5.5 V, VIN= 5.5 V 1, 2, 3 01 +100 A Output short circuit current 3/ IOSVCC= 5.5 V, VOUT= 0

    27、V, VIN= +1.0 V 1, 2, 3 01 -30 -120 mA Supply current ICCAll VIN= GND, VCC= 5.5 V, outputs disabled 1, 2, 3 01 +70 mA Input hysteresis VHYSTVCC= 5.0 V 1, 2, 3 01 +90 +300 mV Open circuit input voltage VIOC1, 2, 3 01 +2.0 +3.0 V Functional testing See 4.3.1c 7, 8 01 See footnotes at end of table. Prov

    28、ided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87596 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - cont

    29、inued. Test Symbol Conditions -55C TA +125C Group A subgroups Device type Limits Unit unless otherwise specified Min Max Propagation delay from input to tPLHCL= 50 pF, RL1= 1 k, TA= +25C, VCC= 5.0 V 9 01 24 ns output RL2= 280, see figures 2 and 3 VCC= 4.5 V to 5.0 V 9, 10, 11 30 Propagation delay fr

    30、om input to tPHLTA= +25C, VCC= 5.0 V 9 24 output VCC= 4.5 V to 5.0 V 9, 10, 11 30 Propagation delay from ENABLE to tPZHTA= +25C, VCC= 5.0 V 9 16 output VCC= 4.5 V to 5.0 V 9, 10, 11 22 Propagation delay from ENABLE to tPZLTA= +25C, VCC= 5.0 V 9 22 output VCC= 4.5 V to 5.0 V 9, 10, 11 33 Propagation

    31、delay from ENABLE to tPHZCL= 5 pF, RL1= 1 k, TA= +25C, VCC= 5.0 V 9 01 18 ns output RL2= 280, see figures 2 and 3 VCC= 4.5 V to 5.0 V 9, 10, 11 27 Propagation delay from ENABLE to tPLZTA= +25C, VCC= 5.0 V 9 18 output VCC= 4.5 V to 5.0 V 9, 10, 11 27 Propagation delay SKEW tSKEW| tPLH tPHL| TA= +25C,

    32、 VCC= 5.0 V 9 01 4 ns CC= 4.5 V to 5.0 V 9, 10, 11 5 Propagation delay from ENABLE to tPZHCL= 50 pF, RL1= 1 k, TA= +25C, VCC= 5.0 V 9 01 26 ns output RL2= 280, see figures 2 and 3 VCC= 4.5 V to 5.0 V 9, 10, 11 39 Propagation delay from ENABLE to tPZLTA= +25C, VCC= 5.0 V 9 33 output VCC= 4.5 V to 5.0

    33、 V 9, 10, 11 49 Propagation delay from ENABLE to tPHZCL= 5 pF, RL1= 1 k, TA= +25C, VCC= 5.0 V 9 01 20 ns output RL2= 280, see figures 2 and 3 VCC= 4.5 V to 5.0 V 9, 10, 11 30 Propagation delay from ENABLE to tPLZTA= +25C, VCC= 5.0 V 9 20 output VCC= 4.5 V to 5.0 V 9, 10, 11 30 1/ Input voltage is no

    34、t tested directly due to tester accuracy limitations but is tester correlated. 2/ RINis not directly tested but is correlated. 3/ Not more than one output should be shorted at a time. Duration of short circuit test should not exceed one second.Provided by IHSNot for ResaleNo reproduction or networki

    35、ng permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87596 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 Device type 01 Case outlines E and F 2 Terminal number Terminal symbol 1 INPUT A- NC 2 INPUT A+ INPUT A- 3

    36、 OUTPUT A INPUT A+ 4 ENABLE OUTPUT A 5 OUTPUT C ENABLE 6 INPUT C+ NC 7 INPUT C- OUTPUT C 8 GND INPUT C+ 9 INPUT D- INPUT C- 10 INPUT D+ GND 11 OUTPUT D NC 12 ENABLE INPUT D- 13 OUTPUT B INPUT D+ 14 INPUT B+ OUTPUT D 15 INPUT B- ENABLE 16 VCCNC 17 - - - OUTPUT B 18 - - - INPUT B+ 19 - - - INPUT B- 20

    37、 - - - VCCFIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87596 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 Switch m

    38、atrix Parameter SW1 SW2 tPLHClosed Closed tPHLClosed Closed tPZLClosed Open tPZHOpen Closed tPLZClosed Closed tPHZClosed Closed FIGURE 2. Switching test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 596

    39、2-87596 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 8 DSCC FORM 2234 APR 97 FIGURE 3. Switching waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87596 DEFENSE SUP

    40、PLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 9 DSCC FORM 2234 APR 97 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages whe

    41、re marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, app

    42、endix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an a

    43、pproved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate

    44、of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification

    45、 and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and ins

    46、pection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, me

    47、thod 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and

    48、power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,


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