欢迎来到麦多课文档分享! | 帮助中心 海量文档,免费浏览,给你所需,享你所想!
麦多课文档分享
全部分类
  • 标准规范>
  • 教学课件>
  • 考试资料>
  • 办公文档>
  • 学术论文>
  • 行业资料>
  • 易语言源码>
  • ImageVerifierCode 换一换
    首页 麦多课文档分享 > 资源分类 > PDF文档下载
    分享到微信 分享到微博 分享到QQ空间

    DLA SMD-5962-85511 REV D-2005 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED SCHOTTKY TTL BUS TRANSCEIVERS WITH THREE-STATE OUTPUTS MONOLITHIC SILICON《硅单块 带三态输出总线接收器晶体管-晶体管逻辑电路 高级肖脱基 双极数字微型.pdf

    • 资源ID:698801       资源大小:91.96KB        全文页数:13页
    • 资源格式: PDF        下载积分:10000积分
    快捷下载 游客一键下载
    账号登录下载
    微信登录下载
    二维码
    微信扫一扫登录
    下载资源需要10000积分(如需开发票,请勿充值!)
    邮箱/手机:
    温馨提示:
    如需开发票,请勿充值!快捷下载时,用户名和密码都是您填写的邮箱或者手机号,方便查询和重复下载(系统自动生成)。
    如需开发票,请勿充值!如填写123,账号就是123,密码也是123。
    支付方式: 支付宝扫码支付    微信扫码支付   
    验证码:   换一换

    加入VIP,交流精品资源
     
    账号:
    密码:
    验证码:   换一换
      忘记密码?
        
    友情提示
    2、PDF文件下载后,可能会被浏览器默认打开,此种情况可以点击浏览器菜单,保存网页到桌面,就可以正常下载了。
    3、本站不支持迅雷下载,请使用电脑自带的IE浏览器,或者360浏览器、谷歌浏览器下载即可。
    4、本站资源下载后的文档和图纸-无水印,预览文档经过压缩,下载后原文更清晰。
    5、试题试卷类文档,如果标题没有明确说明有答案则都视为没有答案,请知晓。

    DLA SMD-5962-85511 REV D-2005 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED SCHOTTKY TTL BUS TRANSCEIVERS WITH THREE-STATE OUTPUTS MONOLITHIC SILICON《硅单块 带三态输出总线接收器晶体管-晶体管逻辑电路 高级肖脱基 双极数字微型.pdf

    1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Change to Military Drawing format. Change part number 02 package for vendor 18324. Inactivate device 01, all packages, for new design. Remove minimum values from table I ac tests. Change PDto 787mW. Change code ident. no. to 67268. 88-01-11 M. A.

    2、 Frye B Change PDto 786.5 mW. Add vendor CAGE 01295. Add figure 4, switching waveforms and test circuit. Add minimum limits to electrical parameters. Correct IOS. Editorial changes throughout. Change Table II to include additional tests to final electricals and group A. 89-01-06 M. A. Frye C Update

    3、to reflect latest changes in format and requirements. Editorial changes throughout. - les 02-02-20 Raymond Monnin D Change 3.5 marking paragraph to remove “5962-“. Update boilerplate to MIL-PRF-38535 requirements. - CFS 05-08-17 Thomas M. Hess Current CAGE code is 67268 The original first sheet of t

    4、his drawing has been replaced. REV SHET REV SHET REV STATUS REV D D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Christopher A. Rauch DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Raymond Monnin COLUMBUS, OHIO 43218-3990 http:/www.dscc

    5、.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, BIPOLAR, ADVANCED SCHOTTKY, TTL, BUS TRANSCEIVERS WITH AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 86-02-26 THREE-STATE OUTPUTS, MONOLITHIC SILICON AMSC N/A REVISION L

    6、EVEL D SIZE A CAGE CODE 14933 85511 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E468-05 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85511 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D

    7、SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 85511

    8、 01 R X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54F245 Octal noninverting bus transceivers, with 3-state outputs 1.2.2 Case o

    9、utlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or GDIP2-T20 20 Dual-in-line S GDFP2-F20 or GDFP3-F20 20 Flat pack 2 CQCC1-N20 20 Square chip carrier 1.2.3 Lead finish. The lead finish is as specif

    10、ied in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage . -0.5 V dc to +7.0 V dc Input voltage range . -1.2 V dc at -18 mA to +7.0 V dc Storage temperature range -65C to +150C Maximum power dissipation (PD) per device 1/. 786.5 mW Lead temperature (soldering, 10 seconds) +300C

    11、 Thermal resistance, junction-to-case (JC). See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc minimum to +5.5 V dc maximum Minimum high level input voltage (VIH). 2.0 V dc Maximum low level input voltage (VIL). 0.8 V dc Case o

    12、perating temperature range (TC) -55C to +125C _ 1/ Maximum power dissipation is defined as VCCx ICC. Must withstand the added PDdue to short circuit test (e.g. IOS). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A

    13、 85511 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified her

    14、ein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microc

    15、ircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearc

    16、h/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precede

    17、nce. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as spe

    18、cified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approve

    19、d program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall no

    20、t affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-385

    21、35, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic dia

    22、gram shall be as specified on figure 3. 3.2.5 Test circuit and switching waveforms. The test circuit and switching waveforms shall be as specified on figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85511

    23、 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating

    24、temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked wi

    25、th the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ o

    26、r “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certi

    27、ficate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-

    28、38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain th

    29、e option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING S

    30、IZE A 85511 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C unless otherwise specified Group A subgroups Device type Limits Unit Min MaxHigh level output volt

    31、age, A0 through A7 VOH1 VCC= 4.5 V, IOH= -3 mA, VIL= 0.8 V, VIH= 2.0 V 1, 2, 3 All 2.4 V High level output voltage, B0 through B7 VOH2 VCC= 4.5 V, IOH= -12 mA, VIL= 0.8 V, VIH= 2.0 V 1, 2, 3 All 2.0 V Low level output voltage B0 through B7 VOL1 VCC= 4.5 V, IOL= 48 mA, VIL= 0.8 V, VIH= 2.0 V 1, 2, 3

    32、All 0.55 V Low level output voltage A0 through A7 VOL2 VCC= 4.5 V, IOL= 20 mA, VIL= 0.8 V, VIH= 2.0 V 1, 2, 3 All 0.5 V Input clamp voltage VI C VCC= 4.5 V, IIH= -18 mA, TC= +25C 1 All -1.2 V High level input current II H1 VCC= 5.5 V, VIN= 2.7 V OE and T/ R only 1, 2, 3 All 40 A II H2 VCC= 5.5 V, VI

    33、N= 5.5 V 1, 2, 3 All 1.0 mA Low level input current IILVCC= 5.5 V, VIN= 0.5 V OE and T/ R only 1, 2, 3 All -1.2 mA Short circuit output current IOS B0 to B7 1, 2, 3 All -100 -325 mA VCC= 5.5 V, VOS= 0.0 V 1/ A0 to A7 1, 2, 3 All -60 -225 mA Low level input, off-state low output current IIOZL VCC= 5.

    34、5 V, OE = 2.0 V, VIOZL= 0.5 V 1, 2, 3 All -1.6 mA High level input, off-state high output current IIOZH VCC= 5.5 V, OE = 2.0 V, VIOZH = 2.7 V 1, 2, 3 All 70 A Supply current ICCH VCC= 5.5 V, VIN= 4.5 V 1, 2, 3 All 114 mA ICCL VCC= 5.5 V, VIN= 0.0 V 1, 2, 3 All 130 mA CCZ VCC= 5.5 V, VIN= 4.5 V 1, 2,

    35、 3 All 143 mA See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85511 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 6 DSCC FORM 2234 APR 97 TABLE I. E

    36、lectrical performance characteristics - Continued. Test Symbol Conditions -55C TC +125C unless otherwise specified Group A subgroups Device type Limits Unit Min MaxPropagation delay time, Bn to An tPLH1 VCC= 5.5 V RL= 500 5% 9, 10, 11 All 1.0 8 ns tPHL1 CL = 50 pF 10% See figure 4 9, 10, 11 All 1.0

    37、8 ns Propagation delay time, An to Bn tPLH2 9, 10, 11 All 1.0 8.5 ns tPHL2 9, 10, 11 All 1.0 8.5 ns Output disable time, OE to An tPLZ1 9, 10, 11 All 1.2 10 ns tPHZ1 9, 10, 11 All 1.7 9 ns Output disable time, OE to Bn tPLZ2 9, 10, 11 All 1.2 10 ns tPHZ2 9, 10, 11 All 1.7 9 ns Output enable time, OE

    38、 to An tPZL1 9, 10, 11 All 2.0 13 ns tPZH1 9, 10, 11 All 2.0 11 ns Output enable time, OE to Bn tPZL2 9, 10, 11 All 2.0 13 ns tPZH2 9, 10, 11 All 2.0 11 ns 1/ Not more than one output will be tested at one time and the duration of the test condition shall not exceed 1 second. Provided by IHSNot for

    39、ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85511 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 Device types 01 01 Case outlines R, S 2 Terminal number Terminal symbols 1 T/

    40、R T/ R 2 A0 A0 3 A1 A1 4 A2 A2 5 A3 A3 6 A4 A4 7 A5 A5 8 A6 A6 9 A7 A7 10 GND GND 11 B7B712 B6 B6 13 B5B514 B4B415 B3B316 B2 B2 17 B1 B1 18 B0 B0 19 OE OE 20 VCC VCC FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STAN

    41、DARD MICROCIRCUIT DRAWING SIZE A 85511 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 8 DSCC FORM 2234 APR 97 Inputs Inputs/outputs OE T/ R An Bn L L A = B Inputs L H Inputs B = A H X (Z) (Z) H = High voltage level L = Low voltage level X = Dont care (Z) = High imped

    42、ance “off“ state FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85511 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 9 DSCC FORM 2234 APR 97 FIGURE 3. Logic

    43、 diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85511 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 10 DSCC FORM 2234 APR 97 Notes: 1. CLincludes probe and jig capacitan

    44、ce. 2. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. 3. All input pulses have the following cha

    45、racteristics; PRR = 1 MHz, tr= tf= 2.5 ns, duty cycle = 50%. 4. When measuring propagation delay times of three-state outputs, switch S1 is open. 5. The outputs are measured one at a time with one transition per measurement. 6. When measuring tPZLand tPLZ, switch S1 is closed. FIGURE 4. Switching wa

    46、veforms and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 85511 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 11 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling

    47、 and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria

    48、 shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, excep


    注意事项

    本文(DLA SMD-5962-85511 REV D-2005 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED SCHOTTKY TTL BUS TRANSCEIVERS WITH THREE-STATE OUTPUTS MONOLITHIC SILICON《硅单块 带三态输出总线接收器晶体管-晶体管逻辑电路 高级肖脱基 双极数字微型.pdf)为本站会员(周芸)主动上传,麦多课文档分享仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文档分享(点击联系客服),我们立即给予删除!




    关于我们 - 网站声明 - 网站地图 - 资源地图 - 友情链接 - 网站客服 - 联系我们

    copyright@ 2008-2019 麦多课文库(www.mydoc123.com)网站版权所有
    备案/许可证编号:苏ICP备17064731号-1 

    收起
    展开