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    DLA SMD-5962-82007 REV D-2012 MICROCIRCUIT MEMORY DIGITAL NMOS 16K (16 384 X 1) BIT STATIC RANDOM ACCESS MEMORY (SRAM) MONOLITHIC SILICON.pdf

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    DLA SMD-5962-82007 REV D-2012 MICROCIRCUIT MEMORY DIGITAL NMOS 16K (16 384 X 1) BIT STATIC RANDOM ACCESS MEMORY (SRAM) MONOLITHIC SILICON.pdf

    1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Remove vendor CAGE number 50088. Add vendor, CAGE number 34355. Device type 01 not available from approved source. Add device type 04. Editorial changes throughout. Convert to military drawing format. Added case X. 87-07-16 M. A. FRYE B Made chan

    2、ges to vendor part numbers. Made changes to table I, table II, 1.2.2, 3.3, 4.2, 4.3, and figures 3 and 4. Editorial changes throughout. Device type 01RX is inactive for new design. Made changes to figure 1. 88-10-07 M. A. FRYE C Boilerplate update, part of 5 year review. ksr 06-04-03 Raymond Monnin

    3、D Updated drawing in accordance with current requirements. glg 12-08-23 Charles Saffle CURRENT CAGE CODE 67268 REV SHEET REV SHEET REV STATUS REV D D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Rick Officer DLA LAND AND MARITIME STANDARD MICROCIRCUIT DRAWING C

    4、HECKED BY Raymond Monnin COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, MEMORY, DIGITAL, NMOS 16K (16,384 X 1) BIT STATIC RANDOM ACCESS MEMORY (SRAM), MONOLITHIC SILICON AND AGENCIES OF THE DE

    5、PARTMENT OF DEFENSE DRAWING APPROVAL DATE 82-09-01 AMSC N/A REVISION LEVEL D SIZE A CAGE CODE 14933 82007 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E455-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 82007 DLA

    6、LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN).

    7、 The complete PIN is as shown in the following example: 82007 01 R A Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit organization Address acce

    8、ss time 01 4167 16,384X1 SRAM 100 ns 02 2167 16,384X1 SRAM 70 ns 03 2167 16,384X1 SRAM 55 ns 04 2167 16,384X1 SRAM 40 ns 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20

    9、 20 dual-in-line package X CQCC3-N20 20 rectangular chip carrier package 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. VCCsupply voltage range . -0.5 V dc to +7.0 V dc Storage temperature range -65C to +150C Maximum power dissipation (

    10、PD) . 1.2 W Lead temperature (soldering, 5 seconds) +300C Thermal resistance (JC) See MIL-STD-1835 Junction temperature (TJ) +175C Output short circuit current . 50 mA 1.4 Recommended operating conditions. Case operating temperature range -55C to +125C Input low voltage (VIL) -2.0 V dc to 0.8 V dc I

    11、nput high voltage (VIH) 2.2 V dc to 6.0 V dc VCCsupply voltage range . 4.5 V dc to 5.5 V dc VSSsupply voltage range . 0 V dc Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 82007 DLA LAND AND MARITIME COLUMBUS, OH

    12、IO 43218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of the

    13、se documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electro

    14、nic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 70

    15、0 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations

    16、unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufa

    17、cturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. T

    18、his QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordan

    19、ce with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Terminal connections. The terminal connections sha

    20、ll be as specified on figure 1. 3.2.2 Truth table. The truth table shall be as specified on figure 2. 3.2.3 Block diagram. The logic diagram shall be as specified on figure 3. 3.2.4 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.3 Electrical performance characteristics.

    21、 Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical t

    22、ests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. Provided by IHSNot for ResaleNo reproduction or networking p

    23、ermitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 82007 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance t

    24、o MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order

    25、to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the

    26、requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime-VA shall be required for

    27、any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at t

    28、he option of the reviewer. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality co

    29、nformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition C or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activi

    30、ty upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein,

    31、except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following addition

    32、al criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups 5 and 6 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroup 4 (CINand COUTmeasurement) shall be measured only for initial qualification and after any process or design

    33、changes which may affect input or output capacitance. Capacitance shall be measured between the designated terminal and GND at a frequency of 1 MHz. Sample size is 15 devices with no failures, and all input and output terminals tested. Provided by IHSNot for ResaleNo reproduction or networking permi

    34、tted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 82007 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Limits Test Symbol Conditions Group A Device Unit -55C TC +125C subgroups types

    35、 Min Max VCC= 4.5 V to 5.5 V VSS= 0 V unless otherwise specified 1/ 2/ VIL= 0.8 V, VIH= 2.2 V Output high voltage VOHIOUT= -4 mA 1,2,3 All 2.4 V VIL= 0.8 V, VIH= 2.2 V Output low voltage VOLIOUT= 5 mA 1,2,3 01, 02, 0.4 V 03 Operating current ICCtRC= tRCmin 1,2,3 All 160 mA Standby current ISBCS = VI

    36、H3/ 1,2,3 All 40 mA Input leakage current IIL 4/ 1,2,3 All 10 uA Output leakage current IOL 5/ 1,2,3 All 50 uA Input capacitance CIN 6/ 7/ 4 All 5 pF Output capacitance COUT 6/ 7/ 4 All 6 pF Read cycle time tRC 8/ 9/ 10/ 9,10,11 01 100 ns 02 70 03 55 04 40 Address access time tAA 8/ 9,10,11 01 100 n

    37、s 02 70 03 55 04 40 Chip select access time tCSA 9,10,11 01 100 ns 02 70 (tACE) 03 55 04 45 Output hold from address change tOH 9,10,11 All 1 ns Chip select to output low Z tLZ 7/ 11/ 9,10,11 All 5 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted

    38、 without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 82007 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Limits Test Symbol Conditions Group A Device Unit -55C TC +125C subgrou

    39、ps types Min Max VCC= 4.5 V to 5.5 V VSS= 0 V unless otherwise specified 1/ 2/ Chip select to output high Z tHZ 7/ 11/ 9,10,11 01,02 0 40 ns 03 0 30 04 0 25 Chip select to power up time tPU 7/ 9,10,11 All 0 ns Chip select to power down tPD 7/ 9,10,11 01 60 ns 02 55 03 40 04 30 Write cycle time tWC 1

    40、2/ 9,10,11 01 100 ns 02 70 03 55 04 40 Chip select to end of write tCW 9,10,11 01 85 ns 02 70 03 50 04 40 Address valid to end of write tAW 9,10,11 01 85 ns 02 70 03 50 04 40 Address setup time WE tAS1 9,10,11 01 10 ns controlled cycle 02,03, 04 5 Address setup time CS tAS2 9,10,11 01 0 ns controlle

    41、d cycle 02,03, 04 5 Write pulse width tWP 9,10,11 01 60 ns 02 40 03 25 04 22 Write recovery tWR 9,10,11 All 0 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 82007 DLA LAND AND MA

    42、RITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Limits Test Symbol Conditions Group A Device Unit -55C TC +125C subgroups types Min Max VCC= 4.5 V to 5.5 V VSS= 0 V unless otherwise specified 1/ 2/ Data valid to end of write tDW 9,10,11 01 45 ns 02 30 03 25 04 15 Data hold time tDH 9,10,11 01,02, 10 ns 03,04 Write enable to output in tWZ 7/ 11/ 9,10,11 01 0 50 ns high Z 02 0 35 03 0 25 04 0 20 Output active from end of tOW 7/ 11/ 9,10,11 All 0 ns write 1/ AC measurements assume tT= 10 ns, levels 0


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