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    DLA SMD-5962-78029 REV H-2005 MICROCIRCUIT DIGITAL CMOS ENCODER- DECODER MONOLITHIC SILICON《硅单片译码器-解码器 氧化物半导体数字微型电路》.pdf

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    DLA SMD-5962-78029 REV H-2005 MICROCIRCUIT DIGITAL CMOS ENCODER- DECODER MONOLITHIC SILICON《硅单片译码器-解码器 氧化物半导体数字微型电路》.pdf

    1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED E Correct errors on figure 1, figure 2, and tables 1 and 2. Convert to military drawing format. Editorial changes throughout. 87-04-10 N. A. Hauck F Changes to table I. Editorial changes throughout. 87-10-13 R. P.Evans G Update boilerplate to MIL-P

    2、RF-38535 requirements. LTG 01-05-14 Charles F. Saffle H Correct marking requirements in 3.5. Update boilerplate in accordance with MIL-PRF-38535 requirements. - PHN. 05-03-17 Thomas M. Hess THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED REV SHEET REV SHEET 15 16 17 REV STATUS REV H G H H

    3、 G G G G G G G G OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY James Nicklaus STANDARD MICROCIRCUIT DRAWING CHECKED BY D. A. DiCenzo DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY N. A

    4、. Hauck AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 79-04-06 MICROCIRCUIT, DIGITAL, CMOS, ENCODER- DECODER, MONOLITHIC SILICON SIZE A CAGE CODE 67268 78029 AMSC N/A REVISION LEVEL H SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E241-05 Provided by IHSNot for ResaleNo reproduction or n

    5、etworking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 78029 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 1 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class

    6、level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 78029 01 J X Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type(s). The device type(

    7、s) identify the circuit function as follows: Device type Generic number Circuit function 01 15530 CMOS manchester encoder-decoder 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style J GDIP1-T24 or

    8、CDIP2-T24 24 Dual-in-line package 3 CQCC1-N28 28 Square chip carrier package X 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage . +7.0 V dc Input or output voltage applied GND 0.3 V dc to VCC +0.3 V dc Thermal resistance, j

    9、unction to case (JC). See MIL-STD-1835 Junction temperature (TJ) +175C Operating temperature range -55C to +125C Storage temperature range . -65C to +150C Maximum power dissipation (PD). 55 mW Lead temperature (soldering, 10 seconds) +300C Provided by IHSNot for ResaleNo reproduction or networking p

    10、ermitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 78029 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions. Supply voltage range (VCC) . 4.5 V to 5.5 V Minimum high level input voltage:

    11、 Logic inputs (VIH) . 70% VCC Clock inputs (VIHC) . VCC 0.5 V Maximum low level input voltage: Logic inputs (VIL) 20% VCC Clock inputs (VILC) GND +0.5 V Case operating temperature (TC) -55C to +125C Encoder/decoder clock rise time (tECR, tDCR) . 8 ns maximum Encoder/decoder clock fall time (tECF, tD

    12、CF) . 8 ns maximum Encoder/decoder clock frequency (fEC, fDC). 0 MHz minimum Send clock frequency (fESC). 0 MHz minimum Encoder/decoder data rate (fED, fDD) 0 MHz minimum Operating supply current (ICCOP) 10 mA (VCC = 5.50 V, f = 1 MHz) Sync transition span (tD2) 18 tDC typical 1/ Short data transiti

    13、on span (tD4) 6 tDC typical Long data transition span (tDS) 12 tDC typical 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the

    14、 issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface St

    15、andard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or f

    16、rom the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) _ 1/ tDC = Decoder clock period = 1/fDC Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 78029 DEFENSE SUP

    17、PLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 4 DSCC FORM 2234 APR 97 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes

    18、applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that i

    19、s produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in

    20、accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML

    21、“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline(s). T

    22、he case outline(s) shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Timing waveforms. The timing waveforms shall be as specified on figure 2. 3.3 Electrical performance characteristics. Unless otherwise specified

    23、herein, the electrical performance characteristics are as specified in table I and shall apply over the full recommended case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each su

    24、bgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be mar

    25、ked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance

    26、 shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL

    27、-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be

    28、 required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the rev

    29、iewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 78029 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics.

    30、 Limits Test Symbol Conditions 1/ -55C TC +125C unless otherwise specified Group A subgroups Device type Min Max Unit Input high voltage VIH 1, 2, 3 All 0.7VCC V Input low voltage VIL 1, 2, 3 All 0.2VCC V Input high clock voltage VIHC 1, 2, 3 All VCC-0.5 V Input low clock voltage VILC 1, 2, 3 All GN

    31、D+0.5 V Input leakage current IIL VIN = 0.0 V or VCC 1, 2, 3 All -1.0 1.0 A High level output voltage VOH IOH = -3.0 mA 2/ 1, 2, 3 All 2.4 V Low level output voltage VOL IOL = 1.8 mA 2/ 1, 2, 3 All 0.4 V Standby supply current ICCSB VIN = VCC = 5.5 V output open 1, 2, 3 All 2.0 mA Input capacitance

    32、CIN See 4.3.1c, VCC = open 4 All 15.0 pF Output capacitance COUT See 4.3.1c, VCC = open 4 All 15.0 pF Functional tests See 4.3.1d 3/ 7, 8 All Encoder/decoder clock frequency fEC, fDC 9, 10, 11 All 5/ 15.0 MHz Send clock frequency fESC 9, 10, 11 All 5/ 2.5 MHz Encoder/decoder data rate fED, fDD 9, 10

    33、, 11 All 5/ 1.25 MHz Decoder reset hold time tDRH 9, 10, 11 All 75.0 ns Master and decoder reset pulse width tMR, tDR 9, 10, 11 All 150 ns Decoder reset setup time tDRS CL = 50 pF 9, 10, 11 All 75.0 ns Shift clock delay tE1 9, 10, 11 All 125 ns Serial data setup tE2 9, 10, 11 All 75.0 ns Serial data

    34、 hold tE3 9, 10, 11 All 75.0 ns Enable setup tE4 CL = 50 pF 4/ 9, 10, 11 All 90.0 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 78029 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OH

    35、IO 43218-3990 REVISION LEVEL G SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. - Continued Limits Test Symbol Conditions 1/ -55C TC +125C unless otherwise specified Group A subgroups Device type Min Max Unit Enable pulse width tE5 9, 10, 11 All 100 ns Sync setup tE6 9,

    36、 10, 11 All 55.0 ns Sync pulse width tE7 9, 10, 11 All 150 ns Send data delay tE8 9, 10, 11 All 0.0 50.0 ns Bipolar output delay tE9 9, 10, 11 All 130 ns Enable hold time tE10 9, 10, 11 All 10.0 ns Sync hold time tE11 CL = 50 pF 4/ 9, 10, 11 All 95.0 ns Bipolar data pulse width tD1 9, 10, 11 All tDC

    37、+10 ns One zero overlap tD3 9, 10, 11 All tDC-10 ns Sync delay (on) tD6 9, 10, 11 All -20 110.0 ns Take data delay (on) tD7 9, 10, 11 All 0.0 110.0 ns Serial data out delay tD8 9, 10, 11 All 80.0 ns Sync delay (off) tD9 9, 10, 11 All 0.0 110.0 ns Take data delay (off) tD10 9, 10, 11 All 0.0 110.0 ns

    38、 Valid word delay tD11 CL = 50 pF 9, 10, 11 All 0.0 110.0 ns 1/ Unless otherwise specified, VCC = 4.5 V dc to 5.5 V dc and -55C to +125C. 2/ Interchanging of force and sense conditions is permitted. 3/ Tested as follows: f = 15 MHz, VIH = 70% VCC, VIL = 20% VCC, CL = 50 pF, VOH 1.5 V and VOL 1.5 V.

    39、4/ See figure 2. 5/ See 1.4 herein for this limit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 78029 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 7 DSCC FORM 2234 APR 97 Devi

    40、ce type 01 Case outlines J 3 Terminal number Terminal symbol Terminal number Terminal symbol 1 VALID WORD 1 VALID WORD 2 ENCODER SHIFT CLOCK 2 ENCODER SHIFT CLOCK 3 TAKE DATA 3 TAKE DATA 4 SERIAL DATA OUT 4 SERIAL DATA OUT 5 DECODER CLOCK 5 DECODER CLOCK 6 BIPOLAR ZERO IN 6 NC 7 BIPOLAR ONE IN 7 NC

    41、8 UNIPOLAR DATA IN 8 BIPOLAR ZERO IN 9 DECODER SHIFT CLOCK 9 BIPOLAR ONE IN 10 COMMAND/DATA SYNC 10 UNIPOLAR DATA IN 11 DECODER RESET 11 DECODER SHIFT CLOCK 12 GND 12 COMMAND/ DATA SYNC 13 MASTER RESET 13 DECODER RESET 14 6 OUT 14 GND 15 BIPOLAR ZERO OUT 15 MASTER RESET 16 OUTPUT INHIBIT 16 6 OUT 17

    42、 BIPOLAR ONE OUT 17 BIPOLAR ZERO OUT 18 SERIAL DATA IN 18 OUTPUT INHIBIT 19 ENCODER ENABLE 19 BIPOLAR ONE OUT 20 SYNC SELECT 20 SERIAL DATA IN 21 SEND DATA 21 ENCODER ENABLE 22 SEND CLOCK IN 22 SYNC SELECT 23 ENCODER CLOCK 23 NC 24 VCC 24 NC 25 SEND DATA 26 SEND CLOCK IN 27 ENCODER CLOCK 28 VCC FIGU

    43、RE 2. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 78029 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 8 DSCC FORM 2234 APR 97 FIGURE 2. Timing waveforms.

    44、 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 78029 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 9 DSCC FORM 2234 APR 97 FIGURE 2. Timing waveforms Continued. Provided by IHSN

    45、ot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 78029 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 10 DSCC FORM 2234 APR 97 FIGURE 2. Timing waveforms Continued. Provided by IHSNot for ResaleNo

    46、reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 78029 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 11 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall

    47、be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883.

    48、 (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA = +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter t


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