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    DLA SMD-5962-09244 REV B-2013 MICROCIRCUIT LINEAR HIGH VOLTAGE CURRENT SHUNT MONITOR MONOLITHIC SILICON.pdf

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    DLA SMD-5962-09244 REV B-2013 MICROCIRCUIT LINEAR HIGH VOLTAGE CURRENT SHUNT MONITOR MONOLITHIC SILICON.pdf

    1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add device type 02 tested at low dose rate. Make changes to paragraphs 1.2.2, 1.5, 4.4.1c, 4.4.4.1, Table I and figure 1. - ro 12-02-08 C. SAFFLE B Add single event latchup (SEL) testing information. Delete device class M references. - ro 13-06-1

    2、3 C. SAFFLE REV SHEET REV B B B B SHEET 15 16 17 18 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY RICK OFFICER DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWI

    3、NG IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY RAJESH PITHADIA APPROVED BY CHARLES F. SAFFLE MICROCIRCUIT, LINEAR, HIGH VOLTAGE, CURRENT SHUNT MONITOR, MONOLITHIC SILICON DRAWING APPROVAL DATE 10-12-16 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268

    4、5962-09244 SHEET 1 OF 18 DSCC FORM 2233 APR 97 5962-E445-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-09244 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97

    5、 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available,

    6、a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 R 09244 01 V H A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (

    7、see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circu

    8、it function as follows: Device type Generic number Circuit function 01 AD8212 Radiation hardened, high voltage, current shunt monitor 02 AD8212 Radiation hardened, high voltage, current shunt monitor 1.2.3 Device class designator. The device class designator is a single letter identifying the produc

    9、t assurance level as follows: Device class Device requirements documentation Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style H GDFP1-F10

    10、10 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-09244 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-39

    11、90 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage (VSto COM) 68 V IOUTvoltage . VSto COM - 5.2 V Reverse supply voltage (VSto COM) -0.3 V Power dissipation (PD) . 8 mW Output short circuit duration . Indefinite Maximum junction temperature (TJ) . 150C

    12、Lead temperature (soldering, 10 seconds) . 300C Storage temperature range -65C to +150C Thermal resistance, junction-to-case (JC) 56C/W 2/ Thermal resistance, junction-to-ambient (JA) . 93C/W 2/ 1.4 Recommended operating conditions. Supply voltage (VSto COM) 7 V to 65 V 3/ Ambient operating temperat

    13、ure range (TA) -55C to +125C 1.4.1 Operating performance characteristics. Input / output characteristics: (TA= +25C, +VSto COM = 15 V) Input impedance differential 2 k Input impedance common mode (+VSto COM = 7 V to 65 V) . 5 M Output impedance 20 M Input to output transconductance . 1000 A / V Dyna

    14、mic response: (TA= +25C, +VSto COM = 15 V) 4/ Small signal bandwidth - 3dB (Gain = 10) 1000 kHz Small signal bandwidth - 3dB (Gain= 20) . 500 kHz Small signal bandwidth - 3dB (Gain = 50) 100 kHz Noise performance: (TA= +25C, +VSto COM = 15 V) Voltage noise (referred to input (RTI), f = 0.1 Hz to 10

    15、Hz) 1.1 Vp-p Voltage noise (referred to input (RTI), special density, f = 1 kHz) 40 nV / Hz _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. Note COM and BIAS pins can be

    16、 treated as essentially the same voltage for absolute maximum ratings. 2/ Measurement taken under absolute worse case condition of still air. Data taken with a thermal camera for highest power density location. See MIL-STD-1835 for average package JCthermal numbers. 3/ This device has high voltage o

    17、peration which is achieved by using external voltage breakdown PNP transistor. In this configuration, the common mode range of the device is equal to the breakdown of the external PNP transistor. Refer to section 6.7 for more information. 4/ External input filtering should be considered to trade off

    18、 desired dynamic response versus undesired response to system transients and electromagnetic interference (EMI). Refer to section 6.7 for more information. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-0924

    19、4 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 1.5 Radiation features. Maximum total dose available (dose rate = 50 300 rads(Si)/s): Device type 01 . 100 krads(Si) 5/ Maximum total dose available (dose rate 10 mrads(Si)/s) : Device type 02 . 50 krads

    20、(Si) 6/ Single event phenomenon (SEP): No single event latchup (SEL) occurs at effective linear energy transfer (LET) (see 4.4.4.2) . 80 MeV-cm2/mg 7/ 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of

    21、this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS M

    22、IL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online

    23、 at http:/quicksearch.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues

    24、 of the documents are the issues of the documents cited in the solicitation or contract. ASTM INTERNATIONAL (ASTM) ASTM F1192 Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of Semiconductor Devices. (Copies of this document is available online at

    25、http:/www.astm.org/ or from ASTM International, P.O. Box C700, 100 Bar Harbor Drive, West Conshohocken, PA 19428-2959). _ 5/ Device type 01 may be dose rate sensitive in a space environment and may demonstrate enhanced low dose rate effects. Radiation end point limits for the noted parameters are gu

    26、aranteed only for the conditions specified in MIL-STD-883, method 1019, condition A. 6/ For device type 02, radiation end point limits for the noted parameters are guaranteed for the conditions specified in MIL-STD-883, method 1019, condition D. 7/ Limits are characterized at initial qualification a

    27、nd after any design or process changes that may affect the SEP characteristics, but are not production lot tested unless specified by the customer through the purchase order or contract. For more information on single event effect (SEE) test results, customers are requested to contact the manufactur

    28、er. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-09244 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 2.3 Order of precedence. In the event of a conflict bet

    29、ween the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requiremen

    30、ts for device classes Q and V shall be in accordance with MIL-PRF-38535 as specified herein, or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. 3.2.1 Case outline. The case outline

    31、shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Block diagram. The block diagram shall be as specified on figure 2. 3.2.4 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manu

    32、facturer under document revision level control and shall be made available to the preparing and acquiring activity upon request. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirra

    33、diation parameter limits are as specified in table IA and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table IA. 3

    34、.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. F

    35、or RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. 3.6 C

    36、ertificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as

    37、an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 shall be pro

    38、vided with each lot of microcircuits delivered to this drawing. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-09244 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 AP

    39、R 97 TABLE IA. Electrical performance characteristics. Test Symbol Conditions 1/ 2/ -55C TA +125C Group A subgroups Device type Limits Unit VSto COM = 7 V to 65 V unless otherwise specified Min Max Total supply current 3/ ISIS= IOUT+ IBIAS, 7 V +VS 65 V, (normal operation) 1,2,3 01, 02 720 A M,D,P,L

    40、,R 1 01 720 M,D,P,L 1 02 720 IS= IOUT+ IBIAS, 4/ high voltage operation, using external PNP transistor 1,2,3 01,02 1500 M,D,P,L,R 1 01 1500 M,D,P,L 1 02 1500 Voltage offset section Offset voltage VOSGain = 1 1 01,02 -2 +2 mV 2,3 -3 +3 M,D,P,L,R 1 01 -2 +2 M,D,P,L 1 02 -2 +2 Offset voltage drift VOS/

    41、 T Gain = 1 5/ 2,3 01,02 -10 +10 V / C Input section Differential input voltage range VINInput voltage between +VSand VSENSE1,2,3 01,02 0 500 mV M,D,P,L,R 1 01 0 500 M,D,P,L 1 02 0 500 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license

    42、 from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-09244 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics Continued. Test Symbol Conditions 1/ 2/ -55C TA +125C unless otherwise specified Group A subgr

    43、oups Device type Limits Unit Min Max Input section continued. VSENSEinput pin current ISENSE7 V +VS 65 V, (normal operation) 1,2,3 01,02 200 nA M,D,P,L,R 1 01 200 M,D,P,L 1 02 200 3/ 4/ 6/ High voltage operation, using external PNP transistor 1,2,3 01,02 1000 M,D,P,L,R 1 01 1000 M,D,P,L 1 02 1000 Ou

    44、tput section Output current range 3/ IOUTVIN= 0 mV to 500 mV 1,2,3 01,02 0 500 A M,D,P,L,R 1 01 0 500 M,D,P,L 1 02 0 500 Circuit gain G Rshunt = RL= 1 k, 7/ VIN= 50 mV and 500 mV 1,2,3 01,02 0.99 1.01 V / V M,D,P,L,R 1 01 0.99 1.01 M,D,P,L 1 02 0.99 1.01 +VSto COM regulator section Regulator voltage

    45、 VREG1,2,3 01,02 4.80 5.20 V M,D,P,L,R 1 01 4.80 5.20 M,D,P,L 1 02 4.80 5.20 Regulator power supply rejection ratio PSRR VREG/ +VS1,2,3 01,02 -100 100 V/V M,D,P,L,R 1 01 -100 100 M,D,P,L 1 02 -100 100 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted

    46、 without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-09244 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics Continued. Test Symbol Conditions 1/ 2/ -55C TA +125C Group A subgroups Device

    47、 type Limits Unit VSto COM = 7 V to 65 V unless otherwise specified Min Max +VSto COM regulator section - continued. Bias current 3/ IBIAS7 V +VS 65 V (normal operation) 1,2,3 01,02 220 A M,D,P,L,R 1 01 220 M,D,P,L 1 02 220 High voltage operation 4/ 6/ using external PNP transistor 1,2,3 01,02 200 1

    48、000 M,D,P,L,R 1 01 200 1000 M,D,P,L 1 02 200 1000 Minimum ALPHA pin input current IALPHA8/ 1,2,3 01,02 25 A M,D,P,L,R 1 01 25 M,D,P,L 1 02 25 Rising step response settling time tS_riseVS= 0 - 15 V, 5/ 9/ RShunt= 1 k, G = 20, VIN= 0 m V - 500 mV, SR = 23 V/s, VOUTsettling to 1%, see 4.4.1c 9,10,11 01,02 2.2 s Falling step response settling time tS_fallVS= 15 - 0 V, 5/ 9/ RShunt= 1 k, G = 20, VIN= 500 mV - 0 mV, SR = 23 V/s, VOUTsettling to 1%, see 4.4.1c 9,10,11 01,


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