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    DLA SMD-5962-01534 REV D-2012 MICROCIRCUIT LINEAR SERIALIZER MONOLITHIC SILICON.pdf

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    DLA SMD-5962-01534 REV D-2012 MICROCIRCUIT LINEAR SERIALIZER MONOLITHIC SILICON.pdf

    1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes to tests TPPos1, TPPos2, TPPos3, TPPos4, TPPos5, TPPos6, TCCS, and TCIP in table I. -rrp 02-06-13 Raymond Monnin B Add device type 02. Editorial changes throughout. - drw 03-06-18 Raymond Monnin C Change radiation feature for device type

    2、02. - drw 03-10-27 Raymond Monnin D Redraw. Corrections to figure 1. Editorial changes throughout. - drw 12-02-08 Charles F. Saffle REV SHEET REV D D D D D D D D D D D SHEET 15 16 17 18 19 20 21 22 23 24 25 REV STATUS REV D D D D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 P

    3、MIC N/A PREPARED BY Dan Wonnell DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY Raymond Monnin APPROVED BY Raymond Monnin MICROCIR

    4、CUIT, LINEAR, SERIALIZER, MONOLITHIC SILICON DRAWING APPROVAL DATE 02-05-23 AMSC N/A REVISION LEVEL D SIZE A CAGE CODE 67268 5962-01534 SHEET 1 OF 25 DSCC FORM 2233 APR 97 5962-E094-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIR

    5、CUIT DRAWING SIZE A 5962-01534 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V).

    6、A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 R 01534 01 Q X A Federal sto

    7、ck class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked wi

    8、th the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device types. The device types identify the circuit function as follows: Devic

    9、e type Generic number Circuit function 01 UT54LVDS217 50 MHz Serializer 02 UT54LVDS217 75 MHz Serializer 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-cert

    10、ification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline. The case outline are as designated in MIL-STD-1835 and as follows: Outline letter Desc

    11、riptive designator Terminals Package style X See figure 1 48 Flatpack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license f

    12、rom IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-01534 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage (VDD) -0.3 V dc to 4.0 V dc Voltage on any pin (VI/O) -0.3 V dc to (VDD+ 0.3 V dc) 2/ Storage tem

    13、perature (TSTG) -65C to +150C Power dissipation (PD) . 2 W Junction temperature (TJ) 3/ . +150C Thermal resistance, junction-to-case (JC) 4/ . 10C/W DC input current (II) 10 mA 1.4 Recommended operating conditions. Supply voltage (VDD) 3.0 V dc to 3.6 V dc Case temperature range (TC) . -55C to +125C

    14、 Input voltage (VIN) 0 V dc to VDD1.5 Radiation features. Maximum total dose available (dose rate = 1 rad(Si)/s): Device type 01 100krad (Si) Device type 02 1Mrad (Si) Neutron irradiation . 1 X 1013neutrons/cm25/ Single event latchup . 100 MeV cm2/mg 2. APPLICABLE DOCUMENTS 2.1 Government specificat

    15、ion, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-3853

    16、5 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Draw

    17、ings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a c

    18、onflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. _ 1/ Stresses above the absolute maximum rating may cause

    19、permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ For cold spare mode (VDD= VSS), VI/Omay be 0.3 V to the maximum recommended operating VDD+ 0.3 V. 3/ Maximum junction temperature may be increased to +175C during burn-in and l

    20、ife test. 4/ Test per MIL-STD-883, method 1012. 5/ Guaranteed, but not tested. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-01534 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DS

    21、CC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 as specified herein, or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not aff

    22、ect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.1.1 Microcircuit die. For the requirements of microcircuit die, see appendix A to

    23、 this document. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline. The case outline shall be

    24、in accordance with 1.2.4 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document revision level control and shall be made avail

    25、able to the preparing and acquiring activity upon request. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply o

    26、ver the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In a

    27、ddition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked.

    28、Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535.

    29、 The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6

    30、.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of

    31、supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as require

    32、d for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DLA Land and Maritime -VA of change of produ

    33、ct (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the man

    34、ufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-01534 DLA LAND

    35、AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/, 2/ -55C TC +125C VDD= 3.3 V 0.3 V Group A subgroups Device type Limits Unit unless otherwise specified Min Max CMOS/TTL DC SPECIFICATIONS

    36、High-level input voltage VIH1, 2, 3 01, 02 2.0 VDDV Low-level input voltage VIL1, 2, 3 01, 02 GND 0.8 V High-level input current IIHVIN= 3.6 V, VDD= 3.6 V 1, 2, 3 01, 02 -10 +10 A Low-level Input current IILVIN= 0 V, VDD= 3.6 V 1, 2, 3 01, 02 -10 +10 A Input clamp voltage VCLICL= -18 mA 1, 2, 3 01,

    37、02 -1.5 V Cold spare leakage current ICSVIN= 3.6 V, VDD= VSS1, 2, 3 01, 02 -20 +20 A LVDS OUTPUT DC SPECIFICATIONS (OUT+, OUT-) Differential output voltage VODRL= 100, 3/ 1, 2, 3 01, 02 250 400 mV Change in VODbetween complementary output states VODRL= 100, 3/ 1, 2, 3 01, 02 35 mV Offset voltage VOS

    38、RL= 100, VOS= (Voh+ Vol)/2, 3/ 1, 2, 3 01, 02 1.120 1.410 V Change in VOSbetween complementary output states VOSRL= 100, 3/ 1, 2, 3 01, 02 35 mV Output three-state current IOZPWR DWN = 0 V, VOUT= 0 V or VDD4/ 1, 2, 3 01, 02 -10 +10 A Output cold spare leakage current ICSOUTVIN= 3.6 V, VDD= VSS1, 2,

    39、3 01, 02 -20 +20 A Output short circuit current IOSVOUT= 0 V 5/, 6/ 1, 2, 3 01, 02 5.0 mA SUPPLY CURRENT Transmitter supply current with loads ICCLRL= 100 all channels CL= 5 pF, f = 50 MHz 4/ 1, 2, 3 01, 02 65.0 mA Power down current ICCZDIN= VDDor VSS4/, 7/ PWR DWN = 0 V, f = 0 Hz 1, 2, 3 01, 02 60

    40、.0 A AC SWITCHING CHARACTERISTICS LVDS low-to-high transition time LLHT See figure 3, 6/ 9, 10, 11 01, 02 1.5 ns LVDS high-to-low transition time LHLT See figure 3, 6/ 9, 10, 11 01, 02 1.5 ns Transmitter output pulse position for bit 0 TPPos0 f = 50 MHz, see figure 5, 6/ 9, 10, 11 01 0.08 0.53 ns f

    41、= 75 MHz, see figure 5, 6/ 02 -0.18 0.27 Transmitter output pulse position for bit 1 TPPos1 f = 50 MHz, see figure 5, 6/ 9, 10, 11 01 2.94 3.39 ns f = 75 MHz, see figure 5, 6/ 02 1.72 2.17 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without lic

    42、ense from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-01534 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - continued. Test Symbol Conditions 1/, 2/ -55C TC +125C VDD= 3.0 V dc to 3.6 V dc Group A

    43、subgroups Device type Limits Unit unless otherwise specified Min Max AC SWITCHING CHARACTERISTICS - continued Transmitter output pulse position for bit 2 TPPos2 f = 50 MHz, see figure 5, 6/ 9, 10, 11 01 5.79 6.24 ns f = 75 MHz, see figure 5, 6/ 02 3.63 4.08 Transmitter output pulse position for bit

    44、3 TPPos3 f = 50 MHz, see figure 5, 6/ 9, 10, 11 01 8.65 9.10 ns f = 75 MHz, see figure 5, 6/ 02 5.53 5.98 Transmitter output pulse position for bit 4 TPPos4 f = 50 MHz, see figure 5, 6/ 9, 10, 11 01 11.51 11.96 ns f = 75 MHz, see figure 5, 6/ 02 7.44 7.89 Transmitter output pulse position for bit 5

    45、TPPos5 f = 50 MHz, see figure 5, 6/ 9, 10, 11 01 14.37 14.82 ns f = 75 MHz, see figure 5, 6/ 02 9.34 9.79 Transmitter output pulse position for bit 6 TPPos6 f = 50 MHz, see figure 5, 6/ 9, 10, 11 01 17.22 17.67 ns f = 75 MHz, see figure 5, 6/ 02 11.25 11.70 Channel to channel skew TCCS See figure 6,

    46、 8/, 9/ 9, 10, 11 01, 02 0.45 ns TxCLK IN period TCIP See figure 7, 9/ 9, 10, 11 01 20.00 66.7 ns 02 13.3 66.7 TxCLK IN high time TCIH See figure 7, 9/, 10/ 9, 10, 11 01, 02 0.35 Tcip 0.65 Tcip ns TxCLK IN low time TCIL See figure 7, 9/, 10/ 9, 10, 11 01, 02 0.35 Tcip 0.65 Tcip ns TxIN setup to TxCL

    47、K IN TSTC f = 50 MHz, see figure 7, 6/, 9/ 9, 10, 11 01 2.5 ns f = 15 MHz, see figure 7, 6/, 9/ 02 1.0 f = 75 MHz, see figure 7, 6/, 9/ 02 0.5 TxIN hold to TxCLK IN THTC f = 50 MHz, see figure 7, 6/, 9/ 9, 10, 11 01 1.5 ns f = 15 MHz, see figure 7, 6/, 9/ 02 0.7 f = 75 MHz, see figure 7, 6/, 9/ 02 0

    48、.5 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-01534 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - continued. Test Symbol Conditions 1/, 2/ -55C TC +125C VDD= 3.0 V dc to 3.6 V dc Group A subgroups Device type Limits Unit unless otherwise specified Min Max AC SWITCHING CHARACTERISTICS - continued TxCLK IN to Tx


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